This source file includes following definitions.
- wavelan_splhi
- wavelan_splx
- hasr_read
- hacr_write
- hacr_write_slow
- set_chan_attn
- wavelan_reset
- wavelan_16_off
- wavelan_16_on
- wavelan_ints_off
- wavelan_ints_on
- psa_read
- obram_read
- obram_write
- mmc_read
- mmc_write
- wavelan_map_irq
- wavelan_mmc_init
- wavelan_ack
- wavelan_synchronous_cmd
- wavelan_hardware_reset
- wavelan_struct_check
- wavelan_probe
- wavelan_probe1
- wavelan_ru_start
- wavelan_cu_start
- wavelan_open
- hardware_send_packet
- wavelan_send_packet
- addrcmp
- wavelan_receive
- wavelan_complete
- wavelan_watchdog
- wavelan_interrupt
- wavelan_close
- wavelan_get_stats
- wavelan_set_multicast_list
- sprintf_stats
- wavelan_get_info
- init_module
- cleanup_module
- wavelan_cu_show_one
- wavelan_psa_show
- wavelan_mmc_show
- wavelan_scb_show
- wavelan_ru_show
- wavelan_cu_show
- wavelan_dev_show
- wavelan_local_show
1
2
3
4
5
6
7 #include <linux/config.h>
8
9 #if defined(CONFIG_WAVELAN)
10 #if defined(MODULE)
11 #include <linux/module.h>
12 #include <linux/version.h>
13 #endif
14
15 #include <linux/kernel.h>
16 #include <linux/sched.h>
17 #include <linux/types.h>
18 #include <linux/fcntl.h>
19 #include <linux/interrupt.h>
20 #include <linux/ptrace.h>
21 #include <linux/ioport.h>
22 #include <linux/in.h>
23 #include <linux/string.h>
24 #include <linux/delay.h>
25 #include <asm/system.h>
26 #include <asm/bitops.h>
27 #include <asm/io.h>
28 #include <asm/dma.h>
29 #include <errno.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/skbuff.h>
33 #include <linux/malloc.h>
34 #include <linux/timer.h>
35 #define STRUCT_CHECK 1
36 #include "i82586.h"
37 #include "wavelan.h"
38
39 #ifndef WAVELAN_DEBUG
40 #define WAVELAN_DEBUG 0
41 #endif
42
43 #define nels(a) (sizeof(a) / sizeof(a[0]))
44
45 #define WATCHDOG_JIFFIES 512
46
47 typedef struct device device;
48 typedef struct enet_statistics en_stats;
49 typedef struct net_local net_local;
50 typedef struct timer_list timer_list;
51
52 struct net_local
53 {
54 en_stats stats;
55 unsigned int tx_n_in_use;
56 unsigned char nwid[2];
57 unsigned short hacr;
58 unsigned short rx_head;
59 unsigned short rx_last;
60 unsigned short tx_first_free;
61 unsigned short tx_first_in_use;
62 unsigned int nresets;
63 unsigned int correct_nwid;
64 unsigned int wrong_nwid;
65 unsigned int promiscuous;
66 timer_list watchdog;
67 device *dev;
68 net_local *prev;
69 net_local *next;
70 };
71
72 extern int wavelan_probe(device *);
73
74 static char *version = "wavelan.c:v7 95/4/8\n";
75
76
77
78
79 static int wavelan_probe1(device *, unsigned short);
80 static int wavelan_open(device *);
81 static int wavelan_send_packet(struct sk_buff *, device *);
82 static void wavelan_interrupt(int, struct pt_regs *);
83 static int wavelan_close(device *);
84 static en_stats *wavelan_get_stats(device *);
85 static void wavelan_set_multicast_list(device *, int, void *);
86
87
88
89
90 static void wavelan_cu_show_one(device *, net_local *, int, unsigned short);
91 static void wavelan_cu_start(device *);
92 static void wavelan_ru_start(device *);
93 static void wavelan_watchdog(unsigned long);
94 #if 0
95 static void wavelan_psa_show(psa_t *);
96 static void wavelan_mmc_show(unsigned short);
97 #endif
98 static void wavelan_scb_show(unsigned short);
99 static void wavelan_ru_show(device *);
100 static void wavelan_cu_show(device *);
101 static void wavelan_dev_show(device *);
102 static void wavelan_local_show(device *);
103
104 static unsigned int wavelan_debug = WAVELAN_DEBUG;
105 static net_local *first_wavelan = (net_local *)0;
106
107 static
108 unsigned long
109 wavelan_splhi(void)
110 {
111 unsigned long flags;
112
113 save_flags(flags);
114 cli();
115
116 return flags;
117 }
118
119 static
120 void
121 wavelan_splx(unsigned long flags)
122 {
123 restore_flags(flags);
124 }
125
126 static
127 unsigned short
128 hasr_read(unsigned short ioaddr)
129 {
130 return inw(HASR(ioaddr));
131 }
132
133 static
134 void
135 hacr_write(unsigned short ioaddr, int hacr)
136 {
137 outw(hacr, HACR(ioaddr));
138 }
139
140 static
141 void
142 hacr_write_slow(unsigned short ioaddr, int hacr)
143 {
144 hacr_write(ioaddr, hacr);
145
146 udelay(1000);
147 }
148
149
150
151
152 static
153 void
154 set_chan_attn(unsigned short ioaddr, unsigned short current_hacr)
155 {
156 hacr_write(ioaddr, current_hacr | HACR_CA);
157 }
158
159
160
161
162 static
163 void
164 wavelan_reset(unsigned short ioaddr)
165 {
166 hacr_write_slow(ioaddr, HACR_RESET);
167 hacr_write(ioaddr, HACR_DEFAULT);
168 }
169
170 static
171 void
172 wavelan_16_off(unsigned short ioaddr, unsigned short hacr)
173 {
174 hacr &= ~HACR_16BITS;
175
176 hacr_write(ioaddr, hacr);
177 }
178
179 static
180 void
181 wavelan_16_on(unsigned short ioaddr, unsigned short hacr)
182 {
183 hacr |= HACR_16BITS;
184
185 hacr_write(ioaddr, hacr);
186 }
187
188 static
189 void
190 wavelan_ints_off(device *dev)
191 {
192 unsigned short ioaddr;
193 net_local *lp;
194 unsigned long x;
195
196 ioaddr = dev->base_addr;
197 lp = (net_local *)dev->priv;
198
199 x = wavelan_splhi();
200
201 lp->hacr &= ~HACR_INTRON;
202 hacr_write(ioaddr, lp->hacr);
203
204 wavelan_splx(x);
205 }
206
207 static
208 void
209 wavelan_ints_on(device *dev)
210 {
211 unsigned short ioaddr;
212 net_local *lp;
213 unsigned long x;
214
215 ioaddr = dev->base_addr;
216 lp = (net_local *)dev->priv;
217
218 x = wavelan_splhi();
219
220 lp->hacr |= HACR_INTRON;
221 hacr_write(ioaddr, lp->hacr);
222
223 wavelan_splx(x);
224 }
225
226
227
228
229 static
230 void
231 psa_read(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
232 {
233 wavelan_16_off(ioaddr, hacr);
234
235 while (n-- > 0)
236 {
237 outw(o, PIOR2(ioaddr));
238 o++;
239 *b++ = inb(PIOP2(ioaddr));
240 }
241
242 wavelan_16_on(ioaddr, hacr);
243 }
244
245
246
247
248 static
249 void
250 obram_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
251 {
252 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
253
254 outw(o, PIOR1(ioaddr));
255
256 insw(PIOP1(ioaddr), (unsigned short *)b, n);
257 }
258
259
260
261
262 static
263 void
264 obram_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
265 {
266 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
267
268 outw(o, PIOR1(ioaddr));
269
270 outsw(PIOP1(ioaddr), (unsigned short *)b, n);
271 }
272
273
274
275
276 static
277 void
278 mmc_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
279 {
280 while (n-- > 0)
281 {
282 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
283 ;
284
285 outw(o << 1, MMCR(ioaddr));
286 o++;
287
288 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
289 ;
290
291 *b++ = (unsigned char)(inw(MMCR(ioaddr)) >> 8);
292 }
293 }
294
295
296
297
298 static
299 void
300 mmc_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
301 {
302 while (n-- > 0)
303 {
304 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
305 ;
306
307 outw((unsigned short)(((unsigned short)*b << 8) | (o << 1) | 1), MMCR(ioaddr));
308 b++;
309 o++;
310 }
311 }
312
313
314
315
316 static
317 int
318 wavelan_map_irq(unsigned short ioaddr, unsigned char irqval)
319 {
320 int irq;
321 static int irqvals[] =
322 {
323 0, 0, 0, 0x01,
324 0x02, 0x04, 0, 0x08,
325 0, 0, 0x10, 0x20,
326 0x40, 0, 0, 0x80,
327 };
328
329 for (irq = 0; irq < nels(irqvals); irq++)
330 {
331 if (irqvals[irq] == (int)irqval)
332 return irq;
333 }
334
335 return -1;
336 }
337
338
339
340
341 static
342 void
343 wavelan_mmc_init(device *dev, psa_t *psa)
344 {
345 unsigned short ioaddr;
346 net_local *lp;
347 mmw_t m;
348 int configured;
349
350 ioaddr = dev->base_addr;
351 lp = (net_local *)dev->priv;
352 memset(&m, 0x00, sizeof(m));
353
354
355
356
357
358
359
360
361
362 configured = 0;
363
364
365
366
367
368 m.mmw_jabber_enable = 0x01;
369 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
370 m.mmw_ifs = 0x20;
371 m.mmw_mod_delay = 0x04;
372 m.mmw_jam_time = 0x38;
373
374 m.mmw_encr_enable = 0;
375 m.mmw_des_io_invert = 0;
376 m.mmw_freeze = 0;
377 m.mmw_decay_prm = 0;
378 m.mmw_decay_updat_prm = 0;
379
380 if (configured)
381 {
382
383
384
385 if (psa->psa_undefined & 1)
386 m.mmw_loopt_sel = 0x00;
387 else
388 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
389
390 m.mmw_thr_pre_set = psa->psa_thr_pre_set & 0x3F;
391 m.mmw_quality_thr = psa->psa_quality_thr & 0x0F;
392 }
393 else
394 {
395 if (lp->promiscuous)
396 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
397 else
398 m.mmw_loopt_sel = 0x00;
399
400
401
402
403
404 if (psa->psa_comp_number & 1)
405 m.mmw_thr_pre_set = 0x01;
406 else
407 m.mmw_thr_pre_set = 0x04;
408
409 m.mmw_quality_thr = 0x03;
410 }
411
412 m.mmw_netw_id_l = lp->nwid[1];
413 m.mmw_netw_id_h = lp->nwid[0];
414
415 mmc_write(ioaddr, 0, (unsigned char *)&m, sizeof(m));
416 }
417
418 static
419 void
420 wavelan_ack(device *dev)
421 {
422 unsigned short ioaddr;
423 net_local *lp;
424 unsigned short scb_cs;
425 int i;
426
427 ioaddr = dev->base_addr;
428 lp = (net_local *)dev->priv;
429
430 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
431 scb_cs &= SCB_ST_INT;
432
433 if (scb_cs == 0)
434 return;
435
436 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
437
438 set_chan_attn(ioaddr, lp->hacr);
439
440 for (i = 1000; i > 0; i--)
441 {
442 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
443 if (scb_cs == 0)
444 break;
445
446 udelay(1000);
447 }
448
449 if (i <= 0)
450 printk("%s: wavelan_ack(): board not accepting command.\n", dev->name);
451 }
452
453
454
455
456
457 static
458 int
459 wavelan_synchronous_cmd(device *dev, char *str)
460 {
461 unsigned short ioaddr;
462 net_local *lp;
463 unsigned short scb_cmd;
464 ach_t cb;
465 int i;
466
467 ioaddr = dev->base_addr;
468 lp = (net_local *)dev->priv;
469
470 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
471 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
472
473 set_chan_attn(ioaddr, lp->hacr);
474
475 for (i = 64; i > 0; i--)
476 {
477 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
478 if (cb.ac_status & AC_SFLD_C)
479 break;
480
481 udelay(1000);
482 }
483
484 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK))
485 {
486 printk("%s: %s failed; status = 0x%x\n", dev->name, str, cb.ac_status);
487 wavelan_scb_show(ioaddr);
488 return -1;
489 }
490
491 wavelan_ack(dev);
492
493 return 0;
494 }
495
496 static
497 int
498 wavelan_hardware_reset(device *dev)
499 {
500 unsigned short ioaddr;
501 psa_t psa;
502 net_local *lp;
503 scp_t scp;
504 iscp_t iscp;
505 scb_t scb;
506 ach_t cb;
507 int i;
508 ac_cfg_t cfg;
509 ac_ias_t ias;
510
511 if (wavelan_debug > 0)
512 printk("%s: ->wavelan_hardware_reset(dev=0x%x)\n", dev->name, (unsigned int)dev);
513
514 ioaddr = dev->base_addr;
515 lp = (net_local *)dev->priv;
516
517 lp->nresets++;
518
519 wavelan_reset(ioaddr);
520 lp->hacr = HACR_DEFAULT;
521
522
523
524
525 {
526 unsigned char zeroes[512];
527
528 memset(&zeroes[0], 0x00, sizeof(zeroes));
529
530 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
531 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
532 }
533
534 psa_read(ioaddr, lp->hacr, 0, (unsigned char *)&psa, sizeof(psa));
535
536 wavelan_mmc_init(dev, &psa);
537
538
539
540
541
542 memset(&scp, 0x00, sizeof(scp));
543 scp.scp_sysbus = SCP_SY_16BBUS;
544 scp.scp_iscpl = OFFSET_ISCP;
545 obram_write(ioaddr, OFFSET_SCP, (unsigned char *)&scp, sizeof(scp));
546
547 memset(&iscp, 0x00, sizeof(iscp));
548 iscp.iscp_busy = 1;
549 iscp.iscp_offset = OFFSET_SCB;
550 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
551
552 memset(&scb, 0x00, sizeof(scb));
553 scb.scb_command = SCB_CMD_RESET;
554 scb.scb_cbl_offset = OFFSET_CU;
555 scb.scb_rfa_offset = OFFSET_RU;
556 obram_write(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
557
558 set_chan_attn(ioaddr, lp->hacr);
559
560 for (i = 1000; i > 0; i--)
561 {
562 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
563
564 if (iscp.iscp_busy == (unsigned short)0)
565 break;
566
567 udelay(1000);
568 }
569
570 if (i <= 0)
571 {
572 printk("%s: wavelan_hardware_reset(): iscp_busy timeout.\n", dev->name);
573 if (wavelan_debug > 0)
574 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
575 return -1;
576 }
577
578 for (i = 15; i > 0; i--)
579 {
580 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
581
582 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
583 break;
584
585 udelay(1000);
586 }
587
588 if (i <= 0)
589 {
590 printk("%s: wavelan_hardware_reset(): status: expected 0x%02x, got 0x%02x.\n", dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
591 if (wavelan_debug > 0)
592 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
593 return -1;
594 }
595
596 wavelan_ack(dev);
597
598 memset(&cb, 0x00, sizeof(cb));
599 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
600 cb.ac_link = OFFSET_CU;
601 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
602
603 if (wavelan_synchronous_cmd(dev, "diag()") == -1)
604 {
605 if (wavelan_debug > 0)
606 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
607 return -1;
608 }
609
610 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
611 if (cb.ac_status & AC_SFLD_FAIL)
612 {
613 printk("%s: wavelan_hardware_reset(): i82586 Self Test failed.\n", dev->name);
614 if (wavelan_debug > 0)
615 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
616 return -1;
617 }
618
619 memset(&cfg, 0x00, sizeof(cfg));
620
621 #if 0
622
623
624
625 cfg.fifolim_bytecnt = 0x080c;
626 cfg.addrlen_mode = 0x2600;
627 cfg.linprio_interframe = 0x7820;
628 cfg.slot_time = 0xf00c;
629 cfg.hardware = 0x0008;
630 cfg.min_frame_len = 0x0040;
631 #endif
632
633
634
635
636
637
638 cfg.cfg_byte_cnt = AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
639 cfg.cfg_fifolim = AC_CFG_FIFOLIM(8);
640 cfg.cfg_byte8 = AC_CFG_SAV_BF(0) |
641 AC_CFG_SRDY(0);
642 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
643 AC_CFG_ILPBCK(0) |
644 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
645 AC_CFG_ALOC(1) |
646 AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
647 cfg.cfg_byte10 = AC_CFG_BOFMET(0) |
648 AC_CFG_ACR(0) |
649 AC_CFG_LINPRIO(0);
650 cfg.cfg_ifs = 32;
651 cfg.cfg_slotl = 0;
652 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) |
653 AC_CFG_SLTTMHI(2);
654 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
655 AC_CFG_BTSTF(0) |
656 AC_CFG_CRC16(0) |
657 AC_CFG_NCRC(0) |
658 AC_CFG_TNCRS(1) |
659 AC_CFG_MANCH(0) |
660 AC_CFG_BCDIS(0) |
661 AC_CFG_PRM(lp->promiscuous);
662 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
663 AC_CFG_CDTF(0) |
664 AC_CFG_ICSS(0) |
665 AC_CFG_CSTF(0);
666
667
668
669 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
670
671 cfg.cfg_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_configure);
672 cfg.cfg_h.ac_link = OFFSET_CU;
673 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cfg, sizeof(cfg));
674
675 if (wavelan_synchronous_cmd(dev, "reset()-configure") == -1)
676 {
677 if (wavelan_debug > 0)
678 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
679
680 return -1;
681 }
682
683 memset(&ias, 0x00, sizeof(ias));
684 ias.ias_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_ia_setup);
685 ias.ias_h.ac_link = OFFSET_CU;
686 memcpy(&ias.ias_addr[0], (unsigned char *)&dev->dev_addr[0], sizeof(ias.ias_addr));
687 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&ias, sizeof(ias));
688
689 if (wavelan_synchronous_cmd(dev, "reset()-address") == -1)
690 {
691 if (wavelan_debug > 0)
692 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
693
694 return -1;
695 }
696
697 wavelan_ints_on(dev);
698
699 if (wavelan_debug > 4)
700 wavelan_scb_show(ioaddr);
701
702 wavelan_ru_start(dev);
703 wavelan_cu_start(dev);
704
705 if (wavelan_debug > 0)
706 printk("%s: <-wavelan_hardware_reset(): 0\n", dev->name);
707
708 return 0;
709 }
710
711 #if STRUCT_CHECK == 1
712
713 static
714 char *
715 wavelan_struct_check(void)
716 {
717 #define SC(t,s,n) if (sizeof(t) != s) return n
718 SC(psa_t, PSA_SIZE, "psa_t");
719 SC(mmw_t, MMW_SIZE, "mmw_t");
720 SC(mmr_t, MMR_SIZE, "mmr_t");
721 SC(ha_t, HA_SIZE, "ha_t");
722 #undef SC
723
724 return (char *)0;
725 }
726
727 #endif
728
729
730
731
732
733
734
735
736 int
737 wavelan_probe(device *dev)
738 {
739 int i;
740 int r;
741 short base_addr;
742 static unsigned short iobase[] =
743 {
744 #if 0
745 Leave out 0x3C0 for now -- seems to clash
746 with some video controllers.
747 Leave out the others too -- we will always
748 use 0x390 and leave 0x300 for the Ethernet device.
749 0x300, 0x390, 0x3E0, 0x3C0,
750 #endif
751 0x390,
752 };
753
754 if (wavelan_debug > 0)
755 printk("%s: ->wavelan_probe(dev=0x%x (base_addr=0x%x))\n", dev->name, (unsigned int)dev, (unsigned int)dev->base_addr);
756
757 #if STRUCT_CHECK == 1
758 if (wavelan_struct_check() != (char *)0)
759 {
760 printk("%s: structure/compiler botch: \"%s\"\n", dev->name, wavelan_struct_check());
761
762 if (wavelan_debug > 0)
763 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
764
765 return ENODEV;
766 }
767 #endif
768
769 base_addr = dev->base_addr;
770
771 if (base_addr < 0)
772 {
773
774
775
776 if (wavelan_debug > 0)
777 printk("%s: <-wavelan_probe(): ENXIO\n", dev->name);
778 return ENXIO;
779 }
780
781 if (base_addr > 0x100)
782 {
783
784
785
786 r = wavelan_probe1(dev, base_addr);
787 if (wavelan_debug > 0)
788 printk("%s: <-wavelan_probe(): %d\n", dev->name, r);
789 return r;
790 }
791
792 for (i = 0; i < nels(iobase); i++)
793 {
794 if (check_region(iobase[i], sizeof(ha_t)))
795 continue;
796
797 if (wavelan_probe1(dev, iobase[i]) == 0)
798 {
799 if (wavelan_debug > 0)
800 printk("%s: <-wavelan_probe(): 0\n", dev->name);
801 return 0;
802 }
803 }
804
805 if (wavelan_debug > 0)
806 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
807
808 return ENODEV;
809 }
810
811 static
812 int
813 wavelan_probe1(device *dev, unsigned short ioaddr)
814 {
815 psa_t psa;
816 int irq;
817 int i;
818 net_local *lp;
819
820 if (wavelan_debug > 0)
821 printk("%s: ->wavelan_probe1(dev=0x%x, ioaddr=0x%x)\n", dev->name, (unsigned int)dev, ioaddr);
822
823 wavelan_reset(ioaddr);
824
825 psa_read(ioaddr, HACR_DEFAULT, 0, (unsigned char *)&psa, sizeof(psa));
826
827
828
829
830
831 if
832 (
833 psa.psa_univ_mac_addr[0] != SA_ADDR0
834 ||
835 psa.psa_univ_mac_addr[1] != SA_ADDR1
836 ||
837 psa.psa_univ_mac_addr[2] != SA_ADDR2
838 )
839 {
840 if (wavelan_debug > 0)
841 printk("%s: <-wavelan_probe1(): ENODEV\n", dev->name);
842 return ENODEV;
843 }
844
845 printk("%s: WaveLAN at %#x,", dev->name, ioaddr);
846
847 if ((irq = wavelan_map_irq(ioaddr, psa.psa_int_req_no)) == -1)
848 {
849 printk(" could not wavelan_map_irq(0x%x, %d).\n", ioaddr, psa.psa_int_req_no);
850 if (wavelan_debug > 0)
851 printk("%s: <-wavelan_probe1(): EAGAIN\n", dev->name);
852 return EAGAIN;
853 }
854
855 dev->irq = irq;
856
857 request_region(ioaddr, sizeof(ha_t), "wavelan");
858 dev->base_addr = ioaddr;
859
860
861
862
863
864
865 if (dev->mem_start != 0)
866 {
867 psa.psa_nwid[0] = (dev->mem_start >> 8) & 0xFF;
868 psa.psa_nwid[1] = (dev->mem_start >> 0) & 0xFF;
869 }
870
871 dev->mem_start = 0x0000;
872 dev->mem_end = 0x0000;
873 dev->if_port = 0;
874
875 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
876
877 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
878 printk("%s%02x", (i == 0) ? " " : ":", dev->dev_addr[i]);
879
880 printk(", IRQ %d", dev->irq);
881 printk(", nwid 0x%02x%02x", psa.psa_nwid[0], psa.psa_nwid[1]);
882
883 printk(", PC");
884 switch (psa.psa_comp_number)
885 {
886 case PSA_COMP_PC_AT_915:
887 case PSA_COMP_PC_AT_2400:
888 printk("-AT");
889 break;
890
891 case PSA_COMP_PC_MC_915:
892 case PSA_COMP_PC_MC_2400:
893 printk("-MC");
894 break;
895
896 case PSA_COMP_PCMCIA_915:
897 printk("MCIA");
898 break;
899
900 default:
901 printk("???");
902 break;
903 }
904
905 printk(", ");
906 switch (psa.psa_subband)
907 {
908 case PSA_SUBBAND_915:
909 printk("915");
910 break;
911
912 case PSA_SUBBAND_2425:
913 printk("2425");
914 break;
915
916 case PSA_SUBBAND_2460:
917 printk("2460");
918 break;
919
920 case PSA_SUBBAND_2484:
921 printk("2484");
922 break;
923
924 case PSA_SUBBAND_2430_5:
925 printk("2430.5");
926 break;
927
928 default:
929 printk("???");
930 break;
931 }
932 printk(" MHz");
933
934 printk("\n");
935
936 if (wavelan_debug > 0)
937 printk(version);
938
939 dev->priv = kmalloc(sizeof(net_local), GFP_KERNEL);
940 memset(dev->priv, 0x00, sizeof(net_local));
941 lp = (net_local *)dev->priv;
942
943 if (first_wavelan == (net_local *)0)
944 {
945 first_wavelan = lp;
946 lp->prev = lp;
947 lp->next = lp;
948 }
949 else
950 {
951 lp->prev = first_wavelan->prev;
952 lp->next = first_wavelan;
953 first_wavelan->prev->next = lp;
954 first_wavelan->prev = lp;
955 }
956 lp->dev = dev;
957
958 lp->hacr = HACR_DEFAULT;
959
960 lp->nwid[0] = psa.psa_nwid[0];
961 lp->nwid[1] = psa.psa_nwid[1];
962
963 lp->watchdog.function = wavelan_watchdog;
964 lp->watchdog.data = (unsigned long)dev;
965
966 dev->open = wavelan_open;
967 dev->stop = wavelan_close;
968 dev->hard_start_xmit = wavelan_send_packet;
969 dev->get_stats = wavelan_get_stats;
970 dev->set_multicast_list = &wavelan_set_multicast_list;
971
972
973
974
975
976 ether_setup(dev);
977
978 dev->mtu = WAVELAN_MTU;
979
980 if (wavelan_debug > 0)
981 printk("%s: <-wavelan_probe1(): 0\n", dev->name);
982
983 return 0;
984 }
985
986
987
988
989
990 static
991 void
992 wavelan_ru_start(device *dev)
993 {
994 unsigned short ioaddr;
995 net_local *lp;
996 unsigned short scb_cs;
997 fd_t fd;
998 rbd_t rbd;
999 unsigned short rx;
1000 unsigned short rx_next;
1001 int i;
1002
1003 ioaddr = dev->base_addr;
1004 lp = (net_local *)dev->priv;
1005
1006 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
1007 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
1008 return;
1009
1010 lp->rx_head = OFFSET_RU;
1011
1012 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next)
1013 {
1014 rx_next = (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
1015
1016 fd.fd_status = 0;
1017 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
1018 fd.fd_link_offset = rx_next;
1019 fd.fd_rbd_offset = rx + sizeof(fd);
1020 obram_write(ioaddr, rx, (unsigned char *)&fd, sizeof(fd));
1021
1022 rbd.rbd_status = 0;
1023 rbd.rbd_next_rbd_offset = I82586NULL;
1024 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
1025 rbd.rbd_bufh = 0;
1026 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
1027 obram_write(ioaddr, rx + sizeof(fd), (unsigned char *)&rbd, sizeof(rbd));
1028
1029 lp->rx_last = rx;
1030 }
1031
1032 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), (unsigned char *)&lp->rx_head, sizeof(lp->rx_head));
1033
1034 scb_cs = SCB_CMD_RUC_GO;
1035 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1036
1037 set_chan_attn(ioaddr, lp->hacr);
1038
1039 for (i = 1000; i > 0; i--)
1040 {
1041 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1042 if (scb_cs == 0)
1043 break;
1044
1045 udelay(1000);
1046 }
1047
1048 if (i <= 0)
1049 printk("%s: wavelan_ru_start(): board not accepting command.\n", dev->name);
1050 }
1051
1052
1053
1054
1055
1056
1057 static
1058 void
1059 wavelan_cu_start(device *dev)
1060 {
1061 unsigned short ioaddr;
1062 net_local *lp;
1063 int i;
1064 unsigned short txblock;
1065 unsigned short first_nop;
1066 unsigned short scb_cs;
1067
1068 ioaddr = dev->base_addr;
1069 lp = (net_local *)dev->priv;
1070
1071 lp->tx_first_free = OFFSET_CU;
1072 lp->tx_first_in_use = I82586NULL;
1073
1074 for
1075 (
1076 i = 0, txblock = OFFSET_CU;
1077 i < NTXBLOCKS;
1078 i++, txblock += TXBLOCKZ
1079 )
1080 {
1081 ac_tx_t tx;
1082 ac_nop_t nop;
1083 tbd_t tbd;
1084 unsigned short tx_addr;
1085 unsigned short nop_addr;
1086 unsigned short tbd_addr;
1087 unsigned short buf_addr;
1088
1089 tx_addr = txblock;
1090 nop_addr = tx_addr + sizeof(tx);
1091 tbd_addr = nop_addr + sizeof(nop);
1092 buf_addr = tbd_addr + sizeof(tbd);
1093
1094 tx.tx_h.ac_status = 0;
1095 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
1096 tx.tx_h.ac_link = nop_addr;
1097 tx.tx_tbd_offset = tbd_addr;
1098 obram_write(ioaddr, tx_addr, (unsigned char *)&tx, sizeof(tx));
1099
1100 nop.nop_h.ac_status = 0;
1101 nop.nop_h.ac_command = acmd_nop;
1102 nop.nop_h.ac_link = nop_addr;
1103 obram_write(ioaddr, nop_addr, (unsigned char *)&nop, sizeof(nop));
1104
1105 tbd.tbd_status = TBD_STATUS_EOF;
1106 tbd.tbd_next_bd_offset = I82586NULL;
1107 tbd.tbd_bufl = buf_addr;
1108 tbd.tbd_bufh = 0;
1109 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1110 }
1111
1112 first_nop = OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
1113 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), (unsigned char *)&first_nop, sizeof(first_nop));
1114
1115 scb_cs = SCB_CMD_CUC_GO;
1116 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1117
1118 set_chan_attn(ioaddr, lp->hacr);
1119
1120 for (i = 1000; i > 0; i--)
1121 {
1122 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1123 if (scb_cs == 0)
1124 break;
1125
1126 udelay(1000);
1127 }
1128
1129 if (i <= 0)
1130 printk("%s: wavelan_cu_start(): board not accepting command.\n", dev->name);
1131
1132 lp->tx_n_in_use = 0;
1133 dev->tbusy = 0;
1134 }
1135
1136 static
1137 int
1138 wavelan_open(device *dev)
1139 {
1140 unsigned short ioaddr;
1141 net_local *lp;
1142 unsigned long x;
1143 int r;
1144
1145 if (wavelan_debug > 0)
1146 printk("%s: ->wavelan_open(dev=0x%x)\n", dev->name, (unsigned int)dev);
1147
1148 ioaddr = dev->base_addr;
1149 lp = (net_local *)dev->priv;
1150
1151 if (dev->irq == 0)
1152 {
1153 if (wavelan_debug > 0)
1154 printk("%s: <-wavelan_open(): -ENXIO\n", dev->name);
1155 return -ENXIO;
1156 }
1157
1158 if
1159 (
1160 irq2dev_map[dev->irq] != (device *)0
1161
1162 ||
1163 (irq2dev_map[dev->irq] = dev) == (device *)0
1164 ||
1165 request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN") != 0
1166 )
1167 {
1168 irq2dev_map[dev->irq] = (device *)0;
1169 if (wavelan_debug > 0)
1170 printk("%s: <-wavelan_open(): -EAGAIN\n", dev->name);
1171 return -EAGAIN;
1172 }
1173
1174 x = wavelan_splhi();
1175 if ((r = wavelan_hardware_reset(dev)) != -1)
1176 {
1177 dev->interrupt = 0;
1178 dev->start = 1;
1179 }
1180 wavelan_splx(x);
1181
1182 if (r == -1)
1183 {
1184 free_irq(dev->irq);
1185 irq2dev_map[dev->irq] = (device *)0;
1186 if (wavelan_debug > 0)
1187 printk("%s: <-wavelan_open(): -EAGAIN(2)\n", dev->name);
1188 return -EAGAIN;
1189 }
1190
1191 #if defined(MODULE)
1192 MOD_INC_USE_COUNT;
1193 #endif
1194
1195 if (wavelan_debug > 0)
1196 printk("%s: <-wavelan_open(): 0\n", dev->name);
1197
1198 return 0;
1199 }
1200
1201 static
1202 void
1203 hardware_send_packet(device *dev, void *buf, short length)
1204 {
1205 unsigned short ioaddr;
1206 net_local *lp;
1207 unsigned short txblock;
1208 unsigned short txpred;
1209 unsigned short tx_addr;
1210 unsigned short nop_addr;
1211 unsigned short tbd_addr;
1212 unsigned short buf_addr;
1213 ac_tx_t tx;
1214 ac_nop_t nop;
1215 tbd_t tbd;
1216 unsigned long x;
1217
1218 ioaddr = dev->base_addr;
1219 lp = (net_local *)dev->priv;
1220
1221 x = wavelan_splhi();
1222
1223 txblock = lp->tx_first_free;
1224 txpred = txblock - TXBLOCKZ;
1225 if (txpred < OFFSET_CU)
1226 txpred += NTXBLOCKS * TXBLOCKZ;
1227 lp->tx_first_free += TXBLOCKZ;
1228 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1229 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
1230
1231
1232
1233
1234
1235
1236 lp->tx_n_in_use++;
1237
1238 tx_addr = txblock;
1239 nop_addr = tx_addr + sizeof(tx);
1240 tbd_addr = nop_addr + sizeof(nop);
1241 buf_addr = tbd_addr + sizeof(tbd);
1242
1243
1244
1245
1246 tx.tx_h.ac_status = 0;
1247 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), (unsigned char *)&tx.tx_h.ac_status, sizeof(tx.tx_h.ac_status));
1248
1249
1250
1251
1252 nop.nop_h.ac_status = 0;
1253 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1254 nop.nop_h.ac_link = nop_addr;
1255 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1256
1257
1258
1259
1260 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & length);
1261 tbd.tbd_next_bd_offset = I82586NULL;
1262 tbd.tbd_bufl = buf_addr;
1263 tbd.tbd_bufh = 0;
1264 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1265
1266
1267
1268
1269 obram_write(ioaddr, buf_addr, buf, length);
1270
1271
1272
1273
1274
1275 nop_addr = txpred + sizeof(tx);
1276 nop.nop_h.ac_status = 0;
1277 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1278 nop.nop_h.ac_link = txblock;
1279 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1280
1281 if (lp->tx_first_in_use == I82586NULL)
1282 lp->tx_first_in_use = txblock;
1283
1284 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1285 dev->tbusy = 0;
1286
1287 dev->trans_start = jiffies;
1288
1289 if (lp->watchdog.next == (timer_list *)0)
1290 wavelan_watchdog((unsigned long)dev);
1291
1292 wavelan_splx(x);
1293
1294 if (wavelan_debug > 4)
1295 {
1296 unsigned char *a;
1297
1298 a = (unsigned char *)buf;
1299
1300 printk
1301 (
1302 "%s: tx: dest %02x:%02x:%02x:%02x:%02x:%02x, length %d, tbd.tbd_bufl 0x%x.\n",
1303 dev->name,
1304 a[0], a[1], a[2], a[3], a[4], a[5],
1305 length,
1306 buf_addr
1307 );
1308 }
1309 }
1310
1311 static
1312 int
1313 wavelan_send_packet(struct sk_buff *skb, device *dev)
1314 {
1315 unsigned short ioaddr;
1316
1317 ioaddr = dev->base_addr;
1318
1319 if (dev->tbusy)
1320 {
1321
1322
1323
1324
1325 int tickssofar;
1326
1327 tickssofar = jiffies - dev->trans_start;
1328
1329
1330
1331
1332
1333
1334
1335
1336 return 1;
1337
1338 wavelan_scb_show(ioaddr);
1339 wavelan_ru_show(dev);
1340 wavelan_cu_show(dev);
1341 wavelan_dev_show(dev);
1342 wavelan_local_show(dev);
1343
1344 printk("%s: transmit timed out -- resetting board.\n", dev->name);
1345
1346 (void)wavelan_hardware_reset(dev);
1347 }
1348
1349
1350
1351
1352
1353
1354 if (skb == (struct sk_buff *)0)
1355 {
1356 dev_tint(dev);
1357 return 0;
1358 }
1359
1360
1361
1362
1363 if (set_bit(0, (void *)&dev->tbusy) == 0)
1364 {
1365 short length;
1366 unsigned char *buf;
1367
1368 length = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
1369 buf = skb->data;
1370
1371 hardware_send_packet(dev, buf, length);
1372 }
1373 else
1374 printk("%s: Transmitter access conflict.\n", dev->name);
1375
1376 dev_kfree_skb(skb, FREE_WRITE);
1377
1378 return 0;
1379 }
1380
1381 #if 0
1382 static
1383 int
1384 addrcmp(unsigned char *a0, unsigned char *a1)
1385 {
1386 int i;
1387
1388 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1389 {
1390 if (a0[i] != a1[i])
1391 return a0[i] - a1[i];
1392 }
1393
1394 return 0;
1395 }
1396 #endif
1397
1398
1399
1400
1401
1402
1403 static
1404 void
1405 wavelan_receive(device *dev)
1406 {
1407 unsigned short ioaddr;
1408 net_local *lp;
1409 int nreaped;
1410
1411 ioaddr = dev->base_addr;
1412 lp = (net_local *)dev->priv;
1413 nreaped = 0;
1414
1415 for (;;)
1416 {
1417 fd_t fd;
1418 rbd_t rbd;
1419 ushort pkt_len;
1420 int sksize;
1421 struct sk_buff *skb;
1422
1423 obram_read(ioaddr, lp->rx_head, (unsigned char *)&fd, sizeof(fd));
1424
1425 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
1426 break;
1427
1428 nreaped++;
1429
1430 if
1431 (
1432 (fd.fd_status & (FD_STATUS_B | FD_STATUS_OK))
1433 !=
1434 (FD_STATUS_B | FD_STATUS_OK)
1435 )
1436 {
1437
1438
1439
1440
1441
1442
1443
1444 if ((fd.fd_status & FD_STATUS_OK) != FD_STATUS_OK)
1445 printk("%s: frame not received successfully.\n", dev->name);
1446 }
1447
1448 if ((fd.fd_status & (FD_STATUS_S6 | FD_STATUS_S7 | FD_STATUS_S8 | FD_STATUS_S9 | FD_STATUS_S10 | FD_STATUS_S11)) != 0)
1449 {
1450 lp->stats.rx_errors++;
1451
1452 if ((fd.fd_status & FD_STATUS_S6) != 0)
1453 printk("%s: no EOF flag.\n", dev->name);
1454
1455 if ((fd.fd_status & FD_STATUS_S7) != 0)
1456 {
1457 lp->stats.rx_length_errors++;
1458 printk("%s: frame too short.\n", dev->name);
1459 }
1460
1461 if ((fd.fd_status & FD_STATUS_S8) != 0)
1462 {
1463 lp->stats.rx_over_errors++;
1464 printk("%s: rx DMA overrun.\n", dev->name);
1465 }
1466
1467 if ((fd.fd_status & FD_STATUS_S9) != 0)
1468 {
1469 lp->stats.rx_fifo_errors++;
1470 printk("%s: ran out of resources.\n", dev->name);
1471 }
1472
1473 if ((fd.fd_status & FD_STATUS_S10) != 0)
1474 {
1475 lp->stats.rx_frame_errors++;
1476 printk("%s: alignment error.\n", dev->name);
1477 }
1478
1479 if ((fd.fd_status & FD_STATUS_S11) != 0)
1480 {
1481 lp->stats.rx_crc_errors++;
1482 printk("%s: CRC error.\n", dev->name);
1483 }
1484 }
1485
1486 if (fd.fd_rbd_offset == I82586NULL)
1487 printk("%s: frame has no data.\n", dev->name);
1488 else
1489 {
1490 obram_read(ioaddr, fd.fd_rbd_offset, (unsigned char *)&rbd, sizeof(rbd));
1491
1492 if ((rbd.rbd_status & RBD_STATUS_EOF) != RBD_STATUS_EOF)
1493 printk("%s: missing EOF flag.\n", dev->name);
1494
1495 if ((rbd.rbd_status & RBD_STATUS_F) != RBD_STATUS_F)
1496 printk("%s: missing F flag.\n", dev->name);
1497
1498 pkt_len = rbd.rbd_status & RBD_STATUS_ACNT;
1499
1500 #if 0
1501 {
1502 unsigned char addr[WAVELAN_ADDR_SIZE];
1503 int i;
1504 static unsigned char toweraddr[WAVELAN_ADDR_SIZE] =
1505 {
1506 0x08, 0x00, 0x0e, 0x20, 0x3e, 0xd3,
1507 };
1508
1509 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1510 if
1511 (
1512
1513
1514
1515
1516 addrcmp(&addr[0], toweraddr) != 0
1517 )
1518 {
1519 printk("%s: foreign MAC source addr=", dev->name);
1520 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1521 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1522 printk("\n");
1523 }
1524 }
1525 #endif
1526
1527 if (wavelan_debug > 5)
1528 {
1529 unsigned char addr[WAVELAN_ADDR_SIZE];
1530 unsigned short ltype;
1531 int i;
1532
1533 #if 0
1534 printk("%s: fd_dest=", dev->name);
1535 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1536 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_dest[i]);
1537 printk("\n");
1538
1539 printk("%s: fd_src=", dev->name);
1540 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1541 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_src[i]);
1542 printk("\n");
1543 printk("%s: fd_length=%d\n", dev->name, fd.fd_length);
1544 #endif
1545
1546 obram_read(ioaddr, rbd.rbd_bufl, &addr[0], sizeof(addr));
1547 printk("%s: dest=", dev->name);
1548 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1549 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1550 printk("\n");
1551
1552 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1553 printk("%s: src=", dev->name);
1554 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1555 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1556 printk("\n");
1557
1558 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr) * 2, (unsigned char *)<ype, sizeof(ltype));
1559 printk("%s: ntohs(length/type)=0x%04x\n", dev->name, ntohs(ltype));
1560 }
1561
1562 sksize = pkt_len;
1563
1564 if ((skb = alloc_skb(sksize, GFP_ATOMIC)) == (struct sk_buff *)0)
1565 {
1566 printk("%s: could not alloc_skb(%d, GFP_ATOMIC).\n", dev->name, sksize);
1567 lp->stats.rx_dropped++;
1568 }
1569 else
1570 {
1571 skb->len = pkt_len;
1572 skb->dev = dev;
1573
1574 obram_read(ioaddr, rbd.rbd_bufl, skb->data, pkt_len);
1575
1576 if (wavelan_debug > 5)
1577 {
1578 int i;
1579 int maxi;
1580
1581 printk("%s: pkt_len=%d, data=\"", dev->name, pkt_len);
1582
1583 if ((maxi = pkt_len) > 16)
1584 maxi = 16;
1585
1586 for (i = 0; i < maxi; i++)
1587 {
1588 unsigned char c;
1589
1590 c = skb->data[i];
1591 if (c >= ' ' && c <= '~')
1592 printk(" %c", skb->data[i]);
1593 else
1594 printk("%02x", skb->data[i]);
1595 }
1596
1597 if (maxi < pkt_len)
1598 printk("..");
1599
1600 printk("\"\n\n");
1601 }
1602
1603 skb->protocol=eth_type_trans(skb,dev);
1604 netif_rx(skb);
1605
1606 lp->stats.rx_packets++;
1607 }
1608 }
1609
1610 fd.fd_status = 0;
1611 obram_write(ioaddr, fdoff(lp->rx_head, fd_status), (unsigned char *)&fd.fd_status, sizeof(fd.fd_status));
1612
1613 fd.fd_command = FD_COMMAND_EL;
1614 obram_write(ioaddr, fdoff(lp->rx_head, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1615
1616 fd.fd_command = 0;
1617 obram_write(ioaddr, fdoff(lp->rx_last, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1618
1619 lp->rx_last = lp->rx_head;
1620 lp->rx_head = fd.fd_link_offset;
1621 }
1622
1623
1624
1625
1626
1627 }
1628
1629
1630
1631
1632
1633 static
1634 int
1635 wavelan_complete(device *dev, unsigned short ioaddr, net_local *lp)
1636 {
1637 int nreaped;
1638
1639 nreaped = 0;
1640
1641 for (;;)
1642 {
1643 unsigned short tx_status;
1644
1645 if (lp->tx_first_in_use == I82586NULL)
1646 break;
1647
1648 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), (unsigned char *)&tx_status, sizeof(tx_status));
1649
1650 if ((tx_status & AC_SFLD_C) == 0)
1651 break;
1652
1653 nreaped++;
1654
1655 --lp->tx_n_in_use;
1656
1657
1658
1659
1660
1661
1662 if (lp->tx_n_in_use <= 0)
1663 lp->tx_first_in_use = I82586NULL;
1664 else
1665 {
1666 lp->tx_first_in_use += TXBLOCKZ;
1667 if (lp->tx_first_in_use >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1668 lp->tx_first_in_use -= NTXBLOCKS * TXBLOCKZ;
1669 }
1670
1671 if (tx_status & AC_SFLD_OK)
1672 {
1673 int ncollisions;
1674
1675 lp->stats.tx_packets++;
1676 ncollisions = tx_status & AC_SFLD_MAXCOL;
1677 lp->stats.collisions += ncollisions;
1678
1679
1680
1681
1682 }
1683 else
1684 {
1685 lp->stats.tx_errors++;
1686 if (tx_status & AC_SFLD_S10)
1687 {
1688 lp->stats.tx_carrier_errors++;
1689 if (wavelan_debug > 0)
1690 printk("%s: tx error: no CS.\n", dev->name);
1691 }
1692 if (tx_status & AC_SFLD_S9)
1693 {
1694 lp->stats.tx_carrier_errors++;
1695 printk("%s: tx error: lost CTS.\n", dev->name);
1696 }
1697 if (tx_status & AC_SFLD_S8)
1698 {
1699 lp->stats.tx_fifo_errors++;
1700 printk("%s: tx error: slow DMA.\n", dev->name);
1701 }
1702 if (tx_status & AC_SFLD_S6)
1703 {
1704 lp->stats.tx_heartbeat_errors++;
1705 if (wavelan_debug > 0)
1706 printk("%s: tx error: heart beat.\n", dev->name);
1707 }
1708 if (tx_status & AC_SFLD_S5)
1709 {
1710 lp->stats.tx_aborted_errors++;
1711 if (wavelan_debug > 0)
1712 printk("%s: tx error: too many collisions.\n", dev->name);
1713 }
1714 }
1715
1716 if (wavelan_debug > 5)
1717 printk("%s: tx completed, tx_status 0x%04x.\n", dev->name, tx_status);
1718 }
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1729 {
1730 dev->tbusy = 0;
1731 mark_bh(NET_BH);
1732 }
1733
1734 return nreaped;
1735 }
1736
1737 static
1738 void
1739 wavelan_watchdog(unsigned long a)
1740 {
1741 device *dev;
1742 net_local *lp;
1743 unsigned short ioaddr;
1744 unsigned long x;
1745 unsigned int nreaped;
1746
1747 x = wavelan_splhi();
1748
1749 dev = (device *)a;
1750 ioaddr = dev->base_addr;
1751 lp = (net_local *)dev->priv;
1752
1753 if (lp->tx_n_in_use <= 0)
1754 {
1755 wavelan_splx(x);
1756 return;
1757 }
1758
1759 lp->watchdog.expires = WATCHDOG_JIFFIES;
1760 add_timer(&lp->watchdog);
1761
1762 if (jiffies - dev->trans_start < WATCHDOG_JIFFIES)
1763 {
1764 wavelan_splx(x);
1765 return;
1766 }
1767
1768 nreaped = wavelan_complete(dev, ioaddr, lp);
1769
1770 printk("%s: warning: wavelan_watchdog(): %d reaped, %d remain.\n", dev->name, nreaped, lp->tx_n_in_use);
1771
1772
1773
1774
1775
1776
1777
1778
1779 wavelan_splx(x);
1780 }
1781
1782 static
1783 void
1784 wavelan_interrupt(int irq, struct pt_regs *regs)
1785 {
1786 device *dev;
1787 unsigned short ioaddr;
1788 net_local *lp;
1789 unsigned short hasr;
1790 unsigned short status;
1791 unsigned short ack_cmd;
1792
1793 if ((dev = (device *)(irq2dev_map[irq])) == (device *)0)
1794 {
1795 printk("wavelan_interrupt(): irq %d for unknown device.\n", irq);
1796 return;
1797 }
1798
1799 ioaddr = dev->base_addr;
1800 lp = (net_local *)dev->priv;
1801
1802 dev->interrupt = 1;
1803
1804 if ((hasr = hasr_read(ioaddr)) & HASR_MMC_INTR)
1805 {
1806 unsigned char dce_status;
1807
1808
1809
1810
1811
1812 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, sizeof(dce_status));
1813 if (wavelan_debug > 0)
1814 printk("%s: warning: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", dev->name, dce_status);
1815 }
1816
1817 if ((hasr & HASR_82586_INTR) == 0)
1818 {
1819 dev->interrupt = 0;
1820 if (wavelan_debug > 0)
1821 printk("%s: warning: wavelan_interrupt() but (hasr & HASR_82586_INTR) == 0.\n", dev->name);
1822 return;
1823 }
1824
1825 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&status, sizeof(status));
1826
1827
1828
1829
1830 ack_cmd = status & SCB_ST_INT;
1831
1832 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&ack_cmd, sizeof(ack_cmd));
1833
1834 set_chan_attn(ioaddr, lp->hacr);
1835
1836 if (wavelan_debug > 5)
1837 printk("%s: interrupt, status 0x%04x.\n", dev->name, status);
1838
1839 if ((status & SCB_ST_CX) == SCB_ST_CX)
1840 {
1841
1842
1843
1844 if (wavelan_debug > 5)
1845 printk("%s: command completed.\n", dev->name);
1846 (void)wavelan_complete(dev, ioaddr, lp);
1847 }
1848
1849 if ((status & SCB_ST_FR) == SCB_ST_FR)
1850 {
1851
1852
1853
1854 if (wavelan_debug > 5)
1855 printk("%s: received packet.\n", dev->name);
1856 wavelan_receive(dev);
1857 }
1858
1859 if
1860 (
1861 (status & SCB_ST_CNA) == SCB_ST_CNA
1862 ||
1863 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && dev->start)
1864 )
1865 {
1866 printk("%s: warning: CU inactive -- restarting.\n", dev->name);
1867
1868 (void)wavelan_hardware_reset(dev);
1869 }
1870
1871 if
1872 (
1873 (status & SCB_ST_RNR) == SCB_ST_RNR
1874 ||
1875 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && dev->start)
1876 )
1877 {
1878 printk("%s: warning: RU not ready -- restarting.\n", dev->name);
1879
1880 (void)wavelan_hardware_reset(dev);
1881 }
1882
1883 dev->interrupt = 0;
1884 }
1885
1886 static
1887 int
1888 wavelan_close(device *dev)
1889 {
1890 unsigned short ioaddr;
1891 net_local *lp;
1892 unsigned short scb_cmd;
1893
1894 if (wavelan_debug > 0)
1895 printk("%s: ->wavelan_close(dev=0x%x)\n", dev->name, (unsigned int)dev);
1896
1897 ioaddr = dev->base_addr;
1898 lp = (net_local *)dev->priv;
1899
1900 dev->tbusy = 1;
1901 dev->start = 0;
1902
1903
1904
1905
1906 scb_cmd = (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & SCB_CMD_RUC_SUS);
1907 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
1908 set_chan_attn(ioaddr, lp->hacr);
1909
1910 wavelan_ints_off(dev);
1911
1912 free_irq(dev->irq);
1913 irq2dev_map[dev->irq] = (device *)0;
1914
1915
1916
1917
1918 release_region(ioaddr, sizeof(ha_t));
1919
1920 #if defined(MODULE)
1921 MOD_DEC_USE_COUNT;
1922 #endif
1923
1924 if (wavelan_debug > 0)
1925 printk("%s: <-wavelan_close(): 0\n", dev->name);
1926
1927 return 0;
1928 }
1929
1930
1931
1932
1933
1934 static
1935 en_stats *
1936 wavelan_get_stats(device *dev)
1937 {
1938 net_local *lp;
1939
1940 lp = (net_local *)dev->priv;
1941
1942 return &lp->stats;
1943 }
1944
1945 static
1946 void
1947 wavelan_set_multicast_list(device *dev, int num_addrs, void *addrs)
1948 {
1949 net_local *lp;
1950 unsigned long x;
1951
1952 if (wavelan_debug > 0)
1953 printk("%s: ->wavelan_set_multicast_list(dev=0x%x, num_addrs=%d, addrs=0x%x)\n", dev->name, (unsigned int)dev, num_addrs, (unsigned int)addrs);
1954
1955 lp = (net_local *)dev->priv;
1956
1957 switch (num_addrs)
1958 {
1959 case -1:
1960
1961
1962
1963 lp->promiscuous = 1;
1964 x = wavelan_splhi();
1965 (void)wavelan_hardware_reset(dev);
1966 wavelan_splx(x);
1967 break;
1968
1969 case 0:
1970
1971
1972
1973
1974 lp->promiscuous = 0;
1975 x = wavelan_splhi();
1976 (void)wavelan_hardware_reset(dev);
1977 wavelan_splx(x);
1978 break;
1979
1980 default:
1981
1982
1983
1984
1985 break;
1986 }
1987
1988 if (wavelan_debug > 0)
1989 printk("%s: <-wavelan_set_multicast_list()\n", dev->name);
1990 }
1991
1992
1993
1994
1995
1996 static
1997 int
1998 sprintf_stats(char *buffer, device *dev)
1999 {
2000 net_local *lp;
2001 unsigned char v;
2002 mmr_t m;
2003
2004 lp = (net_local *)dev->priv;
2005
2006 if (lp == (net_local *)0)
2007 return sprintf(buffer, "%6s: No statistics available.\n", dev->name);
2008
2009 v = (unsigned char)1;
2010 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2011
2012 mmc_read(dev->base_addr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, sizeof(m.mmr_dce_status));
2013 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_h), &m.mmr_correct_nwid_h, sizeof(m.mmr_correct_nwid_h));
2014 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_l), &m.mmr_correct_nwid_l, sizeof(m.mmr_correct_nwid_l));
2015 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_h), &m.mmr_wrong_nwid_h, sizeof(m.mmr_wrong_nwid_h));
2016 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, sizeof(m.mmr_wrong_nwid_l));
2017 mmc_read(dev->base_addr, mmroff(0, mmr_signal_lvl), &m.mmr_signal_lvl, sizeof(m.mmr_signal_lvl));
2018 mmc_read(dev->base_addr, mmroff(0, mmr_silence_lvl), &m.mmr_silence_lvl, sizeof(m.mmr_silence_lvl));
2019 mmc_read(dev->base_addr, mmroff(0, mmr_sgnl_qual), &m.mmr_sgnl_qual, sizeof(m.mmr_sgnl_qual));
2020
2021 v = (unsigned char)0;
2022 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2023
2024 lp->correct_nwid += (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l;
2025 lp->wrong_nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2026
2027 return sprintf
2028 (
2029 buffer,
2030 "%6s: %02x %08x %08x %02x %02x %02x %02x %u\n",
2031 dev->name,
2032 m.mmr_dce_status,
2033 lp->correct_nwid,
2034 lp->wrong_nwid,
2035 m.mmr_signal_lvl,
2036 m.mmr_silence_lvl,
2037 m.mmr_sgnl_qual,
2038 lp->tx_n_in_use,
2039 lp->nresets
2040 );
2041 }
2042
2043 int
2044 wavelan_get_info(char *buffer, char **start, off_t offset, int length)
2045 {
2046 int len;
2047 off_t begin;
2048 off_t pos;
2049 int size;
2050 unsigned long x;
2051
2052 len = 0;
2053 begin = 0;
2054 pos = 0;
2055
2056 size = sprintf(buffer, "%s", "Iface | dce +nwid -nwid lvl slnc qual ntxq nrst\n");
2057
2058 pos += size;
2059 len += size;
2060
2061 x = wavelan_splhi();
2062
2063 if (first_wavelan != (net_local *)0)
2064 {
2065 net_local *lp;
2066
2067 lp = first_wavelan;
2068 do
2069 {
2070 size = sprintf_stats(buffer + len, lp->dev);
2071
2072 len += size;
2073 pos = begin + len;
2074
2075 if (pos < offset)
2076 {
2077 len = 0;
2078 begin = pos;
2079 }
2080
2081 if (pos > offset + length)
2082 break;
2083 }
2084 while ((lp = lp->next) != first_wavelan);
2085 }
2086
2087 wavelan_splx(x);
2088
2089 *start = buffer + (offset - begin);
2090 len -= (offset - begin);
2091 if (len > length)
2092 len = length;
2093
2094 return len;
2095 }
2096
2097 #if defined(MODULE)
2098 char kernel_version[] = UTS_RELEASE;
2099 static struct device dev_wavelan =
2100 {
2101 " " ,
2102 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, wavelan_probe
2103 };
2104
2105 int
2106 init_module(void)
2107 {
2108 if (register_netdev(&dev_wavelan) != 0)
2109 return -EIO;
2110 return 0;
2111 }
2112
2113 void
2114 cleanup_module(void)
2115 {
2116 if (MOD_IN_USE)
2117 printk("wavelan: device busy, remove delayed\n");
2118 else
2119 {
2120 unregister_netdev(&dev_wavelan);
2121 kfree_s(dev_wavelan.priv, sizeof(struct net_local));
2122 dev_wavelan.priv = NULL;
2123 }
2124 }
2125 #endif
2126
2127 static
2128 void
2129 wavelan_cu_show_one(device *dev, net_local *lp, int i, unsigned short p)
2130 {
2131 unsigned short ioaddr;
2132 ac_tx_t actx;
2133
2134 ioaddr = dev->base_addr;
2135
2136 printk("%d: 0x%x:", i, p);
2137
2138 obram_read(ioaddr, p, (unsigned char *)&actx, sizeof(actx));
2139 printk(" status=0x%x,", actx.tx_h.ac_status);
2140 printk(" command=0x%x,", actx.tx_h.ac_command);
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151 printk("|");
2152 }
2153
2154 #if 0
2155 static
2156 void
2157 wavelan_psa_show(psa_t *p)
2158 {
2159 printk("psa:");
2160
2161 printk("psa_io_base_addr_1: 0x%02x,", p->psa_io_base_addr_1);
2162 printk("psa_io_base_addr_2: 0x%02x,", p->psa_io_base_addr_2);
2163 printk("psa_io_base_addr_3: 0x%02x,", p->psa_io_base_addr_3);
2164 printk("psa_io_base_addr_4: 0x%02x,", p->psa_io_base_addr_4);
2165 printk("psa_rem_boot_addr_1: 0x%02x,", p->psa_rem_boot_addr_1);
2166 printk("psa_rem_boot_addr_2: 0x%02x,", p->psa_rem_boot_addr_2);
2167 printk("psa_rem_boot_addr_3: 0x%02x,", p->psa_rem_boot_addr_3);
2168 printk("psa_holi_params: 0x%02x,", p->psa_holi_params);
2169 printk("psa_int_req_no: %d,", p->psa_int_req_no);
2170 printk
2171 (
2172 "psa_univ_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2173 p->psa_univ_mac_addr[0],
2174 p->psa_univ_mac_addr[1],
2175 p->psa_univ_mac_addr[2],
2176 p->psa_univ_mac_addr[3],
2177 p->psa_univ_mac_addr[4],
2178 p->psa_univ_mac_addr[5]
2179 );
2180 printk
2181 (
2182 "psa_local_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2183 p->psa_local_mac_addr[0],
2184 p->psa_local_mac_addr[1],
2185 p->psa_local_mac_addr[2],
2186 p->psa_local_mac_addr[3],
2187 p->psa_local_mac_addr[4],
2188 p->psa_local_mac_addr[5]
2189 );
2190 printk("psa_univ_local_sel: %d,", p->psa_univ_local_sel);
2191 printk("psa_comp_number: %d,", p->psa_comp_number);
2192 printk("psa_thr_pre_set: 0x%02x,", p->psa_thr_pre_set);
2193 printk("psa_feature_select/decay_prm: 0x%02x,", p->psa_feature_select);
2194 printk("psa_subband/decay_update_prm: %d,", p->psa_subband);
2195 printk("psa_quality_thr: 0x%02x,", p->psa_quality_thr);
2196 printk("psa_mod_delay: 0x%02x,", p->psa_mod_delay);
2197 printk("psa_nwid: 0x%02x%02x,", p->psa_nwid[0], p->psa_nwid[1]);
2198 printk("psa_undefined: %d,", p->psa_undefined);
2199 printk("psa_encryption_select: %d,", p->psa_encryption_select);
2200 printk
2201 (
2202 "psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x,",
2203 p->psa_encryption_key[0],
2204 p->psa_encryption_key[1],
2205 p->psa_encryption_key[2],
2206 p->psa_encryption_key[3],
2207 p->psa_encryption_key[4],
2208 p->psa_encryption_key[5],
2209 p->psa_encryption_key[6],
2210 p->psa_encryption_key[7]
2211 );
2212 printk("psa_databus_width: %d,", p->psa_databus_width);
2213 printk("psa_call_code/auto_squelch: 0x%02x,", p->psa_call_code);
2214 printk("psa_no_of_retries: %d,", p->psa_no_of_retries);
2215 printk("psa_acr: %d,", p->psa_acr);
2216 printk("psa_dump_count: %d,", p->psa_dump_count);
2217 printk("psa_nwid_prefix: 0x%02x,", p->psa_nwid_prefix);
2218 printk("psa_conf_status: %d,", p->psa_conf_status);
2219 printk("psa_crc: 0x%02x%02x,", p->psa_crc[0], p->psa_crc[1]);
2220 printk("psa_crc_status: 0x%02x,", p->psa_crc_status);
2221
2222 printk("\n");
2223 }
2224
2225 static
2226 void
2227 wavelan_mmc_show(unsigned short ioaddr)
2228 {
2229 mmr_t m;
2230
2231 mmc_read(ioaddr, 0, (unsigned char *)&m, sizeof(m));
2232
2233 printk("mmr:");
2234 printk(" des_status: 0x%x", m.mmr_des_status);
2235 printk(" des_avail: 0x%x", m.mmr_des_avail);
2236 printk(" des_io_invert: 0x%x", m.mmr_des_io_invert);
2237 printk
2238 (
2239 " dce_status: 0x%x[%s%s%s%s]",
2240 m.mmr_dce_status & 0x0F,
2241 (m.mmr_dce_status & MMR_DCE_STATUS_ENERG_DET) ? "energy detected," : "",
2242 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? "loop test indicated," : "",
2243 (m.mmr_dce_status & MMR_DCE_STATUS_XMTITR_IND) ? "transmitter on," : "",
2244 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? "jabber timer expired," : ""
2245 );
2246 printk(" correct_nwid: %d", m.mmr_correct_nwid_h << 8 | m.mmr_correct_nwid_l);
2247 printk(" wrong_nwid: %d", (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
2248 printk(" thr_pre_set: 0x%x", m.mmr_thr_pre_set);
2249 printk(" signal_lvl: %d", m.mmr_signal_lvl);
2250 printk(" silence_lvl: %d", m.mmr_silence_lvl);
2251 printk(" sgnl_qual: 0x%x", m.mmr_sgnl_qual);
2252 printk(" netw_id_l: %x", m.mmr_netw_id_l);
2253
2254 printk("\n");
2255 }
2256 #endif
2257
2258 static
2259 void
2260 wavelan_scb_show(unsigned short ioaddr)
2261 {
2262 scb_t scb;
2263
2264 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
2265
2266 printk("scb:");
2267
2268 printk(" status:");
2269 printk
2270 (
2271 " stat 0x%x[%s%s%s%s]",
2272 (scb.scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | SCB_ST_RNR)) >> 12,
2273 (scb.scb_status & SCB_ST_CX) ? "cmd completion interrupt," : "",
2274 (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
2275 (scb.scb_status & SCB_ST_CNA) ? "cmd unit not active," : "",
2276 (scb.scb_status & SCB_ST_RNR) ? "rcv unit not ready," : ""
2277 );
2278 printk
2279 (
2280 " cus 0x%x[%s%s%s]",
2281 (scb.scb_status & SCB_ST_CUS) >> 8,
2282 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_IDLE) ? "idle" : "",
2283 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_SUSP) ? "suspended" : "",
2284 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_ACTV) ? "active" : ""
2285 );
2286 printk
2287 (
2288 " rus 0x%x[%s%s%s%s]",
2289 (scb.scb_status & SCB_ST_RUS) >> 4,
2290 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_IDLE) ? "idle" : "",
2291 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_SUSP) ? "suspended" : "",
2292 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_NRES) ? "no resources" : "",
2293 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_RDY) ? "ready" : ""
2294 );
2295
2296 printk(" command:");
2297 printk
2298 (
2299 " ack 0x%x[%s%s%s%s]",
2300 (scb.scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
2301 (scb.scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
2302 (scb.scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
2303 (scb.scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
2304 (scb.scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""
2305 );
2306 printk
2307 (
2308 " cuc 0x%x[%s%s%s%s%s]",
2309 (scb.scb_command & SCB_CMD_CUC) >> 8,
2310 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_NOP) ? "nop" : "",
2311 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
2312 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_RES) ? "resume execution" : "",
2313 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_SUS) ? "suspend execution" : "",
2314 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_ABT) ? "abort execution" : ""
2315 );
2316 printk
2317 (
2318 " ruc 0x%x[%s%s%s%s%s]",
2319 (scb.scb_command & SCB_CMD_RUC) >> 4,
2320 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_NOP) ? "nop" : "",
2321 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
2322 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_RES) ? "resume reception" : "",
2323 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_SUS) ? "suspend reception" : "",
2324 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_ABT) ? "abort reception" : ""
2325 );
2326
2327 printk(" cbl_offset 0x%x", scb.scb_cbl_offset);
2328 printk(" rfa_offset 0x%x", scb.scb_rfa_offset);
2329
2330 printk(" crcerrs %d", scb.scb_crcerrs);
2331 printk(" alnerrs %d", scb.scb_alnerrs);
2332 printk(" rscerrs %d", scb.scb_rscerrs);
2333 printk(" ovrnerrs %d", scb.scb_ovrnerrs);
2334
2335 printk("\n");
2336 }
2337
2338 static
2339 void
2340 wavelan_ru_show(device *dev)
2341 {
2342 net_local *lp;
2343
2344 lp = (net_local *)dev->priv;
2345
2346 printk("ru:");
2347
2348
2349
2350 printk("\n");
2351 }
2352
2353 static
2354 void
2355 wavelan_cu_show(device *dev)
2356 {
2357 net_local *lp;
2358 unsigned int i;
2359 unsigned short p;
2360
2361 lp = (net_local *)dev->priv;
2362
2363 printk("cu:");
2364 printk("\n");
2365
2366 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++)
2367 {
2368 wavelan_cu_show_one(dev, lp, i, p);
2369
2370 p += TXBLOCKZ;
2371 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2372 p -= NTXBLOCKS * TXBLOCKZ;
2373 }
2374 }
2375
2376 static
2377 void
2378 wavelan_dev_show(device *dev)
2379 {
2380 printk("dev:");
2381 printk(" start=%d,", dev->start);
2382 printk(" tbusy=%d,", dev->tbusy);
2383 printk(" interrupt=%d,", dev->interrupt);
2384 printk(" trans_start=%ld,", dev->trans_start);
2385 printk(" flags=0x%x,", dev->flags);
2386 printk("\n");
2387 }
2388
2389 static
2390 void
2391 wavelan_local_show(device *dev)
2392 {
2393 net_local *lp;
2394
2395 lp = (net_local *)dev->priv;
2396
2397 printk("local:");
2398 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
2399 printk(" hacr=0x%x,", lp->hacr);
2400 printk(" rx_head=0x%x,", lp->rx_head);
2401 printk(" rx_last=0x%x,", lp->rx_last);
2402 printk(" tx_first_free=0x%x,", lp->tx_first_free);
2403 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
2404 printk("\n");
2405 }
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2448 #endif