root/drivers/scsi/aic7xxx.c

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DEFINITIONS

This source file includes following definitions.
  1. debug
  2. debug_config
  3. debug_scb
  4. aic7xxx_setup
  5. aic7xxx_loadseq
  6. aic7xxx_delay
  7. aic7xxx_poll_scb
  8. aic7xxx_scb_timeout
  9. aic7xxx_scb_untimeout
  10. aic7xxx_scb_tsleep
  11. rcs_version
  12. aic7xxx_info
  13. aic7xxx_length
  14. aic7xxx_scsirate
  15. aic7xxx_putscb
  16. aic7xxx_putscb_dma
  17. aic7xxx_getscb
  18. aic7xxx_match_scb
  19. aic7xxx_unbusy_target
  20. aic7xxx_done
  21. aic7xxx_add_waiting_scb
  22. aic7xxx_abort_waiting_scb
  23. aic7xxx_reset_device
  24. aic7xxx_reset_current_bus
  25. aic7xxx_reset_channel
  26. aic7xxx_isr
  27. aic7xxx_probe
  28. read_seeprom
  29. detect_maxscb
  30. aic7xxx_register
  31. aic7xxx_detect
  32. aic7xxx_buildscb
  33. aic7xxx_queue
  34. aic7xxx_abort_scb
  35. aic7xxx_abort
  36. aic7xxx_reset
  37. aic7xxx_biosparam
   1 /*+M*************************************************************************
   2  * Adaptec 274x/284x/294x device driver for Linux.
   3  *
   4  * Copyright (c) 1994 John Aycock
   5  *   The University of Calgary Department of Computer Science.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2, or (at your option)
  10  * any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; see the file COPYING.  If not, write to
  19  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  20  *
  21  * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F
  22  * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA
  23  * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide,
  24  * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux,
  25  * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file
  26  * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual,
  27  * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the
  28  * ANSI SCSI-2 specification (draft 10c), ...
  29  *
  30  * ----------------------------------------------------------------
  31  *  Modified to include support for wide and twin bus adapters,
  32  *  DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes,
  33  *  and other rework of the code.
  34  *
  35  *  Parts of this driver are based on the FreeBSD driver by Justin
  36  *  T. Gibbs.
  37  *
  38  *  A Boot time option was also added for not resetting the scsi bus.
  39  *
  40  *    Form:  aic7xxx=extended,no_reset
  41  *
  42  *    -- Daniel M. Eischen, deischen@iworks.InterWorks.org, 04/03/95
  43  *
  44  *  $Id: aic7xxx.c,v 2.5 1995/09/20 05:18:18 deang Exp $
  45  *-M*************************************************************************/
  46 
  47 #ifdef MODULE
  48 #include <linux/module.h>
  49 #endif
  50 
  51 #include <stdarg.h>
  52 #include <asm/io.h>
  53 #include <linux/string.h>
  54 #include <linux/errno.h>
  55 #include <linux/kernel.h>
  56 #include <linux/ioport.h>
  57 #include <linux/bios32.h>
  58 #include <linux/delay.h>
  59 #include <linux/sched.h>
  60 #include <linux/pci.h>
  61 #include <linux/proc_fs.h>
  62 #include <linux/blk.h>
  63 #include "sd.h"
  64 #include "scsi.h"
  65 #include "hosts.h"
  66 #include "aic7xxx.h"
  67 #include<linux/stat.h>
  68 
  69 struct proc_dir_entry proc_scsi_aic7xxx = {
  70     PROC_SCSI_AIC7XXX, 7, "aic7xxx",
  71     S_IFDIR | S_IRUGO | S_IXUGO, 2
  72 };
  73 
  74 #define AIC7XXX_C_VERSION  "$Revision: 2.5 $"
  75 
  76 #define NUMBER(arr)     (sizeof(arr) / sizeof(arr[0]))
  77 #define MIN(a,b)        ((a < b) ? a : b)
  78 #define ALL_TARGETS -1
  79 #ifndef TRUE
  80 #  define TRUE 1
  81 #endif
  82 #ifndef FALSE
  83 #  define FALSE 0
  84 #endif
  85 
  86 /*
  87  * Defines for PCI bus support, testing twin bus support, DMAing of
  88  * SCBs, tagged queueing, commands (SCBs) per lun, and SCSI bus reset
  89  * delay time.
  90  *
  91  *   o PCI bus support - this has been implemented and working since
  92  *     the December 1, 1994 release of this driver. If you don't have
  93  *     a PCI bus and do not wish to configure your kernel with PCI
  94  *     support, then make sure this define is set to the cprrect
  95  *     define for PCI support (CONFIG_PCI) and configure your kernel
  96  *     without PCI support (make config).
  97  *
  98  *   o Twin bus support - this has been tested and does work.
  99  *
 100  *   o DMAing of SCBs - thanks to Kai Makisara, this now works.
 101  *     This define is now taken out and DMAing of SCBs is always
 102  *     performed (8/12/95 - DE).
 103  *
 104  *   o Tagged queueing - this driver is capable of tagged queueing
 105  *     but I am unsure as to how well the higher level driver implements
 106  *     tagged queueing. Therefore, the maximum commands per lun is
 107  *     set to 2. If you want to implement tagged queueing, ensure
 108  *     this define is not commented out.
 109  *
 110  *   o Sharing IRQs - allowed for sharing of IRQs. This will allow
 111  *     for multiple aic7xxx host adapters sharing the same IRQ, but
 112  *     not for sharing IRQs with other devices. The higher level
 113  *     PCI code and interrupt handling needs to be modified to
 114  *     support this.
 115  *
 116  *   o Commands per lun - If tagged queueing is enabled, then you
 117  *     may want to try increasing AIC7XXX_CMDS_PER_LUN to more
 118  *     than 2.  By default, we limit the SCBs per lun to 2 with
 119  *     or without tagged queueing enabled.  If tagged queueing is
 120  *     disabled, the sequencer will keep the 2nd SCB in the input
 121  *     queue until the first one completes - so it is OK to to have
 122  *     more than 1 SCB queued.  If tagged queueing is enabled, then
 123  *     the sequencer will attempt to send the 2nd SCB to the device
 124  *     while the first SCB is executing and the device is disconnected.
 125  *     For adapters limited to 4 SCBs, you may want to actually
 126  *     decrease the commands per lun to 1, if you often have more
 127  *     than 2 devices active at the same time.  This will allocate
 128  *     1 SCB for each device and ensure that there will always be
 129  *     a free SCB for up to 4 devices active at the same time.
 130  *
 131  *  Daniel M. Eischen, deischen@iworks.InterWorks.org, 03/11/95
 132  */
 133 
 134 /* Uncomment this for testing twin bus support. */
 135 #define AIC7XXX_TWIN_SUPPORT
 136 
 137 /* Uncomment this for tagged queueing. */
 138 /* #define AIC7XXX_TAGGED_QUEUEING */
 139 
 140 /* Uncomment this for allowing sharing of IRQs. */
 141 #define AIC7XXX_SHARE_IRQS
 142 
 143 /*
 144  * You can try raising me if tagged queueing is enabled, or lowering
 145  * me if you only have 4 SCBs.
 146  */
 147 #define AIC7XXX_CMDS_PER_LUN 2
 148 
 149 /* Set this to the delay in seconds after SCSI bus reset. */
 150 #define AIC7XXX_RESET_DELAY 15
 151 
 152 /*
 153  * Uncomment the following define for collection of SCSI transfer statistics
 154  * for the /proc filesystem.
 155  *
 156  * NOTE: This does affect performance since it has to maintain statistics.
 157  */
 158 /* #define AIC7XXX_PROC_STATS */
 159 
 160 /*
 161  * Define this to use polling rather than using kernel support for waking
 162  * up a waiting process.
 163  */
 164 #undef AIC7XXX_POLL
 165 
 166 /*
 167  * Controller type and options
 168  */
 169 typedef enum {
 170   AIC_NONE,
 171   AIC_274x,    /* EISA aic7770 */
 172   AIC_284x,    /* VLB  aic7770 */
 173   AIC_7870,    /* PCI  aic7870 */
 174   AIC_7850,    /* PCI  aic7850 */
 175   AIC_7872     /* PCI  aic7870 on 394x */
 176 } aha_type;
 177 
 178 typedef enum {
 179   AIC_SINGLE,  /* Single Channel */
 180   AIC_TWIN,    /* Twin Channel */
 181   AIC_WIDE     /* Wide Channel */
 182 } aha_bus_type;
 183 
 184 typedef enum {
 185   AIC_UNKNOWN,
 186   AIC_ENABLED,
 187   AIC_DISABLED
 188 } aha_status_type;
 189 
 190 typedef enum {
 191   LIST_HEAD,
 192   LIST_SECOND,
 193   LIST_TAIL
 194 } insert_type;
 195 
 196 /*
 197  * There should be a specific return value for this in scsi.h, but
 198  * it seems that most drivers ignore it.
 199  */
 200 #define DID_UNDERFLOW   DID_ERROR
 201 
 202 /*
 203  *  What we want to do is have the higher level scsi driver requeue
 204  *  the command to us. There is no specific driver status for this
 205  *  condition, but the higher level scsi driver will requeue the
 206  *  command on a DID_BUS_BUSY error.
 207  */
 208 #define DID_RETRY_COMMAND DID_BUS_BUSY
 209 
 210 /*
 211  * EISA/VL-bus stuff
 212  */
 213 #define MINSLOT         1
 214 #define MAXSLOT         15
 215 #define SLOTBASE(x)     ((x) << 12)
 216 #define MAXIRQ          15
 217 
 218 /*
 219  * Standard EISA Host ID regs  (Offset from slot base)
 220  */
 221 #define HID0(x)         ((x) + 0xC80)   /* 0,1: msb of ID2, 2-7: ID1      */
 222 #define HID1(x)         ((x) + 0xC81)   /* 0-4: ID3, 5-7: LSB ID2         */
 223 #define HID2(x)         ((x) + 0xC82)   /* product                        */
 224 #define HID3(x)         ((x) + 0xC83)   /* firmware revision              */
 225 
 226 /*
 227  * AIC-7770 I/O range to reserve for a card
 228  */
 229 #define MINREG(x)       ((x) + 0xC00ul)
 230 #define MAXREG(x)       ((x) + 0xCBFul)
 231 
 232 /* -------------------- AIC-7770 offset definitions ----------------------- */
 233 
 234 /*
 235  * SCSI Sequence Control (p. 3-11).
 236  * Each bit, when set starts a specific SCSI sequence on the bus
 237  */
 238 #define SCSISEQ(x)              ((x) + 0xC00ul)
 239 #define         TEMODEO         0x80
 240 #define         ENSELO          0x40
 241 #define         ENSELI          0x20
 242 #define         ENRSELI         0x10
 243 #define         ENAUTOATNO      0x08
 244 #define         ENAUTOATNI      0x04
 245 #define         ENAUTOATNP      0x02
 246 #define         SCSIRSTO        0x01
 247 
 248 /*
 249  * SCSI Transfer Control 1 Register (pp. 3-14,15).
 250  * Controls the SCSI module data path.
 251  */
 252 #define SXFRCTL1(x)             ((x) + 0xC02ul)
 253 #define         BITBUCKET       0x80
 254 #define         SWRAPEN         0x40
 255 #define         ENSPCHK         0x20
 256 #define         STIMESEL        0x18
 257 #define         ENSTIMER        0x04
 258 #define         ACTNEGEN        0x02
 259 #define         STPWEN          0x01            /* Powered Termination */
 260 
 261 /*
 262  * SCSI Control Signal Read Register (p. 3-15).
 263  * Reads the actual state of the SCSI bus pins
 264  */
 265 #define SCSISIGI(x)             ((x) + 0xC03ul)
 266 #define         CDI             0x80
 267 #define         IOI             0x40
 268 #define         MSGI            0x20
 269 #define         ATNI            0x10
 270 #define         SELI            0x08
 271 #define         BSYI            0x04
 272 #define         REQI            0x02
 273 #define         ACKI            0x01
 274 
 275 /*
 276  * SCSI Contol Signal Write Register (p. 3-16).
 277  * Writing to this register modifies the control signals on the bus. Only
 278  * those signals that are allowed in the current mode (Initiator/Target) are
 279  * asserted.
 280  */
 281 #define SCSISIGO(x)             ((x) + 0xC03ul)
 282 #define         CDO             0x80
 283 #define         IOO             0x40
 284 #define         MSGO            0x20
 285 #define         ATNO            0x10
 286 #define         SELO            0x08
 287 #define         BSYO            0x04
 288 #define         REQO            0x02
 289 #define         ACKO            0x01
 290 
 291 /*
 292  * SCSI Rate
 293  */
 294 #define SCSIRATE(x)             ((x) + 0xC04ul)
 295 #define WIDEXFER                0x80            /* Wide transfer control */
 296 #define SXFR                    0x70            /* Sync transfer rate */
 297 #define SOFS                    0x0F            /* Sync offset */
 298 
 299 /*
 300  * SCSI ID (p. 3-18).
 301  * Contains the ID of the board and the current target on the
 302  * selected channel
 303  */
 304 #define SCSIID(x)               ((x) + 0xC05ul)
 305 #define         TID             0xF0            /* Target ID mask */
 306 #define         OID             0x0F            /* Our ID mask */
 307 
 308 /*
 309  * SCSI Transfer Count (pp. 3-19,20)
 310  * These registers count down the number of bytes transfered
 311  * across the SCSI bus.  The counter is decremented only once
 312  * the data has been safely transfered.  SDONE in SSTAT0 is
 313  * set when STCNT goes to 0
 314  */
 315 #define STCNT(x)                ((x) + 0xC08ul)
 316 
 317 /*
 318  * SCSI Status 0 (p. 3-21)
 319  * Contains one set of SCSI Interrupt codes
 320  * These are most likely of interest to the sequencer
 321  */
 322 #define SSTAT0(x)               ((x) + 0xC0Bul)
 323 #define         TARGET          0x80            /* Board is a target */
 324 #define         SELDO           0x40            /* Selection Done */
 325 #define         SELDI           0x20            /* Board has been selected */
 326 #define         SELINGO         0x10            /* Selection In Progress */
 327 #define         SWRAP           0x08            /* 24bit counter wrap */
 328 #define         SDONE           0x04            /* STCNT = 0x000000 */
 329 #define         SPIORDY         0x02            /* SCSI PIO Ready */
 330 #define         DMADONE         0x01            /* DMA transfer completed */
 331 
 332 /*
 333  * Clear SCSI Interrupt 1 (p. 3-23)
 334  * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
 335  */
 336 #define CLRSINT1(x)             ((x) + 0xC0Cul)
 337 #define         CLRSELTIMEO     0x80
 338 #define         CLRATNO         0x40
 339 #define         CLRSCSIRSTI     0x20
 340 /*  UNUSED                      0x10 */
 341 #define         CLRBUSFREE      0x08
 342 #define         CLRSCSIPERR     0x04
 343 #define         CLRPHASECHG     0x02
 344 #define         CLRREQINIT      0x01
 345 
 346 /*
 347  * SCSI Status 1 (p. 3-24)
 348  * These interrupt bits are of interest to the kernel driver
 349  */
 350 #define SSTAT1(x)               ((x) + 0xC0Cul)
 351 #define         SELTO           0x80
 352 #define         ATNTARG         0x40
 353 #define         SCSIRSTI        0x20
 354 #define         PHASEMIS        0x10
 355 #define         BUSFREE         0x08
 356 #define         SCSIPERR        0x04
 357 #define         PHASECHG        0x02
 358 #define         REQINIT         0x01
 359 
 360 /*
 361  * SCSI Interrrupt Mode 1 (pp. 3-28,29).
 362  * Set bits in this register enable the corresponding
 363  * interrupt source.
 364  */
 365 #define SIMODE1(x)              ((x) + 0xC11ul)
 366 #define         ENSELTIMO       0x80
 367 #define         ENATNTARG       0x40
 368 #define         ENSCSIRST       0x20
 369 #define         ENPHASEMIS      0x10
 370 #define         ENBUSFREE       0x08
 371 #define         ENSCSIPERR      0x04
 372 #define         ENPHASECHG      0x02
 373 #define         ENREQINIT       0x01
 374 
 375 /*
 376  * SCSI/Host Address (p. 3-30)
 377  * These registers hold the host address for the byte about to be
 378  * transfered on the SCSI bus.  They are counted up in the same
 379  * manner as STCNT is counted down.  SHADDR should always be used
 380  * to determine the address of the last byte transfered since HADDR
 381  * can be squewed by write ahead.
 382  */
 383 #define SHADDR(x)               ((x) + 0xC14ul)
 384 
 385 /*
 386  * Selection/Reselection ID (p. 3-31)
 387  * Upper four bits are the device id. The ONEBIT is set when the re/selecting
 388  * device did not set its own ID.
 389  */
 390 #define SELID(x)                ((x) + 0xC19ul)
 391 #define         SELID_MASK      0xF0
 392 #define         ONEBIT          0x08
 393 /*  UNUSED                      0x07 */
 394 
 395 /*
 396  * Serial EEPROM Control (p. 4-92 in 7870 Databook)
 397  * Controls the reading and writing of an external serial 1-bit
 398  * EEPROM Device.  In order to access the serial EEPROM, you must
 399  * first set the SEEMS bit that generates a request to the memory
 400  * port for access to the serial EEPROM device.  When the memory
 401  * port is not busy servicing another request, it reconfigures
 402  * to allow access to the serial EEPROM.  When this happens, SEERDY
 403  * gets set high to verify that the memory port access has been
 404  * granted.  See aic7xxx_read_eprom for detailed information on
 405  * the protocol necessary to read the serial EEPROM.
 406  */
 407 #define SEECTL(x)               ((x) + 0xC1Eul)
 408 #define         EXTARBACK       0x80
 409 #define         EXTARBREQ       0x40
 410 #define         SEEMS           0x20
 411 #define         SEERDY          0x10
 412 #define         SEECS           0x08
 413 #define         SEECK           0x04
 414 #define         SEEDO           0x02
 415 #define         SEEDI           0x01
 416 
 417 /*
 418  * SCSI Block Control (p. 3-32)
 419  * Controls Bus type and channel selection. In a twin channel configuration
 420  * addresses 0x00-0x1E are gated to the appropriate channel based on this
 421  * register. SELWIDE allows for the coexistence of 8bit and 16bit devices
 422  * on a wide bus.
 423  */
 424 #define SBLKCTL(x)              ((x) + 0xC1Ful)
 425 /*  UNUSED                      0xC0 */
 426 #define         AUTOFLUSHDIS    0x20            /* used for Rev C check */
 427 /*  UNUSED                      0x10 */
 428 #define         SELBUSB         0x08
 429 /*  UNUSED                      0x04 */
 430 #define         SELWIDE         0x02
 431 /*  UNUSED                      0x01 */
 432 #define         SELSINGLE       0x00
 433 
 434 /*
 435  * Sequencer Control (p. 3-33)
 436  * Error detection mode and speed configuration
 437  */
 438 #define SEQCTL(x)               ((x) + 0xC60ul)
 439 #define         PERRORDIS       0x80
 440 #define         PAUSEDIS        0x40
 441 #define         FAILDIS         0x20
 442 #define         FASTMODE        0x10
 443 #define         BRKADRINTEN     0x08
 444 #define         STEP            0x04
 445 #define         SEQRESET        0x02
 446 #define         LOADRAM         0x01
 447 
 448 /*
 449  * Sequencer RAM Data (p. 3-34)
 450  * Single byte window into the Scratch Ram area starting at the address
 451  * specified by SEQADDR0 and SEQADDR1. To write a full word, simply write
 452  * four bytes in sucessesion. The SEQADDRs will increment after the most
 453  * significant byte is written
 454  */
 455 #define SEQRAM(x)               ((x) + 0xC61ul)
 456 
 457 /*
 458  * Sequencer Address Registers (p. 3-35)
 459  * Only the first bit of SEQADDR1 holds addressing information
 460  */
 461 #define SEQADDR0(x)             ((x) + 0xC62ul)
 462 #define SEQADDR1(x)             ((x) + 0xC63ul)
 463 
 464 #define ACCUM(x)                ((x) + 0xC64ul)         /* accumulator */
 465 #define SINDEX(x)               ((x) + 0xC65ul)
 466 
 467 /*
 468  * Board Control (p. 3-43)
 469  */
 470 #define BCTL(x)                 ((x) + 0xC84ul)
 471 /*   RSVD                       0xF0 */
 472 #define         ACE             0x08    /* Support for external processors */
 473 /*   RSVD                       0x06 */
 474 #define         ENABLE          0x01
 475 
 476 /*
 477  * Bus On/Off Time (p. 3-44)
 478  */
 479 #define BUSTIME(x)              ((x) + 0xC85ul)
 480 #define         BOFF            0xF0
 481 #define         BON             0x0F
 482 
 483 /*
 484  * Bus Speed (p. 3-45)
 485  */
 486 #define BUSSPD(x)               ((x) + 0xC86ul)
 487 #define         DFTHRSH         0xC0
 488 #define         STBOFF          0x38
 489 #define         STBON           0x07
 490 
 491 /*
 492  * Host Control (p. 3-47) R/W
 493  * Overal host control of the device.
 494  */
 495 #define HCNTRL(x)               ((x) + 0xC87ul)
 496 /*    UNUSED                    0x80 */
 497 #define         POWRDN          0x40
 498 /*    UNUSED                    0x20 */
 499 #define         SWINT           0x10
 500 #define         IRQMS           0x08
 501 #define         PAUSE           0x04
 502 #define         INTEN           0x02
 503 #define         CHIPRST         0x01
 504 #define         REQ_PAUSE       IRQMS | PAUSE | INTEN
 505 #define         UNPAUSE_274X    IRQMS | INTEN
 506 #define         UNPAUSE_284X    INTEN
 507 #define         UNPAUSE_294X    IRQMS | INTEN
 508 
 509 /*
 510  * Host Address (p. 3-48)
 511  * This register contains the address of the byte about
 512  * to be transfered across the host bus.
 513  */
 514 #define HADDR(x)                ((x) + 0xC88ul)
 515 
 516 /*
 517  * SCB Pointer (p. 3-49)
 518  * Gate one of the four SCBs into the SCBARRAY window.
 519  */
 520 #define SCBPTR(x)               ((x) + 0xC90ul)
 521 
 522 /*
 523  * Interrupt Status (p. 3-50)
 524  * Status for system interrupts
 525  */
 526 #define INTSTAT(x)              ((x) + 0xC91ul)
 527 #define         SEQINT_MASK     0xF0            /* SEQINT Status Codes */
 528 #define                 BAD_PHASE       0x00
 529 #define                 SEND_REJECT     0x10
 530 #define                 NO_IDENT        0x20
 531 #define                 NO_MATCH        0x30
 532 #define                 MSG_SDTR        0x40
 533 #define                 MSG_WDTR        0x50
 534 #define                 MSG_REJECT      0x60
 535 #define                 BAD_STATUS      0x70
 536 #define                 RESIDUAL        0x80
 537 #define                 ABORT_TAG       0x90
 538 #define                 AWAITING_MSG    0xA0
 539 #define                 IMMEDDONE       0xB0
 540 #define         BRKADRINT 0x08
 541 #define         SCSIINT   0x04
 542 #define         CMDCMPLT  0x02
 543 #define         SEQINT    0x01
 544 #define         INT_PEND  (BRKADRINT | SEQINT | SCSIINT | CMDCMPLT)
 545 
 546 /*
 547  * Hard Error (p. 3-53)
 548  * Reporting of catastrophic errors. You usually cannot recover from
 549  * these without a full board reset.
 550  */
 551 #define ERROR(x)                ((x) + 0xC92ul)
 552 /*    UNUSED                    0xF0 */
 553 #define         PARERR          0x08
 554 #define         ILLOPCODE       0x04
 555 #define         ILLSADDR        0x02
 556 #define         ILLHADDR        0x01
 557 
 558 /*
 559  * Clear Interrupt Status (p. 3-52)
 560  */
 561 #define CLRINT(x)               ((x) + 0xC92ul)
 562 #define         CLRBRKADRINT    0x08
 563 #define         CLRSCSIINT      0x04
 564 #define         CLRCMDINT       0x02
 565 #define         CLRSEQINT       0x01
 566 
 567 /*
 568  * SCB Auto Increment (p. 3-59)
 569  * Byte offset into the SCB Array and an optional bit to allow auto
 570  * incrementing of the address during download and upload operations
 571  */
 572 #define SCBCNT(x)               ((x) + 0xC9Aul)
 573 #define         SCBAUTO         0x80
 574 #define         SCBCNT_MASK     0x1F
 575 
 576 /*
 577  * Queue In FIFO (p. 3-60)
 578  * Input queue for queued SCBs (commands that the seqencer has yet to start)
 579  */
 580 #define QINFIFO(x)              ((x) + 0xC9Bul)
 581 
 582 /*
 583  * Queue In Count (p. 3-60)
 584  * Number of queued SCBs
 585  */
 586 #define QINCNT(x)               ((x) + 0xC9Cul)
 587 
 588 /*
 589  * Queue Out FIFO (p. 3-61)
 590  * Queue of SCBs that have completed and await the host
 591  */
 592 #define QOUTFIFO(x)             ((x) + 0xC9Dul)
 593 
 594 /*
 595  * Queue Out Count (p. 3-61)
 596  * Number of queued SCBs in the Out FIFO
 597  */
 598 #define QOUTCNT(x)              ((x) + 0xC9Eul)
 599 
 600 #define SCBARRAY(x)             ((x) + 0xCA0ul)
 601 
 602 /* ---------------- END AIC-7770 Register Definitions ----------------- */
 603 
 604 /* --------------------- AIC-7870-only definitions -------------------- */
 605 
 606 #define DSPCISTATUS(x)          ((x) + 0xC86ul)
 607 #define         DFTHRESH        0xC0
 608 
 609 /* Scratch RAM offset definitions */
 610 
 611 /* ---------------------- Scratch RAM Offsets ------------------------- */
 612 /* These offsets are either to values that are initialized by the board's
 613  * BIOS or are specified by the Linux sequencer code. If I can figure out
 614  * how to read the EISA configuration info at probe time, the cards could
 615  * be run without BIOS support installed
 616  */
 617 
 618 /*
 619  * 1 byte per target starting at this address for configuration values
 620  */
 621 #define HA_TARG_SCRATCH(x)      ((x) + 0xC20ul)
 622 
 623 /*
 624  * The sequencer will stick the first byte of any rejected message here so
 625  * we can see what is getting thrown away.
 626  */
 627 #define HA_REJBYTE(x)           ((x) + 0xC31ul)
 628 
 629 /*
 630  * Bit vector of targets that have disconnection disabled.
 631  */
 632 #define HA_DISC_DSB(x)          ((x) + 0xC32ul)
 633 
 634 /*
 635  * Length of pending message
 636  */
 637 #define HA_MSG_LEN(x)           ((x) + 0xC34ul)
 638 
 639 /*
 640  * Outgoing Message Body
 641  */
 642 #define HA_MSG_START(x)         ((x) + 0xC35ul)
 643 
 644 /*
 645  * These are offsets into the card's scratch ram. Some of the values are
 646  * specified in the AHA2742 technical reference manual and are initialized
 647  * by the BIOS at boot time.
 648  */
 649 #define HA_ARG_1(x)             ((x) + 0xC4Aul) /* sdtr <-> rate parameters */
 650 #define HA_RETURN_1(x)          ((x) + 0xC4Aul)
 651 #define         SEND_SENSE      0x80
 652 #define         SEND_SDTR       0x80
 653 #define         SEND_WDTR       0x80
 654 #define         SEND_REJ        0x40
 655 
 656 #define SG_COUNT(x)             ((x) + 0xC4Dul)
 657 #define SG_NEXT(x)              ((x) + 0xC4Eul)
 658 #define HA_SIGSTATE(x)          ((x) + 0xC4Bul) /* value in SCSISIGO */
 659 #define HA_SCBCOUNT(x)          ((x) + 0xC52ul) /* number of hardware SCBs */
 660 
 661 #define HA_FLAGS(x)             ((x) + 0xC53ul) /* TWIN and WIDE bus flags */
 662 #define         SINGLE_BUS      0x00
 663 #define         TWIN_BUS        0x01
 664 #define         WIDE_BUS        0x02
 665 #define         ACTIVE_MSG      0x20
 666 #define         IDENTIFY_SEEN   0x40
 667 #define         RESELECTING     0x80
 668 
 669 #define HA_ACTIVE0(x)           ((x) + 0xC54ul) /* Active bits; targets 0-7 */
 670 #define HA_ACTIVE1(x)           ((x) + 0xC55ul) /* Active bits; targets 8-15 */
 671 #define SAVED_TCL(x)            ((x) + 0xC56ul) /* Saved target, channel, LUN */
 672 #define WAITING_SCBH(x)         ((x) + 0xC57ul) /* Head of disconnected targets list. */
 673 #define WAITING_SCBT(x)         ((x) + 0xC58ul) /* Tail of disconnected targets list. */
 674 
 675 #define HA_SCSICONF(x)          ((x) + 0xC5Aul) /* SCSI config register */
 676 #define HA_INTDEF(x)            ((x) + 0xC5Cul) /* interrupt def'n register */
 677 #define HA_HOSTCONF(x)          ((x) + 0xC5Dul) /* host config def'n register */
 678 
 679 #define HA_274_BIOSCTRL(x)      ((x) + 0xC5Ful) /* BIOS enabled for 274x */
 680 #define BIOSMODE                0x30
 681 #define BIOSDISABLED            0x30
 682 
 683 #define MSG_ABORT               0x06
 684 #define MSG_BUS_DEVICE_RESET    0x0C
 685 #define BUS_8_BIT               0x00
 686 #define BUS_16_BIT              0x01
 687 #define BUS_32_BIT              0x02
 688 
 689 
 690 /*
 691  *
 692  * Define the format of the SEEPROM registers (16 bits).
 693  *
 694  */
 695 struct seeprom_config {
 696 
 697 /*
 698  * SCSI ID Configuration Flags
 699  */
 700 #define CFXFER          0x0007          /* synchronous transfer rate */
 701 #define CFSYNCH         0x0008          /* enable synchronous transfer */
 702 #define CFDISC          0x0010          /* enable disconnection */
 703 #define CFWIDEB         0x0020          /* wide bus device */
 704 /* UNUSED               0x00C0 */
 705 #define CFSTART         0x0100          /* send start unit SCSI command */
 706 #define CFINCBIOS       0x0200          /* include in BIOS scan */
 707 #define CFRNFOUND       0x0400          /* report even if not found */
 708 /* UNUSED               0xF800 */
 709   unsigned short device_flags[16];      /* words 0-15 */
 710 
 711 /*
 712  * BIOS Control Bits
 713  */
 714 #define CFSUPREM        0x0001          /* support all removeable drives */
 715 #define CFSUPREMB       0x0002          /* support removeable drives for boot only */
 716 #define CFBIOSEN        0x0004          /* BIOS enabled */
 717 /* UNUSED               0x0008 */
 718 #define CFSM2DRV        0x0010          /* support more than two drives */
 719 /* UNUSED               0x0060 */
 720 #define CFEXTEND        0x0080          /* extended translation enabled */
 721 /* UNUSED               0xFF00 */
 722   unsigned short bios_control;          /* word 16 */
 723 
 724 /*
 725  * Host Adapter Control Bits
 726  */
 727 /* UNUSED               0x0003 */
 728 #define CFWSTERM        0x0008          /* SCSI high byte termination (wide card) */
 729 #define CFSTERM         0x0004          /* SCSI low byte termination (non-wide cards) */
 730 #define CFSPARITY       0x0010          /* SCSI parity */
 731 /* UNUSED               0x0020 */
 732 #define CFRESETB        0x0040          /* reset SCSI bus at IC initialization */
 733 /* UNUSED               0xFF80 */
 734   unsigned short adapter_control;       /* word 17 */
 735 
 736 /*
 737  * Bus Release, Host Adapter ID
 738  */
 739 #define CFSCSIID        0x000F          /* host adapter SCSI ID */
 740 /* UNUSED               0x00F0 */
 741 #define CFBRTIME        0xFF00          /* bus release time */
 742   unsigned short brtime_id;             /* word 18 */
 743 
 744 /*
 745  * Maximum targets
 746  */
 747 #define CFMAXTARG       0x00FF  /* maximum targets */
 748 /* UNUSED               0xFF00 */
 749   unsigned short max_targets;           /* word 19 */
 750 
 751   unsigned short res_1[11];             /* words 20-30 */
 752   unsigned short checksum;              /* word 31 */
 753 
 754 };
 755 
 756 
 757 #define AIC7XXX_DEBUG
 758 
 759 /*
 760  * Pause the sequencer and wait for it to actually stop - this
 761  * is important since the sequencer can disable pausing for critical
 762  * sections.
 763  */
 764 #define PAUSE_SEQUENCER(p) \
 765   outb(p->pause, HCNTRL(p->base));                      \
 766   while ((inb(HCNTRL(p->base)) & PAUSE) == 0)           \
 767     ;                                                   \
 768 
 769 /*
 770  * Unpause the sequencer. Unremarkable, yet done often enough to
 771  * warrant an easy way to do it.
 772  */
 773 #define UNPAUSE_SEQUENCER(p) \
 774   outb(p->unpause, HCNTRL(p->base))
 775 
 776 /*
 777  * Restart the sequencer program from address zero
 778  */
 779 #define RESTART_SEQUENCER(p) \
 780   do {                                                  \
 781     outb(SEQRESET | FASTMODE, SEQCTL(p->base)); \
 782   } while (inb(SEQADDR0(p->base)) != 0 &&               \
 783            inb(SEQADDR1(p->base)) != 0);                \
 784   UNPAUSE_SEQUENCER(p);
 785 
 786 /*
 787  * If an error occurs during a data transfer phase, run the comand
 788  * to completion - it's easier that way - making a note of the error
 789  * condition in this location. This then will modify a DID_OK status
 790  * into an appropriate error for the higher-level SCSI code.
 791  */
 792 #define aic7xxx_error(cmd)      ((cmd)->SCp.Status)
 793 
 794 /*
 795  * Keep track of the targets returned status.
 796  */
 797 #define aic7xxx_status(cmd)     ((cmd)->SCp.sent_command)
 798 
 799 /*
 800  * The position of the SCSI commands scb within the scb array.
 801  */
 802 #define aic7xxx_position(cmd)   ((cmd)->SCp.have_data_in)
 803 
 804 /*
 805  * Since the sequencer code DMAs the scatter-gather structures
 806  * directly from memory, we use this macro to assert that the
 807  * kernel structure hasn't changed.
 808  */
 809 #define SG_STRUCT_CHECK(sg) \
 810   ((char *) &(sg).address - (char *) &(sg) != 0 ||  \
 811    (char *) &(sg).length  - (char *) &(sg) != 8 ||  \
 812    sizeof((sg).address) != 4 ||                   \
 813    sizeof((sg).length)  != 4 ||                   \
 814    sizeof(sg)           != 12)
 815 
 816 /*
 817  * "Static" structures. Note that these are NOT initialized
 818  * to zero inside the kernel - we have to initialize them all
 819  * explicitly.
 820  *
 821  * We support multiple adapter cards per interrupt, but keep a
 822  * linked list of Scsi_Host structures for each IRQ.  On an interrupt,
 823  * use the IRQ as an index into aic7xxx_boards[] to locate the card
 824  * information.
 825  */
 826 static struct Scsi_Host *aic7xxx_boards[MAXIRQ + 1];
 827 
 828 /*
 829  * When we detect and register the card, it is possible to
 830  * have the card raise a spurious interrupt.  Because we need
 831  * to support multiple cards, we cannot tell which card caused
 832  * the spurious interrupt.  And, we might not even have added
 833  * the card info to the linked list at the time the spurious
 834  * interrupt gets raised.  This variable is suppose to keep track
 835  * of when we are registering a card and how many spurious
 836  * interrupts we have encountered.
 837  *
 838  *   0 - do not allow spurious interrupts.
 839  *   1 - allow 1 spurious interrupt
 840  *   2 - have 1 spurious interrupt, do not allow any more.
 841  *
 842  * I've made it an integer instead of a boolean in case we
 843  * want to allow more than one spurious interrupt for debugging
 844  * purposes.  Otherwise, it could just go from true to false to
 845  * true (or something like that).
 846  *
 847  * When the driver detects the cards, we'll set the count to 1
 848  * for each card detection and registration.  After the registration
 849  * of a card completes, we'll set the count back to 0.  So far, it
 850  * seems to be enough to allow a spurious interrupt only during
 851  * card registration; if a spurious interrupt is going to occur,
 852  * this is where it happens.
 853  *
 854  * We should be able to find a way to avoid getting the spurious
 855  * interrupt.  But until we do, we have to keep this ugly code.
 856  */
 857 static int aic7xxx_spurious_count;
 858 
 859 /*
 860  * The driver keeps up to four scb structures per card in memory. Only the
 861  * first 26 bytes of the structure are valid for the hardware, the rest used
 862  * for driver level bookeeping.
 863  */
 864 #define SCB_DOWNLOAD_SIZE       26      /* amount to actually download */
 865 #define SCB_UPLOAD_SIZE         26      /* amount to actually upload */
 866 
 867 struct aic7xxx_scb {
 868 /* ------------    Begin hardware supported fields    ---------------- */
 869 /*1 */  unsigned char control;
 870 #define SCB_NEEDWDTR 0x80                       /* Initiate Wide Negotiation */
 871 #define SCB_DISCENB  0x40                       /* Disconnection Enable */
 872 #define SCB_TE       0x20                       /* Tag enable */
 873 #define SCB_NEEDSDTR 0x10                       /* Initiate Sync Negotiation */
 874 #define SCB_NEEDDMA  0x08                       /* Refresh SCB from host ram */
 875 #define SCB_DIS      0x04
 876 #define SCB_TAG_TYPE 0x03
 877 #define         SIMPLE_QUEUE    0x00
 878 #define         HEAD_QUEUE      0x01
 879 #define         OR_QUEUE        0x02
 880 /*              ILLEGAL      0x03 */
 881 /*2 */  unsigned char target_channel_lun;       /* 4/1/3 bits */
 882 /*3 */  unsigned char SG_segment_count;
 883 /*7 */  unsigned char SG_list_pointer[4] __attribute__ ((packed));
 884 /*11*/  unsigned char SCSI_cmd_pointer[4] __attribute__ ((packed));
 885 /*12*/  unsigned char SCSI_cmd_length;
 886 /*14*/  unsigned char RESERVED[2];              /* must be zero */
 887 /*15*/  unsigned char target_status;
 888 /*18*/  unsigned char residual_data_count[3];
 889 /*19*/  unsigned char residual_SG_segment_count;
 890 /*23*/  unsigned char data_pointer[4] __attribute__ ((packed));
 891 /*26*/  unsigned char data_count[3];
 892 /*30*/  unsigned char host_scb[4] __attribute__ ((packed));
 893 /*31*/  u_char next_waiting;            /* Used to thread SCBs awaiting selection. */
 894 #define SCB_LIST_NULL 0xFF              /* SCB list equivelent to NULL */
 895 #if 0
 896         /*
 897          *  No real point in transferring this to the
 898          *  SCB registers.
 899          */
 900         unsigned char RESERVED[1];
 901 #endif
 902 
 903         /*-----------------end of hardware supported fields----------------*/
 904         struct aic7xxx_scb *next;       /* next ptr when in free list */
 905         Scsi_Cmnd          *cmd;        /* Scsi_Cmnd for this scb */
 906         int                 state;      /* current state of scb */
 907 #define SCB_FREE               0x00
 908 #define SCB_ACTIVE             0x01
 909 #define SCB_ABORTED            0x02
 910 #define SCB_DEVICE_RESET       0x04
 911 #define SCB_IMMED              0x08
 912 #define SCB_SENSE              0x10
 913         unsigned int        position;       /* Position in scb array */
 914         struct scatterlist  sg;
 915         struct scatterlist  sense_sg;
 916         unsigned char       sense_cmd[6];   /* Allocate 6 characters for sense command */
 917 #define TIMER_ENABLED           0x01
 918 #define TIMER_EXPIRED           0x02
 919 #define TIMED_CMD_DONE          0x04
 920         volatile unsigned char timer_status;
 921 #ifndef AIC7XXX_POLL
 922         struct wait_queue   *waiting;       /* wait queue for device reset command */
 923         struct wait_queue   waitq;          /* waiting points to this */
 924         struct timer_list   timer;          /* timeout for device reset command */
 925 #endif
 926 };
 927 
 928 typedef void (*timeout_fn)(unsigned long);
 929 
 930 static struct {
 931   unsigned char errno;
 932   const char *errmesg;
 933 } hard_error[] = {
 934   { ILLHADDR,  "Illegal Host Access" },
 935   { ILLSADDR,  "Illegal Sequencer Address referrenced" },
 936   { ILLOPCODE, "Illegal Opcode in sequencer program" },
 937   { PARERR,    "Sequencer Ram Parity Error" }
 938 };
 939 
 940 static unsigned char
 941 generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 };
 942 
 943 /*
 944  * The maximum number of SCBs we could have for ANY type
 945  * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE
 946  * SEQUENCER CODE IF THIS IS MODIFIED!
 947  */
 948 #define AIC7XXX_MAXSCB  16
 949 
 950 /*
 951  * Define a structure used for each host adapter, only one per IRQ.
 952  */
 953 struct aic7xxx_host {
 954   int                      base;             /* card base address */
 955   int                      maxscb;           /* hardware SCBs */
 956   int                      numscb;           /* current number of scbs */
 957   int                      extended;         /* extended xlate? */
 958   aha_type                 type;             /* card type */
 959   aha_bus_type             bus_type;         /* normal/twin/wide bus */
 960   unsigned char            a_scanned;        /* 0 not scanned, 1 scanned */
 961   unsigned char            b_scanned;        /* 0 not scanned, 1 scanned */
 962   unsigned int             isr_count;        /* Interrupt count */
 963   volatile unsigned char   unpause;          /* unpause value for HCNTRL */
 964   volatile unsigned char   pause;            /* pause value for HCNTRL */
 965   volatile unsigned short  needsdtr_copy;    /* default config */
 966   volatile unsigned short  needsdtr;
 967   volatile unsigned short  sdtr_pending;
 968   volatile unsigned short  needwdtr_copy;    /* default config */
 969   volatile unsigned short  needwdtr;
 970   volatile unsigned short  wdtr_pending;
 971   volatile unsigned short  discenable;       /* Targets allowed to disconnect */
 972   struct seeprom_config    seeprom;
 973   int                      have_seeprom;
 974   struct Scsi_Host        *next;             /* allow for multiple IRQs */
 975   struct aic7xxx_scb       scb_array[AIC7XXX_MAXSCB];  /* active commands */
 976   struct aic7xxx_scb      *free_scb;         /* list of free SCBs */
 977 #ifdef AIC7XXX_PROC_STATS
 978   /*
 979    * Statistics Kept:
 980    *
 981    * Total Xfers (count for each command that has a data xfer),
 982    * broken down further by reads && writes.
 983    *
 984    * Binned sizes, writes && reads:
 985    *    < 512, 512, 1-2K, 2-4K, 4-8K, 8-16K, 16-32K, 32-64K, 64K-128K, > 128K
 986    *
 987    * Total amounts read/written above 512 bytes (amts under ignored)
 988    */
 989   struct aic7xxx_xferstats {
 990     long xfers;                              /* total xfer count */
 991     long w_total;                            /* total writes */
 992     long w_total512;                         /* 512 byte blocks written */
 993     long w_bins[10];                         /* binned write */
 994     long r_total;                            /* total reads */
 995     long r_total512;                         /* 512 byte blocks read */
 996     long r_bins[10];                         /* binned reads */
 997   } stats[2][16][8];                         /* channel, target, lun */
 998 #endif /* AIC7XXX_PROC_STATS */
 999 };
1000 
1001 struct aic7xxx_host_config {
1002   int              irq;        /* IRQ number */
1003   int              base;       /* I/O base */
1004   int              maxscb;     /* hardware SCBs */
1005   int              unpause;    /* unpause value for HCNTRL */
1006   int              pause;      /* pause value for HCNTRL */
1007   int              scsi_id;    /* host SCSI ID */
1008   int              scsi_id_b;  /* host SCSI ID B channel for twin cards */
1009   int              extended;   /* extended xlate? */
1010   int              busrtime;   /* bus release time */
1011   aha_type         type;       /* card type */
1012   aha_bus_type     bus_type;   /* normal/twin/wide bus */
1013   aha_status_type  parity;     /* bus parity enabled/disabled */
1014   aha_status_type  low_term;   /* bus termination low byte */
1015   aha_status_type  high_term;  /* bus termination high byte (wide cards only) */
1016 };
1017 
1018 /*
1019  * Valid SCSIRATE values. (p. 3-17)
1020  * Provides a mapping of tranfer periods in ns to the proper value to
1021  * stick in the scsiscfr reg to use that transfer rate.
1022  */
1023 static struct {
1024   short period;
1025   short rate;
1026   const char *english;
1027 } aic7xxx_syncrates[] = {
1028   { 100,   0,  "10.0" },
1029   { 125,   1,  "8.0"  },
1030   { 150,   2,  "6.67" },
1031   { 175,   3,  "5.7"  },
1032   { 200,   4,  "5.0"  },
1033   { 225,   5,  "4.4"  },
1034   { 250,   6,  "4.0"  },
1035   { 275,   7,  "3.6"  }
1036 };
1037 
1038 static int num_aic7xxx_syncrates =
1039     sizeof(aic7xxx_syncrates) / sizeof(aic7xxx_syncrates[0]);
1040 
1041 #ifdef AIC7XXX_DEBUG
1042 
1043 static void
1044 debug(const char *fmt, ...)
     /* [previous][next][first][last][top][bottom][index][help] */
1045 {
1046   va_list ap;
1047   char buf[256];
1048 
1049   va_start(ap, fmt);
1050   vsprintf(buf, fmt, ap);
1051   printk(buf);
1052   va_end(ap);
1053 }
1054 
1055 static void
1056 debug_config(struct aic7xxx_host_config *p)
     /* [previous][next][first][last][top][bottom][index][help] */
1057 {
1058   int host_conf, scsi_conf;
1059   unsigned char brelease;
1060   unsigned char dfthresh;
1061 
1062   static int DFT[] = { 0, 50, 75, 100 };
1063   static int SST[] = { 256, 128, 64, 32 };
1064   static const char *BUSW[] = { "", "-TWIN", "-WIDE" };
1065 
1066   host_conf = inb(HA_HOSTCONF(p->base));
1067   scsi_conf = inb(HA_SCSICONF(p->base));
1068 
1069   /*
1070    * The 7870 gets the bus release time and data FIFO threshold
1071    * from the serial EEPROM (stored in the config structure) and
1072    * scsi_conf register respectively.  The 7770 gets the bus
1073    * release time and data FIFO threshold from the scsi_conf and
1074    * host_conf registers respectively.
1075    */
1076   if ((p->type == AIC_274x) || (p->type == AIC_284x))
1077   {
1078     dfthresh = (host_conf >> 6);
1079   }
1080   else
1081   {
1082     dfthresh = (scsi_conf >> 6);
1083   }
1084 
1085   brelease = p->busrtime;
1086   if (brelease == 0)
1087   {
1088     brelease = 2;
1089   }
1090 
1091   switch (p->type)
1092   {
1093     case AIC_274x:
1094       printk("AIC7770%s AT EISA SLOT %d:\n", BUSW[p->bus_type], p->base >> 12);
1095       break;
1096 
1097     case AIC_284x:
1098       printk("AIC7770%s AT VLB SLOT %d:\n", BUSW[p->bus_type], p->base >> 12);
1099       break;
1100 
1101     case AIC_7870:
1102       printk("AIC7870%s (PCI-bus):\n", BUSW[p->bus_type]);
1103       break;
1104 
1105     case AIC_7850:
1106       printk("AIC7850%s (PCI-bus):\n", BUSW[p->bus_type]);
1107       break;
1108 
1109     case AIC_7872:
1110       printk("AIC7872%s (PCI-bus):\n", BUSW[p->bus_type]);
1111       break;
1112 
1113     default:
1114       panic("aic7xxx debug_config: internal error\n");
1115   }
1116 
1117   printk("    irq %d\n"
1118          "    bus release time %d bclks\n"
1119          "    data fifo threshold %d%%\n",
1120          p->irq,
1121          brelease,
1122          DFT[dfthresh]);
1123 
1124   printk("    SCSI CHANNEL A:\n"
1125          "        scsi id %d\n"
1126          "        scsi selection timeout %d ms\n"
1127          "        scsi bus reset at power-on %sabled\n",
1128          scsi_conf & 0x07,
1129          SST[(scsi_conf >> 3) & 0x03],
1130          (scsi_conf & 0x40) ? "en" : "dis");
1131 
1132   if (((p->type == AIC_274x) || (p->type == AIC_284x)) && p->parity == AIC_UNKNOWN)
1133   {
1134     /*
1135      * Set the parity for 7770 based cards.
1136      */
1137     p->parity = (scsi_conf & 0x20) ? AIC_ENABLED : AIC_DISABLED;
1138   }
1139   if (p->parity != AIC_UNKNOWN)
1140   {
1141     printk("        scsi bus parity %sabled\n",
1142            (p->parity == AIC_ENABLED) ? "en" : "dis");
1143   }
1144 
1145   if (p->type == AIC_274x)
1146   {
1147     p->low_term = (scsi_conf & 0x80) ? AIC_ENABLED : AIC_DISABLED;
1148   }
1149   if (p->low_term != AIC_UNKNOWN)
1150   {
1151     printk("        scsi bus termination (low byte) %sabled\n",
1152           (p->low_term == AIC_ENABLED) ? "en" : "dis");
1153   }
1154   if ((p->bus_type == AIC_WIDE) && (p->high_term != AIC_UNKNOWN))
1155   {
1156     printk("        scsi bus termination (high byte) %sabled\n",
1157           (p->high_term == AIC_ENABLED) ? "en" : "dis");
1158   }
1159 }
1160 
1161 static void
1162 debug_scb(struct aic7xxx_scb *scb)
     /* [previous][next][first][last][top][bottom][index][help] */
1163 {
1164   printk("control 0x%x, tcl 0x%x, sg_count %d, sg_ptr 0x%x, cmdp 0x%x, cmdlen %d\n",
1165          scb->control, scb->target_channel_lun, scb->SG_segment_count,
1166          (scb->SG_list_pointer[3] << 24) | (scb->SG_list_pointer[2] << 16) |
1167          (scb->SG_list_pointer[1] << 8) | scb->SG_list_pointer[0],
1168          (scb->SCSI_cmd_pointer[3] << 24) | (scb->SCSI_cmd_pointer[2] << 16) |
1169          (scb->SCSI_cmd_pointer[1] << 8) | scb->SCSI_cmd_pointer[0],
1170          scb->SCSI_cmd_length);
1171   printk("reserved 0x%x, target status 0x%x, resid SG count %d, resid data count %d\n",
1172          (scb->RESERVED[1] << 8) | scb->RESERVED[0], scb->target_status,
1173          scb->residual_SG_segment_count, (scb->residual_data_count[2] << 16) |
1174          (scb->residual_data_count[1] << 8) | scb->residual_data_count[0]);
1175   printk("data ptr 0x%x, data count %d, host scb 0x%x, next waiting %d\n",
1176          (scb->data_pointer[3] << 24) | (scb->data_pointer[2] << 16) |
1177          (scb->data_pointer[1] << 8) | scb->data_pointer[0],
1178          (scb->data_count[2] << 16) | (scb->data_count[1] << 8) | scb->data_count[0],
1179          (unsigned int) scb->host_scb, scb->next_waiting);
1180   printk("next ptr 0x%lx, Scsi Cmnd 0x%lx, state 0x%x, position %d\n",
1181          (unsigned long) scb->next, (unsigned long) scb->cmd, scb->state,
1182          scb->position);
1183 }
1184 
1185 #else
1186 #  define debug(fmt, args...)
1187 #  define debug_config(x)
1188 #  define debug_scb(x)
1189 #endif AIC7XXX_DEBUG
1190 
1191 /*
1192  * XXX - these options apply unilaterally to _all_ 274x/284x/294x
1193  *       cards in the system. This should be fixed, but then,
1194  *       does anyone really have more than one in a machine?
1195  */
1196 static int aic7xxx_extended = 0;        /* extended translation on? */
1197 static int aic7xxx_no_reset = 0;        /* no resetting of SCSI bus */
1198 
1199 /*+F*************************************************************************
1200  * Function:
1201  *   aic7xxx_setup
1202  *
1203  * Description:
1204  *   Handle Linux boot parameters.
1205  *-F*************************************************************************/
1206 void
1207 aic7xxx_setup(char *s, int *dummy)
     /* [previous][next][first][last][top][bottom][index][help] */
1208 {
1209   int   i;
1210   char *p;
1211 
1212   static struct {
1213     const char *name;
1214     int *flag;
1215   } options[] = {
1216     { "extended",    &aic7xxx_extended },
1217     { "no_reset",    &aic7xxx_no_reset },
1218     { NULL,          NULL}
1219   };
1220 
1221   for (p = strtok(s, ","); p; p = strtok(NULL, ","))
1222   {
1223     for (i = 0; options[i].name; i++)
1224     {
1225       if (!strcmp(options[i].name, p))
1226       {
1227         *(options[i].flag) = !0;
1228       }
1229     }
1230   }
1231 }
1232 
1233 /*+F*************************************************************************
1234  * Function:
1235  *   aic7xxx_loadseq
1236  *
1237  * Description:
1238  *   Load the sequencer code into the controller memory.
1239  *-F*************************************************************************/
1240 static void
1241 aic7xxx_loadseq(int base)
     /* [previous][next][first][last][top][bottom][index][help] */
1242 {
1243   static unsigned char seqprog[] = {
1244     /*
1245      * Each sequencer instruction is 29 bits
1246      * long (fill in the excess with zeroes)
1247      * and has to be loaded from least -> most
1248      * significant byte, so this table has the
1249      * byte ordering reversed.
1250      */
1251 #   include "aic7xxx_seq.h"
1252   };
1253 
1254   /*
1255    * When the AIC-7770 is paused (as on chip reset), the
1256    * sequencer address can be altered and a sequencer
1257    * program can be loaded by writing it, byte by byte, to
1258    * the sequencer RAM port - the Adaptec documentation
1259    * recommends using REP OUTSB to do this, hence the inline
1260    * assembly. Since the address autoincrements as we load
1261    * the program, reset it back to zero afterward. Disable
1262    * sequencer RAM parity error detection while loading, and
1263    * make sure the LOADRAM bit is enabled for loading.
1264    */
1265   outb(PERRORDIS | SEQRESET | LOADRAM, SEQCTL(base));
1266 
1267   asm volatile("cld\n\t"
1268                "rep\n\t"
1269                "outsb"
1270                : /* no output */
1271                :"S" (seqprog), "c" (sizeof(seqprog)), "d" (SEQRAM(base))
1272                :"si", "cx", "dx");
1273 
1274   /*
1275    * WARNING!  This is a magic sequence!  After extensive
1276    * experimentation, it seems that you MUST turn off the
1277    * LOADRAM bit before you play with SEQADDR again, else
1278    * you will end up with parity errors being flagged on
1279    * your sequencer program. (You would also think that
1280    * turning off LOADRAM and setting SEQRESET to reset the
1281    * address to zero would work, but you need to do it twice
1282    * for it to take effect on the address. Timing problem?)
1283    */
1284   do {
1285     /*
1286      * Actually, reset it until
1287      * the address shows up as
1288      * zero just to be safe..
1289      */
1290     outb(SEQRESET | FASTMODE, SEQCTL(base));
1291   } while ((inb(SEQADDR0(base)) != 0) && (inb(SEQADDR1(base)) != 0));
1292 }
1293 
1294 /*+F*************************************************************************
1295  * Function:
1296  *   aic7xxx_delay
1297  *
1298  * Description:
1299  *   Delay for specified amount of time.
1300  *-F*************************************************************************/
1301 static void
1302 aic7xxx_delay(int seconds)
     /* [previous][next][first][last][top][bottom][index][help] */
1303 {
1304   unsigned long i;
1305 
1306   i = jiffies + (seconds * HZ);  /* compute time to stop */
1307 
1308   while (jiffies < i)
1309   {
1310     ;  /* Do nothing! */
1311   }
1312 }
1313 
1314 #ifdef AIC7XXX_POLL
1315 /*+F*************************************************************************
1316  * Function:
1317  *   aic7xxx_poll_scb
1318  *
1319  * Description:
1320  *   Function to poll for command completion when in aborting an SCB.
1321  *-F*************************************************************************/
1322 static void
1323 aic7xxx_poll_scb(struct aic7xxx_host *p,
     /* [previous][next][first][last][top][bottom][index][help] */
1324                  struct aic7xxx_scb  *scb,
1325                  unsigned long       timeout_ticks)
1326 {
1327   unsigned long timer_expiration = jiffies + timeout_ticks;
1328 
1329   while ((jiffies < timer_expiration) && !(scb->timer_status & TIMED_CMD_DONE))
1330   {
1331     udelay(1000);  /* delay for 1 msec. */
1332   }
1333 }
1334 
1335 #else
1336 /*+F*************************************************************************
1337  * Function:
1338  *   aic7xxx_scb_timeout
1339  *
1340  * Description:
1341  *   Called when a SCB reset command times out.  The input is actually
1342  *   a pointer to the SCB.
1343  *-F*************************************************************************/
1344 static void
1345 aic7xxx_scb_timeout(unsigned long data)
     /* [previous][next][first][last][top][bottom][index][help] */
1346 {
1347   struct aic7xxx_scb *scb = (struct aic7xxx_scb *) data;
1348 
1349   scb->timer_status |= TIMER_EXPIRED;
1350   wake_up(&(scb->waiting));
1351 }
1352 
1353 /*+F*************************************************************************
1354  * Function:
1355  *   aic7xxx_scb_untimeout
1356  *
1357  * Description:
1358  *   This function clears the timeout and wakes up a waiting SCB.
1359  *-F*************************************************************************/
1360 static void
1361 aic7xxx_scb_untimeout(struct aic7xxx_scb *scb)
     /* [previous][next][first][last][top][bottom][index][help] */
1362 {
1363   if (scb->timer_status & TIMER_ENABLED)
1364   {
1365     scb->timer_status = TIMED_CMD_DONE;
1366     wake_up(&(scb->waiting));
1367   }
1368 }
1369 #endif
1370 
1371 /*+F*************************************************************************
1372  * Function:
1373  *   aic7xxx_scb_tsleep
1374  *
1375  * Description:
1376  *   Emulates a BSD tsleep where a process can sleep for a specified
1377  *   amount of time, but may be awakened before that.  Linux provides
1378  *   a sleep_on, wake_up, add_timer, and del_timer which can be used to
1379  *   emulate tsleep, but there's not enough information available on
1380  *   how to use them.  For now, we'll just poll for SCB completion.
1381  *
1382  *   The parameter ticks is the number of clock ticks
1383  *   to wait before a timeout.  A 0 is returned if the scb does not
1384  *   timeout, 1 is returned for a timeout.
1385  *-F*************************************************************************/
1386 static int
1387 aic7xxx_scb_tsleep(struct aic7xxx_host *p,
     /* [previous][next][first][last][top][bottom][index][help] */
1388                    struct aic7xxx_scb  *scb,
1389                    unsigned long        ticks)
1390 {
1391   scb->timer_status = TIMER_ENABLED;
1392 #ifdef AIC7XXX_POLL
1393   UNPAUSE_SEQUENCER(p);
1394   aic7xxx_poll_scb(p, scb, ticks);
1395 #else
1396   scb->waiting = &(scb->waitq);
1397   scb->timer.expires = jiffies + ticks;
1398   scb->timer.data = (unsigned long) scb;
1399   scb->timer.function = (timeout_fn) aic7xxx_scb_timeout;
1400   add_timer(&scb->timer);
1401   UNPAUSE_SEQUENCER(p);
1402   sleep_on(&(scb->waiting));
1403   del_timer(&scb->timer);
1404 #endif
1405   if (!(scb->timer_status & TIMED_CMD_DONE))
1406   {
1407     scb->timer_status = 0x0;
1408     return (1);
1409   }
1410   else
1411   {
1412     scb->timer_status = 0x0;
1413     return (0);
1414   }
1415 }
1416 
1417 /*+F*************************************************************************
1418  * Function:
1419  *   rcs_version
1420  *
1421  * Description:
1422  *   Return a string containing just the RCS version number from either
1423  *   an Id or Revison RCS clause.
1424  *-F*************************************************************************/
1425 const char *
1426 rcs_version(const char *version_info)
     /* [previous][next][first][last][top][bottom][index][help] */
1427 {
1428   static char buf[10];
1429   char *bp, *ep;
1430 
1431   bp = NULL;
1432   strcpy(buf, "????");
1433   if (!strncmp(version_info, "$Id: ", 5))
1434   {
1435     if ((bp = strchr(version_info, ' ')) != NULL)
1436     {
1437       bp++;
1438       if ((bp = strchr(bp, ' ')) != NULL)
1439       {
1440         bp++;
1441       }
1442     }
1443   }
1444   else
1445   {
1446     if (!strncmp(version_info, "$Revision: ", 11))
1447     {
1448       if ((bp = strchr(version_info, ' ')) != NULL)
1449       {
1450         bp++;
1451       }
1452     }
1453   }
1454 
1455   if (bp != NULL)
1456   {
1457     if ((ep = strchr(bp, ' ')) != NULL)
1458     {
1459       register int len = ep - bp;
1460 
1461       strncpy(buf, bp, len);
1462       buf[len] = '\0';
1463     }
1464   }
1465 
1466   return buf;
1467 }
1468 
1469 /*+F*************************************************************************
1470  * Function:
1471  *   aic7xxx_info
1472  *
1473  * Description:
1474  *   Return a string describing the driver.
1475  *-F*************************************************************************/
1476 const char *
1477 aic7xxx_info(struct Scsi_Host *notused)
     /* [previous][next][first][last][top][bottom][index][help] */
1478 {
1479   static char buffer[128];
1480 
1481   strcpy(buffer, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) ");
1482   strcat(buffer, rcs_version(AIC7XXX_C_VERSION));
1483   strcat(buffer, "/");
1484   strcat(buffer, rcs_version(AIC7XXX_H_VERSION));
1485   strcat(buffer, "/");
1486   strcat(buffer, rcs_version(AIC7XXX_SEQ_VER));
1487 
1488   return buffer;
1489 }
1490 
1491 /*+F*************************************************************************
1492  * Function:
1493  *   aic7xxx_length
1494  *
1495  * Description:
1496  *   How much data should be transferred for this SCSI command? Stop
1497  *   at segment sg_last if it's a scatter-gather command so we can
1498  *   compute underflow easily.
1499  *-F*************************************************************************/
1500 static unsigned
1501 aic7xxx_length(Scsi_Cmnd *cmd, int sg_last)
     /* [previous][next][first][last][top][bottom][index][help] */
1502 {
1503   int i, segments;
1504   unsigned length;
1505   struct scatterlist *sg;
1506 
1507   segments = cmd->use_sg - sg_last;
1508   sg = (struct scatterlist *) cmd->buffer;
1509 
1510   if (cmd->use_sg)
1511   {
1512     for (i = length = 0; (i < cmd->use_sg) && (i < segments); i++)
1513     {
1514       length += sg[i].length;
1515     }
1516   }
1517   else
1518   {
1519     length = cmd->request_bufflen;
1520   }
1521 
1522   return (length);
1523 }
1524 
1525 /*+F*************************************************************************
1526  * Function:
1527  *   aic7xxx_scsirate
1528  *
1529  * Description:
1530  *   Look up the valid period to SCSIRATE conversion in our table
1531  *-F*************************************************************************/
1532 static void
1533 aic7xxx_scsirate(unsigned char *scsirate, unsigned char period,
     /* [previous][next][first][last][top][bottom][index][help] */
1534                  unsigned char offset, int target, char channel)
1535 {
1536   int i;
1537 
1538   for (i = 0; i < num_aic7xxx_syncrates; i++)
1539   {
1540     if ((aic7xxx_syncrates[i].period - period) >= 0)
1541     {
1542       *scsirate = (aic7xxx_syncrates[i].rate << 4) | (offset & 0x0F);
1543       printk("aic7xxx: target %d, channel %c, now synchronous at %sMb/s, "
1544              "offset = 0x%x\n",
1545              target, channel, aic7xxx_syncrates[i].english, offset);
1546       return;
1547     }
1548   }
1549 
1550   /*
1551    * Default to asyncronous transfer
1552    */
1553   *scsirate = 0;
1554   printk("aic7xxx: target %d, channel %c, using asynchronous transfers\n",
1555          target, channel);
1556 }
1557 
1558 /*+F*************************************************************************
1559  * Function:
1560  *   aic7xxx_putscb
1561  *
1562  * Description:
1563  *   Transfer a SCB to the controller.
1564  *-F*************************************************************************/
1565 static void
1566 aic7xxx_putscb(int base, struct aic7xxx_scb *scb)
     /* [previous][next][first][last][top][bottom][index][help] */
1567 {
1568   /*
1569    * All we need to do, is to output the position
1570    * of the SCB in the SCBARRAY to the QINFIFO
1571    * of the host adapter.
1572    */
1573   outb(scb->position, QINFIFO(base));
1574 }
1575 
1576 /*+F*************************************************************************
1577  * Function:
1578  *   aic7xxx_putscb_dma
1579  *
1580  * Description:
1581  *   DMA a SCB to the controller.
1582  *-F*************************************************************************/
1583 static void
1584 aic7xxx_putscb_dma(int base, struct aic7xxx_scb *scb)
     /* [previous][next][first][last][top][bottom][index][help] */
1585 {
1586   /*
1587    * By turning on the SCB auto increment, any reference
1588    * to the SCB I/O space postincrements the SCB address
1589    * we're looking at. So turn this on and dump the relevant
1590    * portion of the SCB to the card.
1591    */
1592   outb(SCBAUTO, SCBCNT(base));
1593 
1594   asm volatile("cld\n\t"
1595                "rep\n\t"
1596                "outsb"
1597                : /* no output */
1598                :"S" (scb), "c" (31), "d" (SCBARRAY(base))
1599                :"si", "cx", "dx");
1600 
1601   outb(0, SCBCNT(base));
1602 }
1603 
1604 /*+F*************************************************************************
1605  * Function:
1606  *   aic7xxx_getscb
1607  *
1608  * Description:
1609  *   Get a SCB from the controller.
1610  *-F*************************************************************************/
1611 static void
1612 aic7xxx_getscb(int base, struct aic7xxx_scb *scb)
     /* [previous][next][first][last][top][bottom][index][help] */
1613 {
1614   /*
1615    * This is almost identical to aic7xxx_putscb().
1616    */
1617   outb(SCBAUTO, SCBCNT(base));
1618 
1619   asm volatile("cld\n\t"
1620                "rep\n\t"
1621                "insb"
1622                : /* no output */
1623                :"D" (scb), "c" (SCB_UPLOAD_SIZE), "d" (SCBARRAY(base))
1624                :"di", "cx", "dx");
1625 
1626   outb(0, SCBCNT(base));
1627 }
1628 
1629 /*+F*************************************************************************
1630  * Function:
1631  *   aic7xxx_match_scb
1632  *
1633  * Description:
1634  *   Checks to see if an scb matches the target/channel as specified.
1635  *   If target is ALL_TARGETS (-1), then we're looking for any device
1636  *   on the specified channel; this happens when a channel is going
1637  *   to be reset and all devices on that channel must be aborted.
1638  *-F*************************************************************************/
1639 static int
1640 aic7xxx_match_scb(struct aic7xxx_scb *scb, int target, char channel)
     /* [previous][next][first][last][top][bottom][index][help] */
1641 {
1642   int targ = (scb->target_channel_lun >> 4) & 0x0F;
1643   char chan = (scb->target_channel_lun & SELBUSB) ? 'B' : 'A';
1644 
1645   if (target == ALL_TARGETS)
1646   {
1647     return (chan == channel);
1648   }
1649   else
1650   {
1651     return ((chan == channel) && (targ == target));
1652   }
1653 }
1654 
1655 /*+F*************************************************************************
1656  * Function:
1657  *   aic7xxx_unbusy_target
1658  *
1659  * Description:
1660  *   Set the specified target inactive.
1661  *-F*************************************************************************/
1662 static void
1663 aic7xxx_unbusy_target(unsigned char target, char channel, int base)
     /* [previous][next][first][last][top][bottom][index][help] */
1664 {
1665   unsigned char active;
1666   unsigned long active_port = HA_ACTIVE0(base);
1667 
1668   if ((target > 0x07) || (channel == 'B'))
1669   {
1670     /*
1671      * targets on the Second channel or above id 7 store info in byte two
1672      * of HA_ACTIVE
1673      */
1674     active_port++;
1675   }
1676   active = inb(active_port);
1677   active &= ~(0x01 << (target & 0x07));
1678   outb(active_port, active);
1679 }
1680 
1681 /*+F*************************************************************************
1682  * Function:
1683  *   aic7xxx_done
1684  *
1685  * Description:
1686  *   Calls the higher level scsi done function and frees the scb.
1687  *-F*************************************************************************/
1688 static void
1689 aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
     /* [previous][next][first][last][top][bottom][index][help] */
1690 {
1691   long flags;
1692   Scsi_Cmnd *cmd = scb->cmd;
1693 
1694   if (scb->timer_status & TIMER_ENABLED)
1695   {
1696 #ifdef AIC7XXX_POLL
1697     scb->timer_status |= TIMED_CMD_DONE;
1698 #else
1699     aic7xxx_scb_untimeout(scb);
1700 #endif
1701   }
1702   else
1703   {
1704     /*
1705      * This is a critical section, since we don't want the
1706      * queue routine mucking with the host data.
1707      */
1708     save_flags(flags);
1709     cli();
1710 
1711     /*
1712      * Process the command after marking the scb as free
1713      * and adding it to the free list.
1714      */
1715     scb->state = SCB_FREE;
1716     scb->next = p->free_scb;
1717     p->free_scb = &(p->scb_array[scb->position]);
1718     scb->cmd = NULL;
1719 
1720     restore_flags(flags);
1721 
1722     cmd->scsi_done(cmd);
1723   }
1724 }
1725 
1726 /*+F*************************************************************************
1727  * Function:
1728  *   aic7xxx_add_waiting_scb
1729  *
1730  * Description:
1731  *   Add this SCB to the "waiting for selection" list.
1732  *-F*************************************************************************/
1733 static void
1734 aic7xxx_add_waiting_scb(u_long              base,
     /* [previous][next][first][last][top][bottom][index][help] */
1735                         struct aic7xxx_scb *scb,
1736                         insert_type         where)
1737 {
1738   unsigned char head, tail;
1739   unsigned char curscb;
1740 
1741   curscb = inb(SCBPTR(base));
1742   head = inb(WAITING_SCBH(base));
1743   tail = inb(WAITING_SCBT(base));
1744   if (head == SCB_LIST_NULL)
1745   {
1746     /*
1747      * List was empty
1748      */
1749     head = scb->position;
1750     tail = SCB_LIST_NULL;
1751   }
1752   else
1753   {
1754     if (where == LIST_HEAD)
1755     {
1756       outb(scb->position, SCBPTR(base));
1757       outb(head, SCBARRAY(base) + 30);
1758       head = scb->position;
1759     }
1760     else
1761     {
1762       if (tail == SCB_LIST_NULL)
1763       {
1764         /*
1765          * List had one element
1766          */
1767         tail = scb->position;
1768         outb(head, SCBPTR(base));
1769         outb(tail, SCBARRAY(base) + 30);
1770       }
1771       else
1772       {
1773         if (where == LIST_SECOND)
1774         {
1775           unsigned char third_scb;
1776 
1777           outb(head, SCBPTR(base));
1778           third_scb = inb(SCBARRAY(base) + 30);
1779           outb(scb->position, SCBARRAY(base) + 30);
1780           outb(scb->position, SCBPTR(base));
1781           outb(third_scb, SCBARRAY(base) + 30);
1782         }
1783         else
1784         {
1785           outb(tail, SCBPTR(base));
1786           tail = scb->position;
1787           outb(tail, SCBARRAY(base) + 30);
1788         }
1789       }
1790     }
1791   }
1792   outb(head, WAITING_SCBH(base));
1793   outb(tail, WAITING_SCBT(base));
1794   outb(curscb, SCBPTR(base));
1795 }
1796 
1797 /*+F*************************************************************************
1798  * Function:
1799  *   aic7xxx_abort_waiting_scb
1800  *
1801  * Description:
1802  *   Manipulate the waiting for selection list and return the
1803  *   scb that follows the one that we remove.
1804  *-F*************************************************************************/
1805 static unsigned char
1806 aic7xxx_abort_waiting_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
     /* [previous][next][first][last][top][bottom][index][help] */
1807                           unsigned char prev, unsigned char timedout_scb)
1808 {
1809   unsigned char curscb, next;
1810   int target = (scb->target_channel_lun >> 4) & 0x0F;
1811   char channel = (scb->target_channel_lun & SELBUSB) ? 'B' : 'A';
1812   int base = p->base;
1813 
1814   /*
1815    * Select the SCB we want to abort and
1816    * pull the next pointer out of it.
1817    */
1818   curscb = inb(SCBPTR(base));
1819   outb(scb->position, SCBPTR(base));
1820   next = inb(SCBARRAY(base) + 30);
1821 
1822   /*
1823    * Clear the necessary fields
1824    */
1825   outb(SCB_NEEDDMA, SCBARRAY(base));
1826   outb(SCB_LIST_NULL, SCBARRAY(base) + 30);
1827   aic7xxx_unbusy_target(target, channel, base);
1828 
1829   /*
1830    * Update the waiting list
1831    */
1832   if (prev == SCB_LIST_NULL)
1833   {
1834     /*
1835      * First in the list
1836      */
1837     outb(next, WAITING_SCBH(base));
1838   }
1839   else
1840   {
1841     /*
1842      * Select the scb that pointed to us and update its next pointer.
1843      */
1844     outb(prev, SCBPTR(base));
1845     outb(next, SCBARRAY(base) + 30);
1846   }
1847   /*
1848    * Update the tale pointer
1849    */
1850   if (inb(WAITING_SCBT(base)) == scb->position)
1851   {
1852     outb(prev, WAITING_SCBT(base));
1853   }
1854 
1855   /*
1856    * Point us back at the original scb position
1857    * and inform the SCSI system that the command
1858    * has been aborted.
1859    */
1860   outb(curscb, SCBPTR(base));
1861   scb->state |= SCB_ABORTED;
1862   scb->cmd->result = (DID_RESET << 16);
1863   aic7xxx_done(p, scb);
1864 
1865   return (next);
1866 }
1867 
1868 /*+F*************************************************************************
1869  * Function:
1870  *   aic7xxx_reset_device
1871  *
1872  * Description:
1873  *   The device at the given target/channel has been reset.  Abort
1874  *   all active and queued scbs for that target/channel.
1875  *-F*************************************************************************/
1876 static int
1877 aic7xxx_reset_device(struct aic7xxx_host *p, int target, char channel,
     /* [previous][next][first][last][top][bottom][index][help] */
1878                      unsigned char timedout_scb)
1879 {
1880   int base = p->base;
1881   struct aic7xxx_scb *scb;
1882   unsigned char active_scb;
1883   int i = 0;
1884   int found = 0;
1885 
1886   /*
1887    * Restore this when we're done
1888    */
1889   active_scb = inb(SCBPTR(base));
1890 
1891   /*
1892    * Search the QINFIFO.
1893    */
1894   {
1895     int saved_queue[AIC7XXX_MAXSCB];
1896     int queued = inb(QINCNT(base));
1897 
1898     for (i = 0; i < (queued - found); i++)
1899     {
1900       saved_queue[i] = inb(QINFIFO(base));
1901       scb = &(p->scb_array[saved_queue[i]]);
1902       if (aic7xxx_match_scb(scb, target, channel))
1903       {
1904         /*
1905          * We found an scb that needs to be aborted.
1906          */
1907         scb->state |= SCB_ABORTED;
1908         scb->cmd->result = (DID_RESET << 16);
1909         aic7xxx_done(p, scb);
1910         outb(scb->position, SCBPTR(base));
1911         outb(SCB_NEEDDMA, SCBARRAY(base));
1912         i--;
1913         found++;
1914       }
1915     }
1916     /*
1917      * Now put the saved scbs back.
1918      */
1919     for (queued = 0; queued < i; queued++)
1920     {
1921       outb(saved_queue[queued], QINFIFO(base));
1922     }
1923   }
1924 
1925   /*
1926    * Search waiting for selection list.
1927    */
1928   {
1929     unsigned char next, prev;
1930 
1931     next = inb(WAITING_SCBH(base));  /* Start at head of list. */
1932     prev = SCB_LIST_NULL;
1933 
1934     while (next != SCB_LIST_NULL)
1935     {
1936       scb = &(p->scb_array[next]);
1937       /*
1938        * Select the SCB.
1939        */
1940       if (aic7xxx_match_scb(scb, target, channel))
1941       {
1942         next = aic7xxx_abort_waiting_scb(p, scb, prev, timedout_scb);
1943         found++;
1944       }
1945       else
1946       {
1947         outb(scb->position, SCBPTR(base));
1948         prev = next;
1949         next = inb(SCBARRAY(base) + 30);
1950       }
1951     }
1952   }
1953 
1954   /*
1955    * Go through the entire SCB array now and look for
1956    * commands for this target that are active.  These
1957    * are other (most likely tagged) commands that
1958    * were disconnected when the reset occured.
1959    */
1960   for(i = 0; i < p->numscb; i++)
1961   {
1962     scb = &(p->scb_array[i]);
1963     if ((scb->state & SCB_ACTIVE) && aic7xxx_match_scb(scb, target, channel))
1964     {
1965       /*
1966        * Ensure the target is "free"
1967        */
1968       aic7xxx_unbusy_target(target, channel, base);
1969       outb(scb->position, SCBPTR(base));
1970       outb(SCB_NEEDDMA, SCBARRAY(base));
1971       scb->state |= SCB_ABORTED;
1972       scb->cmd->result = (DID_RESET << 16);
1973       aic7xxx_done(p, scb);
1974       found++;
1975     }
1976   }
1977 
1978   outb(active_scb, SCBPTR(base));
1979   return (found);
1980 }
1981 
1982 /*+F*************************************************************************
1983  * Function:
1984  *   aic7xxx_reset_current_bus
1985  *
1986  * Description:
1987  *   Reset the current SCSI bus.
1988  *-F*************************************************************************/
1989 static void
1990 aic7xxx_reset_current_bus(int base)
     /* [previous][next][first][last][top][bottom][index][help] */
1991 {
1992   outb(SCSIRSTO, SCSISEQ(base));
1993   udelay(1000);
1994   outb(0, SCSISEQ(base));
1995 }
1996 
1997 /*+F*************************************************************************
1998  * Function:
1999  *   aic7xxx_reset_channel
2000  *
2001  * Description:
2002  *   Reset the channel.
2003  *-F*************************************************************************/
2004 static int
2005 aic7xxx_reset_channel(struct aic7xxx_host *p, char channel,
     /* [previous][next][first][last][top][bottom][index][help] */
2006                      unsigned char timedout_scb)
2007 {
2008   int base = p->base;
2009   unsigned char sblkctl;
2010   char cur_channel;
2011   unsigned long offset, offset_max;
2012   int found;
2013 
2014   /*
2015    * Clean up all the state information for the
2016    * pending transactions on this bus.
2017    */
2018   found = aic7xxx_reset_device(p, ALL_TARGETS, channel, timedout_scb);
2019 
2020   if (channel == 'B')
2021   {
2022     p->needsdtr |= (p->needsdtr_copy & 0xFF00);
2023     p->sdtr_pending &= 0x00FF;
2024     outb(0, HA_ACTIVE1(base));
2025     offset = HA_TARG_SCRATCH(base) + 8;
2026     offset_max = HA_TARG_SCRATCH(base) + 16;
2027   }
2028   else
2029   {
2030     if (p->bus_type == AIC_WIDE)
2031     {
2032       p->needsdtr = p->needsdtr_copy;
2033       p->needwdtr = p->needwdtr_copy;
2034       p->sdtr_pending = 0;
2035       p->wdtr_pending = 0;
2036       outb(0, HA_ACTIVE0(base));
2037       outb(0, HA_ACTIVE1(base));
2038       offset = HA_TARG_SCRATCH(base);
2039       offset_max = HA_TARG_SCRATCH(base) + 16;
2040     }
2041     else
2042     {
2043       p->needsdtr |= (p->needsdtr_copy & 0x00FF);
2044       p->sdtr_pending &= 0xFF00;
2045       outb(0, HA_ACTIVE0(base));
2046       offset = HA_TARG_SCRATCH(base);
2047       offset_max = HA_TARG_SCRATCH(base) + 8;
2048     }
2049   }
2050   while (offset < offset_max)
2051   {
2052     /*
2053      * Revert to async/narrow transfers
2054      * until we renegotiate.
2055      */
2056     u_char targ_scratch;
2057     targ_scratch = inb(offset);
2058     targ_scratch &= SXFR;
2059     outb(targ_scratch, offset);
2060     offset++;
2061   }
2062 
2063   /*
2064    * Reset the bus and unpause/restart the controller
2065    */
2066 
2067   /*
2068    * Case 1: Command for another bus is active
2069    */
2070   sblkctl = inb(SBLKCTL(base));
2071   cur_channel = (sblkctl & SELBUSB) ? 'B' : 'A';
2072   if (cur_channel != channel)
2073   {
2074     /*
2075      * Stealthily reset the other bus without upsetting the current bus
2076      */
2077     outb(sblkctl ^ SELBUSB, SBLKCTL(base));
2078     aic7xxx_reset_current_bus(base);
2079     outb(sblkctl, SBLKCTL(base));
2080     UNPAUSE_SEQUENCER(p);
2081   }
2082   /*
2083    * Case 2: A command from this bus is active or we're idle
2084    */
2085   else
2086   {
2087     aic7xxx_reset_current_bus(base);
2088     RESTART_SEQUENCER(p);
2089   }
2090 
2091   return found;
2092 }
2093 
2094 /*+F*************************************************************************
2095  * Function:
2096  *   aic7xxx_isr
2097  *
2098  * Description:
2099  *   SCSI controller interrupt handler.
2100  *
2101  *   NOTE: Since we declared this using SA_INTERRUPT, interrupts should
2102  *         be disabled all through this function unless we say otherwise.
2103  *-F*************************************************************************/
2104 static void
2105 aic7xxx_isr(int irq, struct pt_regs * regs)
     /* [previous][next][first][last][top][bottom][index][help] */
2106 {
2107   int base, intstat;
2108   struct aic7xxx_host *p;
2109   struct aic7xxx_scb *scb;
2110   unsigned char ha_flags, transfer;
2111   unsigned char scsi_id, bus_width;
2112   unsigned char offset, rate, scratch, scratch_offset;
2113   unsigned char max_offset, rej_byte;
2114   unsigned short target_mask, active;
2115   char channel;
2116   void *addr;
2117   int actual;
2118   int scb_index;
2119   Scsi_Cmnd *cmd;
2120 
2121   p = (struct aic7xxx_host *) aic7xxx_boards[irq]->hostdata;
2122 
2123   /*
2124    * Search for the host with a pending interrupt.  If we can't find
2125    * one, then we've encountered a spurious interrupt.
2126    */
2127   while ((p != NULL) && !(inb(INTSTAT(p->base)) & INT_PEND))
2128   {
2129     if (p->next == NULL)
2130     {
2131       p = NULL;
2132     }
2133     else
2134     {
2135       p = (struct aic7xxx_host *) p->next->hostdata;
2136     }
2137   }
2138 
2139   if (p == NULL)
2140   {
2141     if (aic7xxx_spurious_count == 1)
2142     {
2143       aic7xxx_spurious_count = 2;
2144       printk("aic7xxx_isr: Encountered spurious interrupt.\n");
2145       return;
2146     }
2147     else
2148     {
2149       /*
2150        * The best we can do is to set p back to head of list and process
2151        * the erroneous interrupt - most likely a BRKADRINT.
2152        */
2153       p = (struct aic7xxx_host *) aic7xxx_boards[irq]->hostdata;
2154     }
2155   }
2156 
2157   /*
2158    * Keep track of interrupts for /proc/scsi
2159    */
2160   p->isr_count++;
2161 
2162   if ((p->a_scanned == 0) && (p->isr_count == 1))
2163   {
2164     /*
2165      * We must only have one card at this IRQ and it must have been
2166      * added to the board data before the spurious interrupt occurred.
2167      * It is sufficient that we check isr_count and not the spurious
2168      * interrupt count.
2169      */
2170     printk("aic7xxx_isr: Encountered spurious interrupt.\n");
2171     return;
2172   }
2173 
2174   base = p->base;
2175   /*
2176    * Handle all the interrupt sources - especially for SCSI
2177    * interrupts, we won't get a second chance at them.
2178    */
2179   intstat = inb(INTSTAT(base));
2180 
2181   if (intstat & BRKADRINT)
2182   {
2183     int i;
2184     unsigned char errno = inb(ERROR(base));
2185 
2186     printk("aic7xxx_isr: brkadrint (0x%x):\n", errno);
2187     for (i = 0; i < NUMBER(hard_error); i++)
2188     {
2189       if (errno & hard_error[i].errno)
2190       {
2191         printk("  %s\n", hard_error[i].errmesg);
2192       }
2193     }
2194 
2195     panic("aic7xxx_isr: brkadrint, error = 0x%x, seqaddr = 0x%x\n",
2196           inb(ERROR(base)), (inb(SEQADDR1(base)) << 8) | inb(SEQADDR0(base)));
2197   }
2198 
2199   if (intstat & SEQINT)
2200   {
2201     /*
2202      * Although the sequencer is paused immediately on
2203      * a SEQINT, an interrupt for a SCSIINT condition will
2204      * unpaused the sequencer before this point.
2205      */
2206     PAUSE_SEQUENCER(p);
2207 
2208     scsi_id = (inb(SCSIID(base)) >> 4) & 0x0F;
2209     scratch_offset = scsi_id;
2210     channel = 'A';
2211     if (inb(SBLKCTL(base)) & SELBUSB)
2212     {
2213       channel = 'B';
2214       scratch_offset += 8;
2215     }
2216     target_mask = (0x01 << scratch_offset);
2217 
2218     switch (intstat & SEQINT_MASK)
2219     {
2220       case BAD_PHASE:
2221         panic("aic7xxx_isr: unknown scsi bus phase\n");
2222         break;
2223 
2224       case SEND_REJECT:
2225         rej_byte = inb(HA_REJBYTE(base));
2226         if (rej_byte != 0x20)
2227         {
2228           debug("aic7xxx_isr warning: issuing message reject, 1st byte 0x%x\n",
2229                 rej_byte);
2230         }
2231         else
2232         {
2233           scb_index = inb(SCBPTR(base));
2234           scb = &(p->scb_array[scb_index]);
2235           printk("aic7xxx_isr warning: Tagged message rejected for target %d,"
2236                  " channel %c.\n", scsi_id, channel);
2237           scb->cmd->device->tagged_supported = 0;
2238           scb->cmd->device->tagged_queue = 0;
2239         }
2240         break;
2241 
2242       case NO_IDENT:
2243         panic("aic7xxx_isr: Target %d, channel %c, did not send an IDENTIFY "
2244               "message.  SAVED_TCL = 0x%x\n",
2245               scsi_id, channel, inb(SAVED_TCL(base)));
2246         break;
2247 
2248       case NO_MATCH:
2249         printk("aic7xxx_isr: No active SCB for reconnecting target %d, "
2250               "channel %c - issuing ABORT\n", scsi_id, channel);
2251         printk("SAVED_TCL = 0x%x\n", inb(SAVED_TCL(base)));
2252         aic7xxx_unbusy_target(scsi_id, channel, base);
2253         outb(SCB_NEEDDMA, SCBARRAY(base));
2254 
2255         outb(CLRSELTIMEO, CLRSINT1(base));
2256         RESTART_SEQUENCER(p);
2257         break;
2258 
2259       case MSG_SDTR:
2260         /*
2261          * Help the sequencer to translate the negotiated
2262          * transfer rate. Transfer is 1/4 the period
2263          * in ns as is returned by the sync negotiation
2264          * message. So, we must multiply by four.
2265          */
2266         transfer = (inb(HA_ARG_1(base)) << 2);
2267         offset = inb(ACCUM(base));
2268         scratch = inb(HA_TARG_SCRATCH(base) + scratch_offset);
2269         /*
2270          * The maximum offset for a wide device is 0x08; for a
2271          * 8-bit bus device the maximum offset is 0x0F.
2272          */
2273         if (scratch & WIDEXFER)
2274         {
2275           max_offset = 0x08;
2276         }
2277         else
2278         {
2279           max_offset = 0x0F;
2280         }
2281         aic7xxx_scsirate(&rate, transfer, MIN(offset, max_offset), scsi_id, channel);
2282         /*
2283          * Preserve the wide transfer flag.
2284          */
2285         scratch = rate | (scratch & WIDEXFER);
2286         outb(scratch, HA_TARG_SCRATCH(base) + scratch_offset);
2287         outb(scratch, SCSIRATE(base));
2288         if ((scratch & 0x0F) == 0)
2289         { /*
2290            * The requested rate was so low that asynchronous transfers
2291            * are faster (not to mention the controller won't support
2292            * them), so we issue a reject to ensure we go to asynchronous
2293            * transfers.
2294            */
2295            outb(SEND_REJ, HA_RETURN_1(base));
2296         }
2297         else
2298         {
2299           /*
2300            * See if we initiated Sync Negotiation
2301            */
2302           if (p->sdtr_pending & target_mask)
2303           {
2304             /*
2305              * Don't send an SDTR back to the target.
2306              */
2307             outb(0, HA_RETURN_1(base));
2308           }
2309           else
2310           {
2311             /*
2312              * Send our own SDTR in reply.
2313              */
2314             printk("aic7xxx_isr: Sending SDTR!!\n");
2315             outb(SEND_SDTR, HA_RETURN_1(base));
2316           }
2317         }
2318         /*
2319          * Clear the flags.
2320          */
2321         p->needsdtr &= ~target_mask;
2322         p->sdtr_pending &= ~target_mask;
2323 #if 0
2324   scb_index = inb(SCBPTR(base));
2325   scb = &(p->scb_array[scb_index]);
2326   debug_scb(scb);
2327 #endif
2328 
2329         break;
2330 
2331       case MSG_WDTR:
2332       {
2333         bus_width = inb(ACCUM(base));
2334         printk("aic7xxx_isr: Received MSG_WDTR, scsi_id %d, channel %c "
2335                "needwdtr = 0x%x\n", scsi_id, channel, p->needwdtr);
2336         scratch = inb(HA_TARG_SCRATCH(base) + scratch_offset);
2337 
2338         if (p->wdtr_pending & target_mask)
2339         {
2340           /*
2341            * Don't send an WDTR back to the target, since we asked first.
2342            */
2343           outb(0, HA_RETURN_1(base));
2344           switch (bus_width)
2345           {
2346             case BUS_8_BIT:
2347               scratch &= 0x7F;
2348               break;
2349 
2350             case BUS_16_BIT:
2351               printk("aic7xxx_isr: target %d, channel %c, using 16 bit transfers\n",
2352                      scsi_id, channel);
2353               scratch |= 0x80;
2354               break;
2355           }
2356         }
2357         else
2358         {
2359           /*
2360            * Send our own WDTR in reply.
2361            */
2362           printk("aic7xxx_isr: Will send WDTR!!\n");
2363           switch (bus_width)
2364           {
2365             case BUS_8_BIT:
2366               scratch &= 0x7F;
2367               break;
2368 
2369             case BUS_32_BIT:
2370               /*
2371                * Negotiate 16 bits.
2372                */
2373               bus_width = BUS_16_BIT;
2374               /* Yes, we mean to fall thru here. */
2375 
2376             case BUS_16_BIT:
2377               printk("aic7xxx_isr: target %d, channel %c, using 16 bit transfers\n",
2378                      scsi_id, channel);
2379               scratch |= 0x80;
2380               break;
2381           }
2382           outb(bus_width | SEND_WDTR, HA_RETURN_1(base));
2383         }
2384         p->needwdtr &= ~target_mask;
2385         p->wdtr_pending &= ~target_mask;
2386         outb(scratch, HA_TARG_SCRATCH(base) + scratch_offset);
2387         outb(scratch, SCSIRATE(base));
2388         break;
2389       }
2390 
2391       case MSG_REJECT:
2392       {
2393         /*
2394          * What we care about here is if we had an
2395          * outstanding SDTR or WDTR message for this
2396          * target. If we did, this is a signal that
2397          * the target is refusing negotiation.
2398          */
2399 
2400         scratch = inb(HA_TARG_SCRATCH(base) + scratch_offset);
2401 
2402         if (p->wdtr_pending & target_mask)
2403         {
2404           /*
2405            * note 8bit xfers and clear flag
2406            */
2407           scratch &= 0x7F;
2408           p->needwdtr &= ~target_mask;
2409           p->wdtr_pending &= ~target_mask;
2410           outb(scratch, HA_TARG_SCRATCH(base) + scratch_offset);
2411           printk("aic7xxx: target %d, channel %c, refusing WIDE negotiation. "
2412                  "Using 8 bit transfers\n", scsi_id, channel);
2413         }
2414         else
2415         {
2416           if (p->sdtr_pending & target_mask)
2417           {
2418             /*
2419              * note asynch xfers and clear flag
2420              */
2421             scratch &= 0xF0;
2422             p->needsdtr &= ~target_mask;
2423             p->sdtr_pending &= ~target_mask;
2424             outb(scratch, HA_TARG_SCRATCH(base) + scratch_offset);
2425             printk("aic7xxx: target %d, channel %c, refusing syncronous negotiation. "
2426                    "Using asyncronous transfers\n", scsi_id, channel);
2427           }
2428           /*
2429            * Otherwise, we ignore it.
2430            */
2431         }
2432         outb(scratch, HA_TARG_SCRATCH(base) + scratch_offset);
2433         outb(scratch, SCSIRATE(base));
2434         break;
2435       }
2436 
2437       case BAD_STATUS:
2438         scb_index = inb(SCBPTR(base));
2439         scb = &(p->scb_array[scb_index]);
2440         outb(0, HA_RETURN_1(base));   /* CHECK_CONDITION may change this */
2441         if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
2442         {
2443           printk("aic7xxx_isr: referenced scb not valid "
2444                  "during seqint 0x%x scb(%d) state(%x), cmd(%x)\n",
2445                  intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2446         }
2447         else
2448         {
2449           cmd = scb->cmd;
2450           aic7xxx_getscb(base, scb);
2451           aic7xxx_status(cmd) = scb->target_status;
2452 
2453           cmd->result |= scb->target_status;
2454 
2455           switch (status_byte(scb->target_status))
2456           {
2457             case GOOD:
2458               printk("aic7xxx_isr: Interrupted for status of 0???\n");
2459               break;
2460 
2461             case CHECK_CONDITION:
2462               if ((aic7xxx_error(cmd) == 0) && !(cmd->flags & WAS_SENSE))
2463               {
2464                 unsigned char tcl;
2465                 unsigned char control;
2466                 void         *req_buf;
2467 
2468                 tcl = scb->target_channel_lun;
2469                 /*
2470                  * Send a sense command to the requesting target.
2471                  */
2472                 cmd->flags |= WAS_SENSE;
2473                 memcpy((void *) scb->sense_cmd, (void *) generic_sense,
2474                        sizeof(generic_sense));
2475 
2476                 scb->sense_cmd[1] = (cmd->lun << 5);
2477                 scb->sense_cmd[4] = sizeof(cmd->sense_buffer);
2478 
2479                 scb->sense_sg.address = (char *) &cmd->sense_buffer;
2480                 scb->sense_sg.length = sizeof(cmd->sense_buffer);
2481                 req_buf = &scb->sense_sg;
2482                 cmd->cmd_len = COMMAND_SIZE(cmd->cmnd[0]);
2483                 control = scb->control;
2484                 memset(scb, 0, SCB_DOWNLOAD_SIZE);
2485                 scb->control = control & SCB_DISCENB;
2486                 scb->target_channel_lun = tcl;
2487                 addr = scb->sense_cmd;
2488                 scb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]);
2489                 memcpy(scb->SCSI_cmd_pointer, &addr,
2490                        sizeof(scb->SCSI_cmd_pointer));
2491                 scb->SG_segment_count = 1;
2492                 memcpy(scb->SG_list_pointer, &req_buf,
2493                         sizeof(scb->SG_list_pointer));
2494                 scb->data_count[0] = scb->sense_sg.length & 0xFF;
2495                 scb->data_count[1] = (scb->sense_sg.length >> 8) & 0xFF;
2496                 scb->data_count[2] = (scb->sense_sg.length >> 16) & 0xFF;
2497                 memcpy(scb->data_pointer, &(scb->sense_sg.address), 4);
2498 
2499                 outb(SCBAUTO, SCBCNT(base));
2500                 asm volatile("cld\n\t"
2501                              "rep\n\t"
2502                              "outsb"
2503                              : /* no output */
2504                              :"S" (scb), "c" (SCB_DOWNLOAD_SIZE), "d" (SCBARRAY(base))
2505                              :"si", "cx", "dx");
2506                 outb(0, SCBCNT(base));
2507                 outb(SCB_LIST_NULL, (SCBARRAY(base) + 30));
2508                 /*
2509                  * Ensure that the target is "BUSY" so we don't get overlapping
2510                  * commands if we happen to be doing tagged I/O.
2511                  */
2512                 active = inb(HA_ACTIVE0(base)) | (inb(HA_ACTIVE1(base)) << 8);
2513                 active |= target_mask;
2514                 outb(active & 0xFF, HA_ACTIVE0(base));
2515                 outb((active >> 8) & 0xFF, HA_ACTIVE1(base));
2516 
2517                 aic7xxx_add_waiting_scb(base, scb, LIST_HEAD);
2518                 outb(SEND_SENSE, HA_RETURN_1(base));
2519               }  /* first time sense, no errors */
2520               else
2521               {
2522                 /*
2523                  * Indicate that we asked for sense, have the sequencer do
2524                  * a normal command complete, and have the scsi driver handle
2525                  * this condition.
2526                  */
2527                 cmd->flags |= ASKED_FOR_SENSE;
2528               }
2529               break;
2530 
2531             case BUSY:
2532               printk("aic7xxx_isr: Target busy\n");
2533               if (!aic7xxx_error(cmd))
2534               {
2535                 aic7xxx_error(cmd) = DID_BUS_BUSY;
2536               }
2537               break;
2538 
2539             case QUEUE_FULL:
2540               printk("aic7xxx_isr: Queue full\n");
2541               if (!aic7xxx_error(cmd))
2542               {
2543                 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2544               }
2545               break;
2546 
2547             default:
2548               printk("aic7xxx_isr: Unexpected target status 0x%x\n",
2549                      scb->target_status);
2550               if (!aic7xxx_error(cmd))
2551               {
2552                 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2553               }
2554               break;
2555           }  /* end switch */
2556         }  /* end else of */
2557         break;
2558 
2559       case RESIDUAL:
2560         scb_index = inb(SCBPTR(base));
2561         scb = &(p->scb_array[scb_index]);
2562         if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
2563         {
2564           printk("aic7xxx_isr: referenced scb not valid "
2565                  "during seqint 0x%x scb(%d) state(%x), cmd(%x)\n",
2566                  intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2567         }
2568         else
2569         {
2570           cmd = scb->cmd;
2571           /*
2572            *  Don't destroy valid residual information with
2573            *  residual coming from a check sense operation.
2574            */
2575           if (!(cmd->flags & WAS_SENSE))
2576           {
2577             /*
2578              *  We had an underflow. At this time, there's only
2579              *  one other driver that bothers to check for this,
2580              *  and cmd->underflow seems to be set rather half-
2581              *  heartedly in the higher-level SCSI code.
2582              */
2583             actual = aic7xxx_length(cmd, scb->residual_SG_segment_count);
2584 
2585             actual -= ((inb(SCBARRAY(base + 17)) << 16) |
2586                        (inb(SCBARRAY(base + 16)) <<  8) |
2587                        inb(SCBARRAY(base + 15)));
2588 
2589             if (actual < cmd->underflow)
2590             {
2591               printk("aic7xxx: target %d underflow - "
2592                      "wanted (at least) %u, got %u, count=%d\n",
2593                      cmd->target, cmd->underflow, actual, inb(SCBARRAY(base + 18)));
2594               aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2595               aic7xxx_status(cmd) = scb->target_status;
2596             }
2597           }
2598         }
2599         break;
2600 
2601       case ABORT_TAG:
2602         scb_index = inb(SCBPTR(base));
2603         scb = &(p->scb_array[scb_index]);
2604         if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
2605         {
2606           printk("aic7xxx_isr: referenced scb not valid "
2607                  "during seqint 0x%x scb(%d) state(%x), cmd(%x)\n",
2608                  intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2609         }
2610         else
2611         {
2612           cmd = scb->cmd;
2613           /*
2614            * We didn't recieve a valid tag back from the target
2615            * on a reconnect.
2616            */
2617           printk("aic7xxx_isr: invalid tag recieved on channel %c "
2618                  "target %d, lun %d -- sending ABORT_TAG\n",
2619                   channel, scsi_id, cmd->lun & 0x07);
2620 
2621           cmd->result = (DID_RETRY_COMMAND << 16);
2622           aic7xxx_done(p, scb);
2623         }
2624         break;
2625 
2626       case AWAITING_MSG:
2627         scb_index = inb(SCBPTR(base));
2628         scb = &(p->scb_array[scb_index]);
2629         if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
2630         {
2631           printk("aic7xxx_isr: referenced scb not valid "
2632                  "during seqint 0x%x scb(%d) state(%x), cmd(%x)\n",
2633                  intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2634         }
2635         else
2636         {
2637           /*
2638            * This SCB had a zero length command, informing the sequencer
2639            * that we wanted to send a special message to this target.
2640            * We only do this for BUS_DEVICE_RESET messages currently.
2641            */
2642            if (scb->state & SCB_DEVICE_RESET)
2643            {
2644              outb(MSG_BUS_DEVICE_RESET, HA_MSG_START(base));
2645              outb(1, HA_MSG_LEN(base));
2646            }
2647            else
2648            {
2649              panic("aic7xxx_isr: AWAITING_SCB for an SCB that does "
2650                    "not have a waiting message");
2651            }
2652         }
2653         break;
2654 
2655       case IMMEDDONE:
2656         scb_index = inb(SCBPTR(base));
2657         scb = &(p->scb_array[scb_index]);
2658         if (scb->state & SCB_DEVICE_RESET)
2659         {
2660           int found;
2661 
2662           /*
2663            * Go back to async/narrow transfers and renogiate.
2664            */
2665           aic7xxx_unbusy_target(scsi_id, channel, base);
2666           p->needsdtr |= (p->needsdtr_copy & target_mask);
2667           p->needwdtr |= (p->needwdtr_copy & target_mask);
2668           p->sdtr_pending &= ~target_mask;
2669           p->wdtr_pending &= ~target_mask;
2670           scratch = inb(HA_TARG_SCRATCH(base) + scratch_offset);
2671           scratch &= SXFR;
2672           outb(scratch, HA_TARG_SCRATCH(base));
2673           found = aic7xxx_reset_device(p, (int) scsi_id, channel, SCB_LIST_NULL);
2674         }
2675         else
2676         {
2677           panic("aic7xxx_isr: Immediate complete for unknown operation.\n");
2678         }
2679         break;
2680 
2681       default:               /* unknown */
2682         debug("aic7xxx_isr: seqint, intstat = 0x%x, scsisigi = 0x%x\n",
2683               intstat, inb(SCSISIGI(base)));
2684         break;
2685     }
2686     outb(CLRSEQINT, CLRINT(base));
2687     UNPAUSE_SEQUENCER(p);
2688   }
2689 
2690   if (intstat & SCSIINT)
2691   {
2692     int status = inb(SSTAT1(base));
2693 
2694     scb_index = inb(SCBPTR(base));
2695     scb = &(p->scb_array[scb_index]);
2696     if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
2697     {
2698       printk("aic7xxx_isr: no command for scb (scsiint)\n");
2699       /*
2700        * Turn off the interrupt and set status
2701        * to zero, so that it falls through the
2702        * reset of the SCSIINT code.
2703        */
2704       outb(status, CLRSINT1(base));
2705       UNPAUSE_SEQUENCER(p);
2706       outb(CLRSCSIINT, CLRINT(base));
2707       status = 0;
2708       scb = NULL;
2709     }
2710     else
2711     {
2712       cmd = scb->cmd;
2713 
2714       /*
2715        * Only the SCSI Status 1 register has information
2716        * about exceptional conditions that we'd have a
2717        * SCSIINT about; anything in SSTAT0 will be handled
2718        * by the sequencer. Note that there can be multiple
2719        * bits set.
2720        */
2721       if (status & SELTO)
2722       {
2723         unsigned char target_mask = (1 << (cmd->target & 0x07));
2724         unsigned char waiting;
2725 
2726         /*
2727          * Hardware selection timer has expired. Turn
2728          * off SCSI selection sequence.
2729          */
2730         outb(ENRSELI, SCSISEQ(base));
2731         cmd->result = (DID_TIME_OUT << 16);
2732         /*
2733          * Clear an pending messages for the timed out
2734          * target and mark the target as free.
2735          */
2736         ha_flags = inb(HA_FLAGS(base));
2737         outb(ha_flags & ~ACTIVE_MSG, HA_FLAGS(base));
2738 
2739         if (scb->target_channel_lun & 0x88)
2740         {
2741           active = inb(HA_ACTIVE1(base));
2742           active = active & ~(target_mask);
2743           outb(active, HA_ACTIVE1(base));
2744         }
2745         else
2746         {
2747           active = inb(HA_ACTIVE0(base));
2748           active &= ~(target_mask);
2749           outb(active, HA_ACTIVE0(base));
2750         }
2751 
2752         outb(SCB_NEEDDMA, SCBARRAY(base));
2753 
2754         /*
2755          * Shut off the offending interrupt sources, reset
2756          * the sequencer address to zero and unpause it,
2757          * then call the high-level SCSI completion routine.
2758          *
2759          * WARNING!  This is a magic sequence!  After many
2760          * hours of guesswork, turning off the SCSI interrupts
2761          * in CLRSINT? does NOT clear the SCSIINT bit in
2762          * INTSTAT. By writing to the (undocumented, unused
2763          * according to the AIC-7770 manual) third bit of
2764          * CLRINT, you can clear INTSTAT. But, if you do it
2765          * while the sequencer is paused, you get a BRKADRINT
2766          * with an Illegal Host Address status, so the
2767          * sequencer has to be restarted first.
2768          */
2769         outb(CLRSELTIMEO, CLRSINT1(base));
2770 
2771         outb(CLRSCSIINT, CLRINT(base));
2772 
2773         /*
2774          * Shift the waiting for selection queue forward
2775          */
2776         waiting = inb(WAITING_SCBH(base));
2777         outb(waiting, SCBPTR(base));
2778         waiting = inb(SCBARRAY(base) + 30);
2779         outb(waiting, WAITING_SCBH(base));
2780 
2781         RESTART_SEQUENCER(p);
2782         aic7xxx_done(p, scb);
2783 #if 0
2784   printk("aic7xxx_isr: SELTO scb(%d) state(%x), cmd(%x)\n",
2785          scb->position, scb->state, (unsigned int) scb->cmd);
2786 #endif
2787       }
2788       else
2789       {
2790         if (status & SCSIPERR)
2791         {
2792           /*
2793            * A parity error has occurred during a data
2794            * transfer phase. Flag it and continue.
2795            */
2796           printk("aic7xxx: parity error on target %d, "
2797                  "channel %d, lun %d\n",
2798                  cmd->target,
2799                  cmd->channel & 0x01,
2800                  cmd->lun & 0x07);
2801           aic7xxx_error(cmd) = DID_PARITY;
2802 
2803           /*
2804            * Clear interrupt and resume as above.
2805            */
2806           outb(CLRSCSIPERR, CLRSINT1(base));
2807           UNPAUSE_SEQUENCER(p);
2808 
2809           outb(CLRSCSIINT, CLRINT(base));
2810           scb = NULL;
2811         }
2812         else
2813         {
2814           if (!(status & BUSFREE))
2815           {
2816              /*
2817               * We don't know what's going on. Turn off the
2818               * interrupt source and try to continue.
2819               */
2820              printk("aic7xxx_isr: sstat1 = 0x%x\n", status);
2821              outb(status, CLRSINT1(base));
2822              UNPAUSE_SEQUENCER(p);
2823              outb(CLRSCSIINT, CLRINT(base));
2824              scb = NULL;
2825           }
2826         }
2827       }
2828     }  /* else */
2829   }
2830 
2831   if (intstat & CMDCMPLT)
2832   {
2833     int complete;
2834 
2835     /*
2836      * The sequencer will continue running when it
2837      * issues this interrupt. There may be >1 commands
2838      * finished, so loop until we've processed them all.
2839      */
2840     do {
2841       complete = inb(QOUTFIFO(base));
2842 
2843       scb = &(p->scb_array[complete]);
2844       if ((scb->state != SCB_ACTIVE) || (scb->cmd == NULL))
2845       {
2846         printk("aic7xxx warning: "
2847                "no command for scb %d (cmdcmplt)\n"
2848                "QOUTCNT = %d, SCB state = 0x%x, CMD = 0x%x, pos = %d\n",
2849                complete, inb(QOUTFIFO(base)),
2850                scb->state, (unsigned int) scb->cmd, scb->position);
2851         outb(CLRCMDINT, CLRINT(base));
2852         continue;
2853       }
2854       cmd = scb->cmd;
2855 
2856       cmd->result = (aic7xxx_error(cmd) << 16) | aic7xxx_status(cmd);
2857       if ((cmd->flags & WAS_SENSE) && !(cmd->flags & ASKED_FOR_SENSE))
2858       {
2859         /*
2860          * Got sense information.
2861          */
2862         cmd->flags &= ASKED_FOR_SENSE;
2863       }
2864 #if 0
2865       printk("aic7xxx_intr: (complete) state = %d, cmd = 0x%x, free = 0x%x\n",
2866              scb->state, (unsigned int) scb->cmd, (unsigned int) p->free_scb);
2867 #endif
2868 
2869       /*
2870        * Clear interrupt status before checking
2871        * the output queue again. This eliminates
2872        * a race condition whereby a command could
2873        * complete between the queue poll and the
2874        * interrupt clearing, so notification of the
2875        * command being complete never made it back
2876        * up to the kernel.
2877        */
2878       outb(CLRCMDINT, CLRINT(base));
2879       aic7xxx_done(p, scb);
2880 #if 0
2881   if (scb != &p->scb_array[scb->position])
2882   {
2883     printk("aic7xxx_isr: (complete) address mismatch, pos %d\n", scb->position);
2884   }
2885   printk("aic7xxx_isr: (complete) state = %d, cmd = 0x%x, free = 0x%x\n",
2886          scb->state, (unsigned int) scb->cmd, (unsigned int) p->free_scb);
2887 #endif
2888 
2889 #ifdef AIC7XXX_PROC_STATS
2890       /*
2891        * XXX: we should actually know how much actually transferred
2892        * XXX: for each command, but apparently that's too difficult.
2893        */
2894       actual = aic7xxx_length(cmd, 0);
2895       if (((cmd->flags & WAS_SENSE) == 0) && (actual > 0))
2896       {
2897         struct aic7xxx_xferstats *sp;
2898         long *ptr;
2899         int x;
2900 
2901         sp = &p->stats[cmd->channel & 0x01][cmd->target & 0x0F][cmd->lun & 0x07];
2902         sp->xfers++;
2903 
2904         if (cmd->request.cmd == WRITE)
2905         {
2906           sp->w_total++;
2907           sp->w_total512 += (actual >> 9);
2908           ptr = sp->w_bins;
2909         }
2910         else
2911         {
2912           sp->r_total++;
2913           sp->r_total512 += (actual >> 9);
2914           ptr = sp->r_bins;
2915         }
2916         for (x = 9; x <= 17; x++)
2917         {
2918           if (actual < (1 << x))
2919           {
2920             ptr[x - 9]++;
2921             break;
2922           }
2923         }
2924         if (x > 17)
2925         {
2926           ptr[x - 9]++;
2927         }
2928       }
2929 #endif /* AIC7XXX_PROC_STATS */
2930 
2931     } while (inb(QOUTCNT(base)));
2932   }
2933 }
2934 
2935 /*+F*************************************************************************
2936  * Function:
2937  *   aic7xxx_probe
2938  *
2939  * Description:
2940  *   Probing for EISA boards: it looks like the first two bytes
2941  *   are a manufacturer code - three characters, five bits each:
2942  *
2943  *               BYTE 0   BYTE 1   BYTE 2   BYTE 3
2944  *              ?1111122 22233333 PPPPPPPP RRRRRRRR
2945  *
2946  *   The characters are baselined off ASCII '@', so add that value
2947  *   to each to get the real ASCII code for it. The next two bytes
2948  *   appear to be a product and revision number, probably vendor-
2949  *   specific. This is what is being searched for at each port,
2950  *   and what should probably correspond to the ID= field in the
2951  *   ECU's .cfg file for the card - if your card is not detected,
2952  *   make sure your signature is listed in the array.
2953  *
2954  *   The fourth byte's lowest bit seems to be an enabled/disabled
2955  *   flag (rest of the bits are reserved?).
2956  *-F*************************************************************************/
2957 static aha_type
2958 aic7xxx_probe(int slot, int base)
     /* [previous][next][first][last][top][bottom][index][help] */
2959 {
2960   int i;
2961   unsigned char buf[4];
2962 
2963   static struct {
2964     int n;
2965     unsigned char signature[sizeof(buf)];
2966     aha_type type;
2967   } AIC7xxx[] = {
2968     { 4, { 0x04, 0x90, 0x77, 0x71 }, AIC_274x },  /* host adapter 274x */
2969     { 4, { 0x04, 0x90, 0x77, 0x70 }, AIC_274x },  /* motherboard 274x  */
2970     { 4, { 0x04, 0x90, 0x77, 0x56 }, AIC_284x },  /* 284x, BIOS enabled */
2971     { 4, { 0x04, 0x90, 0x77, 0x57 }, AIC_284x }   /* 284x, BIOS disabled */
2972   };
2973 
2974   /*
2975    * The VL-bus cards need to be primed by
2976    * writing before a signature check.
2977    */
2978   for (i = 0; i < sizeof(buf); i++)
2979   {
2980     outb(0x80 + i, base);
2981     buf[i] = inb(base + i);
2982   }
2983 
2984   for (i = 0; i < NUMBER(AIC7xxx); i++)
2985   {
2986     /*
2987      * Signature match on enabled card?
2988      */
2989     if (!memcmp(buf, AIC7xxx[i].signature, AIC7xxx[i].n))
2990     {
2991       if (inb(base + 4) & 1)
2992       {
2993         return (AIC7xxx[i].type);
2994       }
2995 
2996       printk("aic7xxx disabled at slot %d, ignored\n", slot);
2997     }
2998   }
2999 
3000   return (AIC_NONE);
3001 }
3002 
3003 /*+F*************************************************************************
3004  * Function:
3005  *   read_seeprom
3006  *
3007  * Description:
3008  *   Reads the serial EEPROM and returns 1 if successful and 0 if
3009  *   not successful.
3010  *
3011  *   The instruction set of the 93C46 chip is as follows:
3012  *
3013  *               Start  OP
3014  *     Function   Bit  Code  Address    Data     Description
3015  *     -------------------------------------------------------------------
3016  *     READ        1    10   A5 - A0             Reads data stored in memory,
3017  *                                               starting at specified address
3018  *     EWEN        1    00   11XXXX              Write enable must preceed
3019  *                                               all programming modes
3020  *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
3021  *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
3022  *     ERAL        1    00   10XXXX              Erase all registers
3023  *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
3024  *     EWDS        1    00   00XXXX              Disables all programming
3025  *                                               instructions
3026  *     *Note: A value of X for address is a don't care condition.
3027  *
3028  *   The 93C46 has a four wire interface: clock, chip select, data in, and
3029  *   data out.  In order to perform one of the above functions, you need
3030  *   to enable the chip select for a clock period (typically a minimum of
3031  *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
3032  *   respectively.  While the chip select remains high, you can clock in
3033  *   the instructions (above) starting with the start bit, followed by the
3034  *   OP code, Address, and Data (if needed).  For the READ instruction, the
3035  *   requested 16-bit register contents is read from the data out line but
3036  *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
3037  *   first).  The clock cycling from low to high initiates the next data
3038  *   bit to be sent from the chip.
3039  *
3040  *   The 7870 interface to the 93C46 serial EEPROM is through the SEECTL
3041  *   register.  After successful arbitration for the memory port, the
3042  *   SEECS bit of the SEECTL register is connected to the chip select.
3043  *   The SEECK, SEEDO, and SEEDI are connected to the clock, data out,
3044  *   and data in lines respectively.  The SEERDY bit of SEECTL is useful
3045  *   in that it gives us an 800 nsec timer.  After a write to the SEECTL
3046  *   register, the SEERDY goes high 800 nsec later.  The one exception
3047  *   to this is when we first request access to the memory port.  The
3048  *   SEERDY goes high to signify that access has been granted and, for
3049  *   this case, has no implied timing.
3050  *
3051  *-F*************************************************************************/
3052 static int
3053 read_seeprom(int base, struct seeprom_config *sc)
     /* [previous][next][first][last][top][bottom][index][help] */
3054 {
3055   int i = 0, k = 0;
3056   unsigned long timeout;
3057   unsigned char temp;
3058   unsigned short checksum = 0;
3059   unsigned short *seeprom = (unsigned short *) sc;
3060   struct seeprom_cmd {
3061     unsigned char len;
3062     unsigned char bits[3];
3063   };
3064   struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
3065 
3066 #define CLOCK_PULSE(p) \
3067   while ((inb(SEECTL(base)) & SEERDY) == 0)     \
3068   {                                             \
3069     ;  /* Do nothing */                         \
3070   }
3071 
3072   /*
3073    * Request access of the memory port.  When access is
3074    * granted, SEERDY will go high.  We use a 1 second
3075    * timeout which should be near 1 second more than
3076    * is needed.  Reason: after the 7870 chip reset, there
3077    * should be no contention.
3078    */
3079   outb(SEEMS, SEECTL(base));
3080   timeout = jiffies + 100;  /* 1 second timeout */
3081   while ((jiffies < timeout) && ((inb(SEECTL(base)) & SEERDY) == 0))
3082   {
3083     ; /* Do nothing!  Wait for access to be granted.  */
3084   }
3085   if ((inb(SEECTL(base)) & SEERDY) == 0)
3086   {
3087     outb(0, SEECTL(base));
3088     return (0);
3089   }
3090 
3091   /*
3092    * Read the first 32 registers of the seeprom.  For the 7870,
3093    * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers
3094    * but only the first 32 are used by Adaptec BIOS.  The loop
3095    * will range from 0 to 31.
3096    */
3097   for (k = 0; k < (sizeof(*sc) / 2); k++)
3098   {
3099     /*
3100      * Send chip select for one clock cycle.
3101      */
3102     outb(SEEMS | SEECK | SEECS, SEECTL(base));
3103     CLOCK_PULSE(base);
3104 
3105     /*
3106      * Now we're ready to send the read command followed by the
3107      * address of the 16-bit register we want to read.
3108      */
3109     for (i = 0; i < seeprom_read.len; i++)
3110     {
3111       temp = SEEMS | SEECS | (seeprom_read.bits[i] << 1);
3112       outb(temp, SEECTL(base));
3113       CLOCK_PULSE(base);
3114       temp = temp ^ SEECK;
3115       outb(temp, SEECTL(base));
3116       CLOCK_PULSE(base);
3117     }
3118     /*
3119      * Send the 6 bit address (MSB first, LSB last).
3120      */
3121     for (i = 5; i >= 0; i--)
3122     {
3123       temp = k;
3124       temp = (temp >> i) & 1;  /* Mask out all but lower bit. */
3125       temp = SEEMS | SEECS | (temp << 1);
3126       outb(temp, SEECTL(base));
3127       CLOCK_PULSE(base);
3128       temp = temp ^ SEECK;
3129       outb(temp, SEECTL(base));
3130       CLOCK_PULSE(base);
3131     }
3132 
3133     /*
3134      * Now read the 16 bit register.  An initial 0 precedes the
3135      * register contents which begins with bit 15 (MSB) and ends
3136      * with bit 0 (LSB).  The initial 0 will be shifted off the
3137      * top of our word as we let the loop run from 0 to 16.
3138      */
3139     for (i = 0; i <= 16; i++)
3140     {
3141       temp = SEEMS | SEECS;
3142       outb(temp, SEECTL(base));
3143       CLOCK_PULSE(base);
3144       temp = temp ^ SEECK;
3145       seeprom[k] = (seeprom[k] << 1) | (inb(SEECTL(base)) & SEEDI);
3146       outb(temp, SEECTL(base));
3147       CLOCK_PULSE(base);
3148     }
3149 
3150     /*
3151      * The serial EEPROM has a checksum in the last word.  Keep a
3152      * running checksum for all words read except for the last
3153      * word.  We'll verify the checksum after all words have been
3154      * read.
3155      */
3156     if (k < (sizeof(*sc) / 2) - 1)
3157     {
3158       checksum = checksum + seeprom[k];
3159     }
3160 
3161     /*
3162      * Reset the chip select for the next command cycle.
3163      */
3164     outb(SEEMS, SEECTL(base));
3165     CLOCK_PULSE(base);
3166     outb(SEEMS | SEECK, SEECTL(base));
3167     CLOCK_PULSE(base);
3168     outb(SEEMS, SEECTL(base));
3169     CLOCK_PULSE(base);
3170   }
3171 
3172   /*
3173    * Release access to the memory port and the serial EEPROM.
3174    */
3175   outb(0, SEECTL(base));
3176 
3177 #if 0
3178   printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum);
3179   printk("Serial EEPROM:");
3180   for (k = 0; k < (sizeof(*sc) / 2); k++)
3181   {
3182     if (((k % 8) == 0) && (k != 0))
3183     {
3184       printk("\n              ");
3185     }
3186     printk(" 0x%x", seeprom[k]);
3187   }
3188   printk("\n");
3189 #endif
3190 
3191   if (checksum != sc->checksum)
3192   {
3193     printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n");
3194     return (0);
3195   }
3196 
3197   return (1);
3198 }
3199 
3200 /*+F*************************************************************************
3201  * Function:
3202  *   detect_maxscb
3203  *
3204  * Description:
3205  *   Return the maximum number of SCB's allowed for a given controller.
3206  *-F*************************************************************************/
3207 static int
3208 detect_maxscb(aha_type type, int base)
     /* [previous][next][first][last][top][bottom][index][help] */
3209 {
3210   unsigned char sblkctl_reg;
3211   int maxscb = 0;
3212 
3213   switch (type)
3214   {
3215     case AIC_274x:
3216     case AIC_284x:
3217       /*
3218        * Check for Rev C or E boards. Rev E boards can supposedly have
3219        * more than 4 SCBs, while the Rev C boards are limited to 4 SCBs.
3220        * Until we know how to access more than 4 SCBs for the Rev E chips,
3221        * we limit them, along with the Rev C chips, to 4 SCBs.
3222        *
3223        * The Rev E boards have a read/write autoflush bit in the
3224        * SBLKCTL registor, while in the Rev C boards it is read only.
3225        */
3226       sblkctl_reg = inb(SBLKCTL(base)) ^ AUTOFLUSHDIS;
3227       outb(sblkctl_reg, SBLKCTL(base));
3228       if (inb(SBLKCTL(base)) == sblkctl_reg)
3229       {
3230         /*
3231          * We detected a Rev E board.
3232          */
3233         printk("aic7770: Rev E and subsequent; using 4 SCB's\n");
3234         outb(sblkctl_reg ^ AUTOFLUSHDIS, SBLKCTL(base));
3235         maxscb = 4;
3236       }
3237       else
3238       {
3239         printk("aic7770: Rev C and previous; using 4 SCB's\n");
3240         maxscb = 4;
3241       }
3242       break;
3243 
3244     case AIC_7850:
3245       maxscb = 3;
3246       break;
3247 
3248     case AIC_7870:
3249       maxscb = 16;
3250       break;
3251 
3252     case AIC_7872:
3253       /*
3254        * Really has 255, but we'll wait to verify that we access
3255        * them the same way and do not have to set the card to
3256        * use the memory port to access external SCB RAM.
3257        */
3258       maxscb = 16;
3259       break;
3260 
3261     case AIC_NONE:
3262       /*
3263        * This should never happen... But just in case.
3264        */
3265       break;
3266   }
3267 
3268   return (maxscb);
3269 }
3270 
3271 /*+F*************************************************************************
3272  * Function:
3273  *   aic7xxx_register
3274  *
3275  * Description:
3276  *   Register a Adaptec aic7xxx chip SCSI controller with the kernel.
3277  *-F*************************************************************************/
3278 static int
3279 aic7xxx_register(Scsi_Host_Template *template, aha_type type,
     /* [previous][next][first][last][top][bottom][index][help] */
3280                  int base, unsigned char irq)
3281 {
3282   static const char * board_name[] = {"", "274x", "284x", "7870", "7850", "7872"};
3283   int i;
3284   unsigned char sblkctl;
3285   int max_targets;
3286   int found = 1;
3287   int bios_disabled = 0;
3288   unsigned char target_settings;
3289   unsigned char scsi_conf, host_conf;
3290   int have_seeprom = 0;
3291   struct Scsi_Host *host;
3292   struct aic7xxx_host *p;
3293   struct aic7xxx_host_config config;
3294   struct seeprom_config sc;
3295 
3296   config.type = type;
3297   config.base = base;
3298   config.irq = irq;
3299   config.parity = AIC_UNKNOWN;
3300   config.low_term = AIC_UNKNOWN;
3301   config.high_term = AIC_UNKNOWN;
3302   config.busrtime = 0;
3303 
3304   /*
3305    * Lock out other contenders for our i/o space.
3306    */
3307   request_region(MINREG(base), MAXREG(base) - MINREG(base), "aic7xxx");
3308 
3309   switch (type)
3310   {
3311     case AIC_274x:
3312 #if 0
3313       printk("aha274x: aic7770 hcntrl=0x%x\n", inb(HCNTRL(config.base)));
3314 #endif
3315       /*
3316        * For some 274x boards, we must clear the CHIPRST bit
3317        * and pause the sequencer. For some reason, this makes
3318        * the driver work. For 284x boards, we give it a
3319        * CHIPRST just like the 294x boards.
3320        *
3321        * Use the BIOS settings to determine the interrupt
3322        * trigger type (level or edge) and use this value
3323        * for pausing and unpausing the sequencer.
3324        */
3325       config.unpause = (inb(HCNTRL(config.base)) & IRQMS) | INTEN;
3326       config.pause = config.unpause | PAUSE;
3327       config.extended = aic7xxx_extended;
3328 
3329       /*
3330        * I don't think we need to kick the reset again, the initial probe
3331        * does a reset, it seems that this is kicking a dead horse here.
3332        * So... I will try to just verify that the chip has come out of the
3333        * reset state and continue the same as the 284x.
3334        * In the Calgary version of the driver:
3335        *   1) Chip Reset
3336        *   2) Set unpause to IRQMS | INTEN
3337        *   3) If an interrupt occured without any commands queued, the
3338        *      unpause was set to just INTEN
3339        * I changed the initial reset code to just mask in the CHIPRST bit
3340        * and try to leave the other settings alone.
3341        *
3342        * I don't think we need the warning about chip reset not being clear.
3343        * On both my test machines (2842 & 2940), they work just fine with a
3344        * HCNTRL() of 0x5 (PAUSE | CHIPRST). Notice though, the 274x also
3345        * adds the INTEN flag, where neither the 284x or 294x do.
3346        */
3347       outb(config.pause | CHIPRST, HCNTRL(config.base));
3348       aic7xxx_delay(1);
3349       if (inb(HCNTRL(config.base)) & CHIPRST)
3350       {
3351         printk("aic7xxx_register: Chip reset not cleared; clearing manually.\n");
3352       }
3353       outb(config.pause, HCNTRL(config.base));
3354 
3355       /*
3356        * Just to be on the safe side with the 274x, we will re-read the irq
3357        * since there was some issue about reseting the board.
3358        */
3359       config.irq = inb(HA_INTDEF(config.base)) & 0x0F;
3360       if ((inb(HA_274_BIOSCTRL(base)) & BIOSMODE) == BIOSDISABLED)
3361       {
3362         bios_disabled = 1;
3363       }
3364       host_conf = inb(HA_HOSTCONF(config.base));
3365       config.busrtime = host_conf & 0x3C;
3366       /* XXX Is this valid for motherboard based controllers? */
3367       /* Setup the FIFO threshold and the bus off time */
3368       outb(host_conf & DFTHRSH, BUSSPD(config.base));
3369       outb((host_conf << 2) & BOFF, BUSTIME(config.base));
3370 
3371       /*
3372        * A reminder until this can be detected automatically.
3373        */
3374       printk("aha274x: extended translation %sabled\n",
3375              config.extended ? "en" : "dis");
3376       break;
3377 
3378     case AIC_284x:
3379 #if 0
3380       printk("aha284x: aic7770 hcntrl=0x%x\n", inb(HCNTRL(config.base)));
3381 #endif
3382       outb(CHIPRST, HCNTRL(config.base));
3383       config.unpause = UNPAUSE_284X;
3384       config.pause = REQ_PAUSE; /* DWG would like to be like the rest */
3385       config.extended = aic7xxx_extended;
3386       config.irq = inb(HA_INTDEF(config.base)) & 0x0F;
3387       if ((inb(HA_274_BIOSCTRL(base)) & BIOSMODE) == BIOSDISABLED)
3388       {
3389         bios_disabled = 1;
3390       }
3391       host_conf = inb(HA_HOSTCONF(config.base));
3392       config.busrtime = host_conf & 0x3C;
3393       /* XXX Is this valid for motherboard based controllers? */
3394       /* Setup the FIFO threshold and the bus off time */
3395       outb(host_conf & DFTHRSH, BUSSPD(config.base));
3396       outb((host_conf << 2) & BOFF, BUSTIME(config.base));
3397 
3398       /*
3399        * A reminder until this can be detected automatically.
3400        */
3401       printk("aha284x: extended translation %sabled\n",
3402              config.extended ? "en" : "dis");
3403       break;
3404 
3405     case AIC_7850:
3406     case AIC_7870:
3407     case AIC_7872:
3408 #if 0
3409       printk("aic%s hcntrl=0x%x\n", board_name[type], inb(HCNTRL(config.base)));
3410 #endif
3411 
3412       outb(CHIPRST, HCNTRL(config.base));
3413       config.unpause = UNPAUSE_294X;
3414       config.pause = config.unpause | PAUSE;
3415       config.extended = aic7xxx_extended;
3416       config.scsi_id = 7;
3417 
3418       printk("aic78xx: Reading SEEPROM... ");
3419       have_seeprom = read_seeprom(base, &sc);
3420       if (!have_seeprom)
3421       {
3422         printk("aic78xx: unable to read SEEPROM\n");
3423       }
3424       else
3425       {
3426         printk("done\n");
3427         config.extended = ((sc.bios_control & CFEXTEND) >> 7);
3428         config.scsi_id = (sc.brtime_id & CFSCSIID);
3429         config.parity = (sc.adapter_control & CFSPARITY) ?
3430                          AIC_ENABLED : AIC_DISABLED;
3431         config.low_term = (sc.adapter_control & CFSTERM) ?
3432                               AIC_ENABLED : AIC_DISABLED;
3433         config.high_term = (sc.adapter_control & CFWSTERM) ?
3434                               AIC_ENABLED : AIC_DISABLED;
3435         config.busrtime = ((sc.brtime_id & CFBRTIME) >> 8);
3436       }
3437 
3438       /*
3439        * XXX - force data fifo threshold to 100%. Why does this
3440        *       need to be done?
3441        */
3442       outb(inb(DSPCISTATUS(config.base)) | DFTHRESH, DSPCISTATUS(config.base));
3443       outb(config.scsi_id | DFTHRESH, HA_SCSICONF(config.base));
3444 
3445       /*
3446        * In case we are a wide card, place scsi ID in second conf byte.
3447        */
3448       outb(config.scsi_id, (HA_SCSICONF(config.base) + 1));
3449 
3450       /*
3451        * A reminder until this can be detected automatically.
3452        */
3453       printk("aic%s: extended translation %sabled\n", board_name[type],
3454              config.extended ? "en" : "dis");
3455       break;
3456 
3457     default:
3458       panic("aic7xxx_register: internal error\n");
3459   }
3460 
3461   config.maxscb = detect_maxscb(type, base);
3462 
3463   if ((config.type == AIC_274x) || (config.type == AIC_284x))
3464   {
3465     if (config.pause & IRQMS)
3466     {
3467       printk("aic7xxx: Using Level Sensitive Interrupts\n");
3468     }
3469     else
3470     {
3471       printk("aic7xxx: Using Edge Triggered Interrupts\n");
3472     }
3473   }
3474 
3475   /*
3476    * Read the bus type from the SBLKCTL register. Set the FLAGS
3477    * register in the sequencer for twin and wide bus cards.
3478    */
3479   sblkctl = inb(SBLKCTL(base)) & 0x0F;  /* mask out upper two bits */
3480   switch (sblkctl)
3481   {
3482     case SELSINGLE:     /* narrow/normal bus */
3483       config.scsi_id = inb(HA_SCSICONF(base)) & 0x07;
3484       config.bus_type = AIC_SINGLE;
3485       outb(SINGLE_BUS, HA_FLAGS(base));
3486       break;
3487 
3488     case SELWIDE:     /* Wide bus */
3489       config.scsi_id = inb(HA_SCSICONF(base) + 1) & 0x0F;
3490       config.bus_type = AIC_WIDE;
3491       printk("aic7xxx: Enabling wide channel of %s-Wide\n",
3492              board_name[config.type]);
3493       outb(WIDE_BUS, HA_FLAGS(base));
3494       break;
3495 
3496     case SELBUSB:     /* Twin bus */
3497       config.scsi_id = inb(HA_SCSICONF(base)) & 0x07;
3498 #ifdef AIC7XXX_TWIN_SUPPORT
3499       config.scsi_id_b = inb(HA_SCSICONF(base) + 1) & 0x07;
3500       config.bus_type = AIC_TWIN;
3501       printk("aic7xxx: Enabled channel B of %s-Twin\n",
3502              board_name[config.type]);
3503       outb(TWIN_BUS, HA_FLAGS(base));
3504 #else
3505       config.bus_type = AIC_SINGLE;
3506       printk("aic7xxx: Channel B of %s-Twin will be ignored\n",
3507              board_name[config.type]);
3508       outb(0, HA_FLAGS(base));
3509 #endif
3510       break;
3511 
3512     default:
3513       printk("aic7xxx is an unsupported type 0x%x, please "
3514              "mail deang@ims.com\n", inb(SBLKCTL(base)));
3515       outb(0, HA_FLAGS(base));
3516       return (0);
3517   }
3518 
3519   /*
3520    * Clear the upper two bits. For the 294x cards, clearing the
3521    * upper two bits, will take the card out of diagnostic mode
3522    * and make the host adatper LED follow bus activity (will not
3523    * always be on).
3524    */
3525   outb(sblkctl, SBLKCTL(base));
3526 
3527   /*
3528    * The IRQ level in i/o port 4 maps directly onto the real
3529    * IRQ number. If it's ok, register it with the kernel.
3530    *
3531    * NB. the Adaptec documentation says the IRQ number is only
3532    *     in the lower four bits; the ECU information shows the
3533    *     high bit being used as well. Which is correct?
3534    *
3535    * The 294x cards (PCI) get their interrupt from PCI BIOS.
3536    */
3537   if (((config.type == AIC_274x) || (config.type == AIC_284x))
3538       && (config.irq < 9 || config.irq > 15))
3539   {
3540     printk("aic7xxx uses unsupported IRQ level, ignoring\n");
3541     return (0);
3542   }
3543 
3544   /*
3545    * Check the IRQ to see if it is shared by another aic7xxx
3546    * controller. If it is and sharing of IRQs is not defined,
3547    * then return 0 hosts found. If sharing of IRQs is allowed
3548    * or the IRQ is not shared by another host adapter, then
3549    * proceed.
3550    */
3551 #ifndef AIC7XXX_SHARE_IRQS
3552    if (aic7xxx_boards[config.irq] != NULL)
3553    {
3554      printk("aic7xxx_register: Sharing of IRQs is not configured.\n");
3555      return (0);
3556    }
3557 #endif
3558 
3559   /*
3560    * Print out debugging information before re-enabling
3561    * the card - a lot of registers on it can't be read
3562    * when the sequencer is active.
3563    */
3564   debug_config(&config);
3565 
3566   /*
3567    * Before registry, make sure that the offsets of the
3568    * struct scatterlist are what the sequencer will expect,
3569    * otherwise disable scatter-gather altogether until someone
3570    * can fix it. This is important since the sequencer will
3571    * DMA elements of the SG array in while executing commands.
3572    */
3573   if (template->sg_tablesize != SG_NONE)
3574   {
3575     struct scatterlist sg;
3576 
3577     if (SG_STRUCT_CHECK(sg))
3578     {
3579       printk("aic7xxx warning: kernel scatter-gather "
3580              "structures changed, disabling it\n");
3581       template->sg_tablesize = SG_NONE;
3582     }
3583   }
3584 
3585   /*
3586    * Register each "host" and fill in the returned Scsi_Host
3587    * structure as best we can. Some of the parameters aren't
3588    * really relevant for bus types beyond ISA, and none of the
3589    * high-level SCSI code looks at it anyway. Why are the fields
3590    * there? Also save the pointer so that we can find the
3591    * information when an IRQ is triggered.
3592    */
3593   host = scsi_register(template, sizeof(struct aic7xxx_host));
3594   host->can_queue = config.maxscb;
3595   host->cmd_per_lun = AIC7XXX_CMDS_PER_LUN;
3596   host->this_id = config.scsi_id;
3597   host->irq = config.irq;
3598   if (config.bus_type == AIC_WIDE)
3599   {
3600     host->max_id = 16;
3601   }
3602   if (config.bus_type == AIC_TWIN)
3603   {
3604     host->max_channel = 1;
3605   }
3606 
3607   p = (struct aic7xxx_host *) host->hostdata;
3608 
3609   /*
3610    * Initialize the scb array by setting the state to free.
3611    */
3612   for (i = 0; i < AIC7XXX_MAXSCB; i++)
3613   {
3614     p->scb_array[i].state = SCB_FREE;
3615     p->scb_array[i].next = NULL;
3616     p->scb_array[i].cmd = NULL;
3617   }
3618 
3619   p->isr_count = 0;
3620   p->a_scanned = 0;
3621   p->b_scanned = 0;
3622   p->base = config.base;
3623   p->maxscb = config.maxscb;
3624   p->numscb = 0;
3625   p->extended = config.extended;
3626   p->type = config.type;
3627   p->bus_type = config.bus_type;
3628   p->have_seeprom = have_seeprom;
3629   p->seeprom = sc;
3630   p->free_scb = NULL;
3631   p->next = NULL;
3632 
3633   p->unpause = config.unpause;
3634   p->pause = config.pause;
3635 
3636   if (aic7xxx_boards[config.irq] == NULL)
3637   {
3638     /*
3639      * Warning! This must be done before requesting the irq.  It is
3640      * possible for some boards to raise an interrupt as soon as
3641      * they are enabled.  So when we request the irq from the Linux
3642      * kernel, an interrupt is triggered immediately.  Therefore, we
3643      * must ensure the board data is correctly set before the request.
3644      */
3645     aic7xxx_boards[config.irq] = host;
3646 
3647     /*
3648      * Register IRQ with the kernel.
3649      */
3650     if (request_irq(config.irq, aic7xxx_isr, SA_INTERRUPT, "aic7xxx"))
3651     {
3652       printk("aic7xxx couldn't register irq %d, ignoring\n", config.irq);
3653       aic7xxx_boards[config.irq] = NULL;
3654       return (0);
3655     }
3656   }
3657   else
3658   {
3659     /*
3660      * We have found a host adapter sharing an IRQ of a previously
3661      * registered host adapter. Add this host adapter's Scsi_Host
3662      * to the beginning of the linked list of hosts at the same IRQ.
3663      */
3664     p->next = aic7xxx_boards[config.irq];
3665     aic7xxx_boards[config.irq] = host;
3666   }
3667 
3668   /*
3669    * Load the sequencer program, then re-enable the board -
3670    * resetting the AIC-7770 disables it, leaving the lights
3671    * on with nobody home. On the PCI bus you *may* be home,
3672    * but then your mailing address is dynamically assigned
3673    * so no one can find you anyway :-)
3674    */
3675   printk("aic7xxx: Downloading sequencer code..");
3676   aic7xxx_loadseq(base);
3677 
3678   /*
3679    * Set Fast Mode and Enable the board
3680    */
3681   outb(FASTMODE, SEQCTL(base));
3682 
3683   if ((p->type == AIC_274x) || (p->type == AIC_284x))
3684   {
3685     outb(ENABLE, BCTL(base));
3686   }
3687 
3688   printk("done.\n");
3689 
3690   /*
3691    * Set the SCSI Id, SXFRCTL1, and SIMODE1, for both channels
3692    */
3693   if (p->bus_type == AIC_TWIN)
3694   {
3695     /*
3696      * The device is gated to channel B after a chip reset,
3697      * so set those values first.
3698      */
3699     outb(config.scsi_id_b, SCSIID(base));
3700     scsi_conf = inb(HA_SCSICONF(base) + 1) & (ENSPCHK | STIMESEL);
3701     outb(scsi_conf | ENSTIMER | ACTNEGEN | STPWEN, SXFRCTL1(base));
3702     outb(ENSELTIMO | ENSCSIPERR, SIMODE1(base));
3703     /*
3704      * Select Channel A
3705      */
3706     outb(SELSINGLE, SBLKCTL(base));
3707   }
3708   outb(config.scsi_id, SCSIID(base));
3709   scsi_conf = inb(HA_SCSICONF(base)) & (ENSPCHK | STIMESEL);
3710   outb(scsi_conf | ENSTIMER | ACTNEGEN | STPWEN, SXFRCTL1(base));
3711   outb(ENSELTIMO | ENSCSIPERR, SIMODE1(base));
3712 
3713   /*
3714    * Look at the information that board initialization or the board
3715    * BIOS has left us. In the lower four bits of each target's
3716    * scratch space any value other than 0 indicates that we should
3717    * initiate synchronous transfers. If it's zero, the user or the
3718    * BIOS has decided to disable synchronous negotiation to that
3719    * target so we don't activate the needsdtr flag.
3720    */
3721   p->needsdtr_copy = 0;
3722   p->sdtr_pending = 0;
3723   p->needwdtr_copy = 0;
3724   p->wdtr_pending = 0;
3725   if (p->bus_type == AIC_SINGLE)
3726   {
3727     max_targets = 8;
3728   }
3729   else
3730   {
3731     max_targets = 16;
3732   }
3733   /*
3734    * Grab the disconnection disable table and invert it for our needs
3735    */
3736   if (have_seeprom)
3737   {
3738     p->discenable = 0;
3739   }
3740   else
3741   {
3742     if (bios_disabled)
3743     {
3744       printk("aic7xxx : Host Adapter Bios disabled.  Using default SCSI "
3745              "device parameters\n");
3746       p->discenable = 0xFFFF;
3747     }
3748     else
3749     {
3750       p->discenable = ~(inw(HA_DISC_DSB(base)));
3751     }
3752   }
3753 
3754   for (i = 0; i < max_targets; i++)
3755   {
3756     if (have_seeprom)
3757     {
3758       target_settings = ((sc.device_flags[i] & CFXFER) << 4);
3759       if (sc.device_flags[i] & CFSYNCH)
3760       {
3761         p->needsdtr_copy |= (0x01 << i);
3762       }
3763       if ((sc.device_flags[i] & CFWIDEB) && (p->bus_type == AIC_WIDE))
3764       {
3765         p->needwdtr_copy |= (0x01 << i);
3766       }
3767       if (sc.device_flags[i] & CFDISC)
3768       {
3769         p->discenable |= (0x01 << i);
3770       }
3771     }
3772     else
3773     {
3774       target_settings = inb(HA_TARG_SCRATCH(base) + i);
3775       if (target_settings & 0x0F)
3776       {
3777         p->needsdtr_copy |= (0x01 << i);
3778         /*
3779          * Default to asynchronous transfers (0 offset)
3780          */
3781         target_settings &= 0xF0;
3782       }
3783       /*
3784        * If we are not wide, forget WDTR. This makes the driver
3785        * work on some cards that don't leave these fields cleared
3786        * when BIOS is not installed.
3787        */
3788       if ((target_settings & 0x80) && (p->bus_type == AIC_WIDE))
3789       {
3790         p->needwdtr_copy |= (0x01 << i);
3791         target_settings &= 0x7F;
3792       }
3793     }
3794     outb(target_settings, (HA_TARG_SCRATCH(base) + i));
3795   }
3796 
3797   p->needsdtr = p->needsdtr_copy;
3798   p->needwdtr = p->needwdtr_copy;
3799 #if 0
3800   printk("NeedSdtr = 0x%x, 0x%x\n", p->needsdtr_copy, p->needsdtr);
3801   printk("NeedWdtr = 0x%x, 0x%x\n", p->needwdtr_copy, p->needwdtr);
3802 #endif
3803 
3804   /*
3805    * Clear the control byte for every SCB so that the sequencer
3806    * doesn't get confused and think that one of them is valid
3807    */
3808   for (i = 0; i < config.maxscb; i++)
3809   {
3810     outb(i, SCBPTR(base));
3811     outb(0, SCBARRAY(base));
3812   }
3813 
3814   /*
3815    * For reconnecting targets, the sequencer code needs to
3816    * know how many SCBs it has to search through.
3817    */
3818   outb(config.maxscb, HA_SCBCOUNT(base));
3819 
3820   /*
3821    * Clear the active flags - no targets are busy.
3822    */
3823   outb(0, HA_ACTIVE0(base));
3824   outb(0, HA_ACTIVE1(base));
3825 
3826   /*
3827    * We don't have any waiting selections
3828    */
3829   outb(SCB_LIST_NULL, WAITING_SCBH(base));
3830   outb(SCB_LIST_NULL, WAITING_SCBT(base));
3831 
3832   /*
3833    * Reset the SCSI bus. Is this necessary?
3834    *   There may be problems for a warm boot without resetting
3835    *   the SCSI bus. Either BIOS settings in scratch RAM
3836    *   will not get reinitialized, or devices may stay at
3837    *   previous negotiated settings (SDTR and WDTR) while
3838    *   the driver will think that no negotiations have been
3839    *   performed.
3840    *
3841    * Some devices need a long time to "settle" after a SCSI
3842    * bus reset.
3843    */
3844 
3845   if (!aic7xxx_no_reset)
3846   {
3847     printk("Resetting the SCSI bus...\n");
3848     if (p->bus_type == AIC_TWIN)
3849     {
3850       /*
3851        * Select channel B.
3852        */
3853       outb(SELBUSB, SBLKCTL(base));
3854       outb(SCSIRSTO, SCSISEQ(base));
3855       udelay(1000);
3856       outb(0, SCSISEQ(base));
3857       /*
3858        * Select channel A.
3859        */
3860       outb(SELSINGLE, SBLKCTL(base));
3861     }
3862 
3863     outb(SCSIRSTO, SCSISEQ(base));
3864     udelay(1000);
3865     outb(0, SCSISEQ(base));
3866     aic7xxx_delay(AIC7XXX_RESET_DELAY);
3867   }
3868 
3869   /*
3870    * Unpause the sequencer before returning and enable
3871    * interrupts - we shouldn't get any until the first
3872    * command is sent to us by the high-level SCSI code.
3873    */
3874   UNPAUSE_SEQUENCER(p);
3875   return (found);
3876 }
3877 
3878 /*+F*************************************************************************
3879  * Function:
3880  *   aic7xxx_detect
3881  *
3882  * Description:
3883  *   Try to detect and register an Adaptec 7770 or 7870 SCSI controller.
3884  *-F*************************************************************************/
3885 int
3886 aic7xxx_detect(Scsi_Host_Template *template)
     /* [previous][next][first][last][top][bottom][index][help] */
3887 {
3888   aha_type type = AIC_NONE;
3889   int found = 0, slot, base;
3890   unsigned char irq = 0;
3891   int i;
3892 
3893   template->proc_dir = &proc_scsi_aic7xxx;
3894 
3895   /*
3896    * Since we may allow sharing of IRQs, it is imperative
3897    * that we "null-out" the aic7xxx_boards array. It is
3898    * not guaranteed to be initialized to 0 (NULL). We use
3899    * a NULL entry to indicate that no prior hosts have
3900    * been found/registered for that IRQ.
3901    */
3902   for (i = 0; i <= MAXIRQ; i++)
3903   {
3904     aic7xxx_boards[i] = NULL;
3905   }
3906 
3907   /*
3908    * Initialize the spurious count to 0.
3909    */
3910   aic7xxx_spurious_count = 0;
3911 
3912   /*
3913    * EISA/VL-bus card signature probe.
3914    */
3915   for (slot = MINSLOT; slot <= MAXSLOT; slot++)
3916   {
3917     base = SLOTBASE(slot);
3918 
3919     if (check_region(MINREG(base), MAXREG(base) - MINREG(base)))
3920     {
3921       /*
3922        * Some other driver has staked a
3923        * claim to this i/o region already.
3924        */
3925       continue;
3926     }
3927 
3928     type = aic7xxx_probe(slot, HID0(base));
3929     if (type != AIC_NONE)
3930     {
3931       /*
3932        * We found a card, allow 1 spurious interrupt.
3933        */
3934       aic7xxx_spurious_count = 1;
3935 
3936 #if 0
3937       printk("aic7xxx: hcntrl=0x%x\n", inb(HCNTRL(base)));
3938       outb(inb(HCNTRL(base)) | CHIPRST, HCNTRL(base));
3939       irq = inb(HA_INTDEF(base)) & 0x0F;
3940 #endif
3941 
3942       /*
3943        * We "find" a AIC-7770 if we locate the card
3944        * signature and we can set it up and register
3945        * it with the kernel without incident.
3946        */
3947       found += aic7xxx_register(template, type, base, irq);
3948 
3949       /*
3950        * Disallow spurious interrupts.
3951        */
3952       aic7xxx_spurious_count = 0;
3953     }
3954   }
3955 
3956 #ifdef CONFIG_PCI
3957 
3958 #define DEVREVID  0x08
3959 #define DEVCONFIG 0x40
3960 #define DEVSTATUS 0x41
3961 #define RAMPSM    0x02
3962 
3963   /*
3964    * PCI-bus probe.
3965    */
3966   if (pcibios_present())
3967   {
3968     int error;
3969     int done = 0;
3970     unsigned int io_port;
3971     unsigned short index = 0;
3972     unsigned char pci_bus, pci_device_fn;
3973     unsigned char devrevid, devconfig, devstatus;
3974     char rev_id[] = {'B', 'C', 'D'};
3975 
3976     while (!done)
3977     {
3978       if ((!pcibios_find_device(PCI_VENDOR_ID_ADAPTEC,
3979                                 PCI_DEVICE_ID_ADAPTEC_294x,
3980                                 index, &pci_bus, &pci_device_fn)) ||
3981            (!pcibios_find_device(PCI_VENDOR_ID_ADAPTEC,
3982                                 PCI_DEVICE_ID_ADAPTEC_2940,
3983                                 index, &pci_bus, &pci_device_fn)))
3984       {
3985         type = AIC_7870;
3986       }
3987       else
3988       {
3989         if (!pcibios_find_device(PCI_VENDOR_ID_ADAPTEC,
3990                                 PCI_DEVICE_ID_ADAPTEC_7850,
3991                                 index, &pci_bus, &pci_device_fn))
3992         {
3993           type = AIC_7850;
3994         }
3995         else
3996         {
3997           if (!pcibios_find_device(PCI_VENDOR_ID_ADAPTEC,
3998                                   PCI_DEVICE_ID_ADAPTEC_7872,
3999                                   index, &pci_bus, &pci_device_fn))
4000           {
4001             type = AIC_7872;
4002           }
4003           else
4004           {
4005             type = AIC_NONE;
4006             done = 1;
4007           }
4008         }
4009       }
4010 
4011       if (!done)
4012       {
4013         /*
4014          * Read esundry information from PCI BIOS.
4015          */
4016         error = pcibios_read_config_dword(pci_bus, pci_device_fn,
4017                                           PCI_BASE_ADDRESS_0, &io_port);
4018 
4019         if (error)
4020         {
4021           panic("aic7xxx_detect: error 0x%x reading i/o port.\n", error);
4022         }
4023 
4024         error = pcibios_read_config_byte(pci_bus, pci_device_fn,
4025                                          PCI_INTERRUPT_LINE, &irq);
4026         if (error)
4027         {
4028           panic("aic7xxx_detect: error %d reading irq.\n", error);
4029         }
4030 
4031         /*
4032          * Make the base I/O register look like EISA and VL-bus.
4033          */
4034         base = io_port - 0xC01;
4035 
4036         /*
4037          * I don't think we need to bother with allowing
4038          * spurious interrupts for the 787x/7850, but what
4039          * the hey.
4040          */
4041         aic7xxx_spurious_count = 1;
4042 
4043 #if 0
4044         printk("aic7xxx: hcntrl=0x%x\n", inb(HCNTRL(base)));
4045 #endif
4046         outb(inb(HCNTRL(base)) | CHIPRST, HCNTRL(base));
4047 
4048         error = pcibios_read_config_byte(pci_bus, pci_device_fn,
4049                                          DEVREVID, &devrevid);
4050         if (devrevid < 3)
4051         {
4052           printk("aic7xxx_detect: AIC-7870 Rev %c\n", rev_id[devrevid]);
4053         }
4054         error = pcibios_read_config_byte(pci_bus, pci_device_fn,
4055                                          DEVCONFIG, &devconfig);
4056         error = pcibios_read_config_byte(pci_bus, pci_device_fn,
4057                                          DEVSTATUS, &devstatus);
4058         printk("aic7xxx_detect: devconfig 0x%x, devstatus 0x%x\n",
4059                devconfig, devstatus);
4060         if (devstatus & RAMPSM)
4061         {
4062           printk("aic7xxx_detect: detected external SCB RAM, "
4063                  "mail deang@ims.com for test patch");
4064         }
4065 
4066         found += aic7xxx_register(template, type, base, irq);
4067 
4068         /*
4069          * Disable spurious interrupts.
4070          */
4071         aic7xxx_spurious_count = 0;
4072 
4073         index++;
4074       }
4075     }
4076   }
4077 #endif CONFIG_PCI
4078 
4079   template->name = aic7xxx_info(NULL);
4080   return (found);
4081 }
4082 
4083 
4084 /*+F*************************************************************************
4085  * Function:
4086  *   aic7xxx_buildscb
4087  *
4088  * Description:
4089  *   Build a SCB.
4090  *-F*************************************************************************/
4091 static void
4092 aic7xxx_buildscb(struct aic7xxx_host *p,
     /* [previous][next][first][last][top][bottom][index][help] */
4093                  Scsi_Cmnd *cmd,
4094                  struct aic7xxx_scb *scb)
4095 {
4096   void *addr;
4097   unsigned short mask;
4098   struct scatterlist *sg;
4099 
4100   /*
4101    * Setup the control byte if we need negotiation and have not
4102    * already requested it.
4103    */
4104 #ifdef AIC7XXX_TAGGED_QUEUEING
4105   if (cmd->device->tagged_supported)
4106   {
4107     if (cmd->device->tagged_queue == 0)
4108     {
4109       printk("aic7xxx_buildscb: Enabling tagged queuing for target %d, "
4110              "channel %d\n", cmd->target, cmd->channel);
4111       cmd->device->tagged_queue = 1;
4112       cmd->device->current_tag = 1;  /* enable tagging */
4113     }
4114     cmd->tag = cmd->device->current_tag;
4115     cmd->device->current_tag++;
4116     scb->control |= SCB_TE;
4117   }
4118 #endif
4119   mask = (0x01 << (cmd->target | (cmd->channel << 3)));
4120   if (p->discenable & mask)
4121   {
4122     scb->control |= SCB_DISCENB;
4123   }
4124   if ((p->needwdtr & mask) && !(p->wdtr_pending & mask))
4125   {
4126     p->wdtr_pending |= mask;
4127     scb->control |= SCB_NEEDWDTR;
4128 #if 0
4129     printk("Sending WDTR request to target %d.\n", cmd->target);
4130 #endif
4131   }
4132   else
4133   {
4134     if ((p->needsdtr & mask) && !(p->sdtr_pending & mask))
4135     {
4136       p->sdtr_pending |= mask;
4137       scb->control |= SCB_NEEDSDTR;
4138 #if 0
4139       printk("Sending SDTR request to target %d.\n", cmd->target);
4140 #endif
4141     }
4142   }
4143 
4144 #if 0
4145   printk("aic7xxx_queue: target %d, cmd 0x%x (size %u), wdtr 0x%x, mask 0x%x\n",
4146          cmd->target, cmd->cmnd[0], cmd->cmd_len, p->needwdtr, mask);
4147 #endif
4148   scb->target_channel_lun = ((cmd->target << 4) & 0xF0) |
4149         ((cmd->channel & 0x01) << 3) | (cmd->lun & 0x07);
4150 
4151   /*
4152    * The interpretation of request_buffer and request_bufflen
4153    * changes depending on whether or not use_sg is zero; a
4154    * non-zero use_sg indicates the number of elements in the
4155    * scatter-gather array.
4156    */
4157 
4158   /*
4159    * XXX - this relies on the host data being stored in a
4160    *       little-endian format.
4161    */
4162   addr = cmd->cmnd;
4163   scb->SCSI_cmd_length = cmd->cmd_len;
4164   memcpy(scb->SCSI_cmd_pointer, &addr, sizeof(scb->SCSI_cmd_pointer));
4165 
4166   if (cmd->use_sg)
4167   {
4168 #if 0
4169     debug("aic7xxx_buildscb: SG used, %d segments, length %u\n",
4170            cmd->use_sg, length);
4171 #endif
4172     scb->SG_segment_count = cmd->use_sg;
4173     memcpy(scb->SG_list_pointer, &cmd->request_buffer,
4174            sizeof(scb->SG_list_pointer));
4175     memcpy(&sg, &cmd->request_buffer, sizeof(sg));
4176     memcpy(scb->data_pointer, &(sg[0].address), sizeof(scb->data_pointer));
4177     scb->data_count[0] = sg[0].length & 0xFF;
4178     scb->data_count[1] = (sg[0].length >> 8) & 0xFF;
4179     scb->data_count[2] = (sg[0].length >> 16) & 0xFF;
4180   }
4181   else
4182   {
4183 #if 0
4184   debug("aic7xxx_buildscb: Creating scatterlist, addr=0x%lx, length=%d.\n",
4185         (unsigned long) cmd->request_buffer, cmd->request_bufflen);
4186 #endif
4187     if (cmd->request_bufflen == 0)
4188     {
4189       /*
4190        * In case the higher level SCSI code ever tries to send a zero
4191        * length command, ensure the SCB indicates no data.  The driver
4192        * will interpret a zero length command as a Bus Device Reset.
4193        */
4194       scb->SG_segment_count = 0;
4195       memset(scb->SG_list_pointer, 0, sizeof(scb->SG_list_pointer));
4196       memset(scb->data_pointer, 0, sizeof(scb->data_pointer));
4197       memset(scb->data_count, 0, sizeof(scb->data_count));
4198     }
4199     else
4200     {
4201       scb->SG_segment_count = 1;
4202       scb->sg.address = (char *) cmd->request_buffer;
4203       scb->sg.length = cmd->request_bufflen;
4204       addr = &scb->sg;
4205       memcpy(scb->SG_list_pointer, &addr, sizeof(scb->SG_list_pointer));
4206       scb->data_count[0] = scb->sg.length & 0xFF;
4207       scb->data_count[1] = (scb->sg.length >> 8) & 0xFF;
4208       scb->data_count[2] = (scb->sg.length >> 16) & 0xFF;
4209       memcpy(scb->data_pointer, &cmd->request_buffer, sizeof(scb->data_pointer));
4210     }
4211   }
4212 }
4213 
4214 /*+F*************************************************************************
4215  * Function:
4216  *   aic7xxx_queue
4217  *
4218  * Description:
4219  *   Queue a SCB to the controller.
4220  *-F*************************************************************************/
4221 int
4222 aic7xxx_queue(Scsi_Cmnd *cmd, void (*fn)(Scsi_Cmnd *))
     /* [previous][next][first][last][top][bottom][index][help] */
4223 {
4224   long flags;
4225   struct aic7xxx_host *p;
4226   struct aic7xxx_scb *scb;
4227   unsigned char curscb;
4228 
4229   p = (struct aic7xxx_host *) cmd->host->hostdata;
4230 
4231   /*
4232    * Check to see if channel was scanned.
4233    */
4234   if (!p->a_scanned && (cmd->channel == 0))
4235   {
4236     printk("aic7xxx: Scanning channel A for devices.\n");
4237     p->a_scanned = 1;
4238   }
4239   else
4240   {
4241     if (!p->b_scanned && (cmd->channel == 1))
4242     {
4243       printk("aic7xxx: Scanning channel B for devices.\n");
4244       p->b_scanned = 1;
4245     }
4246   }
4247 
4248 #if 0
4249   debug("aic7xxx_queue: cmd 0x%x (size %u), target %d, channel %d, lun %d\n",
4250         cmd->cmnd[0], cmd->cmd_len, cmd->target, cmd->channel,
4251         cmd->lun & 0x07);
4252 #endif
4253 
4254   /*
4255    * This is a critical section, since we don't want the
4256    * interrupt routine mucking with the host data or the
4257    * card. Since the kernel documentation is vague on
4258    * whether or not we are in a cli/sti pair already, save
4259    * the flags to be on the safe side.
4260    */
4261   save_flags(flags);
4262   cli();
4263 
4264   /*
4265    * Find a free slot in the SCB array to load this command
4266    * into. Since can_queue is set to the maximum number of
4267    * SCBs for the card, we should always find one.
4268    *
4269    * First try to find an scb in the free list. If there are
4270    * none in the free list, then check the current number of
4271    * of scbs and take an unused one from the scb array.
4272    */
4273   scb = p->free_scb;
4274   if (scb != NULL)
4275   { /* found one in the free list */
4276     p->free_scb = scb->next;   /* remove and update head of list */
4277     /*
4278      * Warning! For some unknown reason, the scb at the head
4279      * of the free list is not the same address that it should
4280      * be. That's why we set the scb pointer taken by the
4281      * position in the array. The scb at the head of the list
4282      * should match this address, but it doesn't.
4283      */
4284     scb = &(p->scb_array[scb->position]);
4285     scb->control = 0;
4286     scb->state = SCB_ACTIVE;
4287   }
4288   else
4289   {
4290     if (p->numscb >= p->maxscb)
4291     {
4292       panic("aic7xxx_queue: couldn't find a free scb\n");
4293     }
4294     else
4295     {
4296       /*
4297        * Initialize the scb within the scb array. The
4298        * position within the array is the position on
4299        * the board that it will be loaded.
4300        */
4301       scb = &(p->scb_array[p->numscb]);
4302       memset(scb, 0, sizeof(*scb));
4303 
4304       scb->position = p->numscb;
4305       p->numscb++;
4306       scb->state = SCB_ACTIVE;
4307       scb->next_waiting = SCB_LIST_NULL;
4308       memcpy(scb->host_scb, &scb, sizeof(scb));
4309       scb->control = SCB_NEEDDMA;
4310       PAUSE_SEQUENCER(p);
4311       curscb = inb(SCBPTR(p->base));
4312       outb(scb->position, SCBPTR(p->base));
4313       aic7xxx_putscb_dma(p->base, scb);
4314       outb(curscb, SCBPTR(p->base));
4315       UNPAUSE_SEQUENCER(p);
4316       scb->control = 0;
4317     }
4318   }
4319 
4320   scb->cmd = cmd;
4321   aic7xxx_position(cmd) = scb->position;
4322 #if 0
4323   debug_scb(scb);
4324 #endif;
4325 
4326   /*
4327    * Construct the SCB beforehand, so the sequencer is
4328    * paused a minimal amount of time.
4329    */
4330   aic7xxx_buildscb(p, cmd, scb);
4331 
4332 #if 0
4333   if (scb != &p->scb_array[scb->position])
4334   {
4335     printk("aic7xxx_queue: address of scb by position does not match scb address\n");
4336   }
4337   printk("aic7xxx_queue: SCB pos=%d, cmdptr=0x%x, state=%d, freescb=0x%x\n",
4338          scb->position, (unsigned int) scb->cmd,
4339          scb->state, (unsigned int) p->free_scb);
4340 #endif
4341   /*
4342    * Pause the sequencer so we can play with its registers -
4343    * wait for it to acknowledge the pause.
4344    *
4345    * XXX - should the interrupts be left on while doing this?
4346    */
4347   PAUSE_SEQUENCER(p);
4348 
4349   /*
4350    * Save the SCB pointer and put our own pointer in - this
4351    * selects one of the four banks of SCB registers. Load
4352    * the SCB, then write its pointer into the queue in FIFO
4353    * and restore the saved SCB pointer.
4354    */
4355   aic7xxx_putscb(p->base, scb);
4356 
4357   /*
4358    * Make sure the Scsi_Cmnd pointer is saved, the struct it
4359    * points to is set up properly, and the parity error flag
4360    * is reset, then unpause the sequencer and watch the fun
4361    * begin.
4362    */
4363   cmd->scsi_done = fn;
4364   aic7xxx_error(cmd) = DID_OK;
4365   aic7xxx_status(cmd) = 0;
4366   scb->timer_status = 0x0;
4367   cmd->result = 0;
4368   memset(&cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
4369 
4370   UNPAUSE_SEQUENCER(p);
4371 #if 0
4372   printk("aic7xxx_queue: After - cmd = 0x%lx, scb->cmd = 0x%lx, pos = %d\n",
4373          (long) cmd, (long) scb->cmd, scb->position);
4374 #endif;
4375   restore_flags(flags);
4376   return (0);
4377 }
4378 
4379 /*+F*************************************************************************
4380  * Function:
4381  *   aic7xxx_abort_scb
4382  *
4383  * Description:
4384  *   Abort an scb.  If the scb has not previously been aborted, then
4385  *   we attempt to send a BUS_DEVICE_RESET message to the target.  If
4386  *   the scb has previously been unsuccessfully aborted, then we will
4387  *   reset the channel and have all devices renegotiate.
4388  *-F*************************************************************************/
4389 static void
4390 aic7xxx_abort_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
     /* [previous][next][first][last][top][bottom][index][help] */
4391 {
4392   int base = p->base;
4393   int found = 0;
4394   char channel = scb->target_channel_lun & SELBUSB ? 'B': 'A';
4395 
4396   /*
4397    * Ensure that the card doesn't do anything
4398    * behind our back.
4399    */
4400   PAUSE_SEQUENCER(p);
4401 
4402   /*
4403    * First, determine if we want to do a bus reset or simply a bus device
4404    * reset.  If this is the first time that a transaction has timed out,
4405    * just schedule a bus device reset.  Otherwise, we reset the bus and
4406    * abort all pending I/Os on that bus.
4407    */
4408   if (scb->state & SCB_ABORTED)
4409   {
4410     /*
4411      * Been down this road before.  Do a full bus reset.
4412      */
4413     found = aic7xxx_reset_channel(p, channel, scb->position);
4414   }
4415   else
4416   {
4417     unsigned char active_scb, control;
4418     struct aic7xxx_scb *active_scbp;
4419 
4420     /*
4421      * Send a Bus Device Reset Message:
4422      * The target we select to send the message to may be entirely
4423      * different than the target pointed to by the scb that timed
4424      * out.  If the command is in the QINFIFO or the waiting for
4425      * selection list, its not tying up the bus and isn't responsible
4426      * for the delay so we pick off the active command which should
4427      * be the SCB selected by SCBPTR.  If its disconnected or active,
4428      * we device reset the target scbp points to.  Although it may
4429      * be that this target is not responsible for the delay, it may
4430      * may also be that we're timing out on a command that just takes
4431      * too much time, so we try the bus device reset there first.
4432      */
4433     active_scb = inb(SCBPTR(base));
4434     active_scbp = &(p->scb_array[active_scb]);
4435     control = inb(SCBARRAY(base));
4436 
4437     /*
4438      * Test to see if scbp is disconnected
4439      */
4440     outb(scb->position, SCBPTR(base));
4441     if (inb(SCBARRAY(base)) & SCB_DIS)
4442     {
4443       scb->state |= (SCB_DEVICE_RESET | SCB_ABORTED);
4444       scb->SG_segment_count = 0;
4445       memset(scb->SG_list_pointer, 0, sizeof(scb->SG_list_pointer));
4446       memset(scb->data_pointer, 0, sizeof(scb->data_pointer));
4447       memset(scb->data_count, 0, sizeof(scb->data_count));
4448       outb(SCBAUTO, SCBCNT(base));
4449       asm volatile("cld\n\t"
4450                    "rep\n\t"
4451                    "outsb"
4452                    : /* no output */
4453                    :"S" (scb), "c" (SCB_DOWNLOAD_SIZE), "d" (SCBARRAY(base))
4454                    :"si", "cx", "dx");
4455       outb(0, SCBCNT(base));
4456       aic7xxx_add_waiting_scb(base, scb, LIST_SECOND);
4457       aic7xxx_scb_tsleep(p, scb, 2 * HZ);  /* unpauses the sequencer */
4458     }
4459     else
4460     {
4461       /*
4462        * Is the active SCB really active?
4463        */
4464       if ((active_scbp->state & SCB_ACTIVE) && (control & SCB_NEEDDMA))
4465       {
4466         unsigned char flags = inb(HA_FLAGS(base));
4467         if (flags & ACTIVE_MSG)
4468         {
4469           /*
4470            * If we're in a message phase, tacking on another message
4471            * may confuse the target totally. The bus is probably wedged,
4472            * so reset the channel.
4473            */
4474           channel = (active_scbp->target_channel_lun & SELBUSB) ? 'B': 'A';
4475           aic7xxx_reset_channel(p, channel, scb->position);
4476         }
4477         else
4478         {
4479           /*
4480            * Load the message buffer and assert attention.
4481            */
4482           active_scbp->state |= (SCB_DEVICE_RESET | SCB_ABORTED);
4483           outb(flags | ACTIVE_MSG, HA_FLAGS(base));
4484           outb(1, HA_MSG_LEN(base));
4485           outb(MSG_BUS_DEVICE_RESET, HA_MSG_START(base));
4486           if (active_scbp->target_channel_lun != scb->target_channel_lun)
4487           {
4488             /*
4489              * XXX - We would like to increment the timeout on scb, but
4490              *       access to that routine is denied because it is hidden
4491              *       in scsi.c.  If we were able to do this, it would give
4492              *       scb a new lease on life.
4493              */
4494             ;
4495           }
4496           aic7xxx_scb_tsleep(p, active_scbp, 2 * HZ);
4497         }
4498       }
4499       else
4500       {
4501         /*
4502          * No active command to single out, so reset
4503          * the bus for the timed out target.
4504          */
4505         aic7xxx_reset_channel(p, channel, scb->position);
4506       }
4507     }
4508   }
4509 }
4510 
4511 /*+F*************************************************************************
4512  * Function:
4513  *   aic7xxx_abort
4514  *
4515  * Description:
4516  *   Abort the current SCSI command(s).
4517  *-F*************************************************************************/
4518 int
4519 aic7xxx_abort(Scsi_Cmnd *cmd)
     /* [previous][next][first][last][top][bottom][index][help] */
4520 {
4521   struct aic7xxx_scb  *scb;
4522   struct aic7xxx_host *p;
4523   long flags;
4524 
4525   p = (struct aic7xxx_host *) cmd->host->hostdata;
4526   scb = &(p->scb_array[aic7xxx_position(cmd)]);
4527 
4528   save_flags(flags);
4529   cli();
4530 
4531   aic7xxx_abort_scb(p, scb);
4532 
4533   restore_flags(flags);
4534   return (0);
4535 }
4536 
4537 /*+F*************************************************************************
4538  * Function:
4539  *   aic7xxx_reset
4540  *
4541  * Description:
4542  *   Resetting the bus always succeeds - is has to, otherwise the
4543  *   kernel will panic! Try a surgical technique - sending a BUS
4544  *   DEVICE RESET message - on the offending target before pulling
4545  *   the SCSI bus reset line.
4546  *-F*************************************************************************/
4547 int
4548 aic7xxx_reset(Scsi_Cmnd *cmd)
     /* [previous][next][first][last][top][bottom][index][help] */
4549 {
4550   return (aic7xxx_abort(cmd));
4551 }
4552 
4553 /*+F*************************************************************************
4554  * Function:
4555  *   aic7xxx_biosparam
4556  *
4557  * Description:
4558  *   Return the disk geometry for the given SCSI device.
4559  *-F*************************************************************************/
4560 int
4561 aic7xxx_biosparam(Disk *disk, kdev_t dev, int geom[])
     /* [previous][next][first][last][top][bottom][index][help] */
4562 {
4563   int heads, sectors, cylinders;
4564   struct aic7xxx_host *p;
4565 
4566   p = (struct aic7xxx_host *) disk->device->host->hostdata;
4567 
4568   /*
4569    * XXX - if I could portably find the card's configuration
4570    *       information, then this could be autodetected instead
4571    *       of left to a boot-time switch.
4572    */
4573   heads = 64;
4574   sectors = 32;
4575   cylinders = disk->capacity / (heads * sectors);
4576 
4577   if (p->extended && cylinders > 1024)
4578   {
4579     heads = 255;
4580     sectors = 63;
4581     cylinders = disk->capacity / (255 * 63);
4582   }
4583 
4584   geom[0] = heads;
4585   geom[1] = sectors;
4586   geom[2] = cylinders;
4587 
4588   return (0);
4589 }
4590 
4591 #include "aic7xxx_proc.c"
4592 
4593 #ifdef MODULE
4594 /* Eventually this will go into an include file, but this will be later */
4595 Scsi_Host_Template driver_template = AIC7XXX;
4596 
4597 #include "scsi_module.c"
4598 #endif
4599 
4600 /*
4601  * Overrides for Emacs so that we almost follow Linus's tabbing style.
4602  * Emacs will notice this stuff at the end of the file and automatically
4603  * adjust the settings for this buffer only.  This must remain at the end
4604  * of the file.
4605  * ---------------------------------------------------------------------------
4606  * Local variables:
4607  * c-indent-level: 2
4608  * c-brace-imaginary-offset: 0
4609  * c-brace-offset: -2
4610  * c-argdecl-indent: 2
4611  * c-label-offset: -2
4612  * c-continued-statement-offset: 2
4613  * c-continued-brace-offset: 0
4614  * indent-tabs-mode: nil
4615  * tab-width: 8
4616  * End:
4617  */
/* [previous][next][first][last][top][bottom][index][help] */