![[first]](../icons/first.png){kind=icon}
![[previous]](../icons/n_left.png){kind=icon}
![[next]](../icons/n_right.png){kind=icon}
![[last]](../icons/last.png){kind=icon}
![[top]](../icons/n_top.png){kind=icon}
![[bottom]](../icons/bottom.png){kind=icon}
![[index]](../icons/index.png){kind=icon}
![[help]](../icons/help.png){kind=icon}
*/
1 /* lance.c: An AMD LANCE ethernet driver for linux. */
2 /*
3 Written 1993,1994,1995 by Donald Becker.
4
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU Public License, incorporated herein by reference.
9
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100 clone) ethercards.
12
13 The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O
14 Center of Excellence in Space Data and Information Sciences
15 Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771
16 */
17
18 static const char *version = "lance.c:v1.08 4/10/95 dplatt@3do.com\n";
19
20 #include <linux/config.h>
21 #include <linux/kernel.h>
22 #include <linux/sched.h>
23 #include <linux/string.h>
24 #include <linux/ptrace.h>
25 #include <linux/errno.h>
26 #include <linux/ioport.h>
27 #include <linux/malloc.h>
28 #include <linux/interrupt.h>
29 #include <linux/pci.h>
30 #include <linux/bios32.h>
31 #include <asm/bitops.h>
32 #include <asm/io.h>
33 #include <asm/dma.h>
34
35 #include <linux/netdevice.h>
36 #include <linux/etherdevice.h>
37 #include <linux/skbuff.h>
38
39 static unsigned int lance_portlist[] = {0x300, 0x320, 0x340, 0x360, 0};
40 void lance_probe1(int ioaddr);
41
42 #ifdef HAVE_DEVLIST
43 struct netdev_entry lance_drv =
44 {"lance", lance_probe1, LANCE_TOTAL_SIZE, lance_portlist};
45 #endif
46
47 #ifdef LANCE_DEBUG
48 int lance_debug = LANCE_DEBUG;
49 #else
50 int lance_debug = 1;
51 #endif
52
53 /*
54 Theory of Operation
55
56 I. Board Compatibility
57
58 This device driver is designed for the AMD 79C960, the "PCnet-ISA
59 single-chip ethernet controller for ISA". This chip is used in a wide
60 variety of boards from vendors such as Allied Telesis, HP, Kingston,
61 and Boca. This driver is also intended to work with older AMD 7990
62 designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
63 I use the name LANCE to refer to all of the AMD chips, even though it properly
64 refers only to the original 7990.
65
66 II. Board-specific settings
67
68 The driver is designed to work the boards that use the faster
69 bus-master mode, rather than in shared memory mode. (Only older designs
70 have on-board buffer memory needed to support the slower shared memory mode.)
71
72 Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
73 channel. This driver probes the likely base addresses:
74 {0x300, 0x320, 0x340, 0x360}.
75 After the board is found it generates a DMA-timeout interrupt and uses
76 autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
77 of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
78 probed for by enabling each free DMA channel in turn and checking if
79 initialization succeeds.
80
81 The HP-J2405A board is an exception: with this board it's easy to read the
82 EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
83 _know_ the base address -- that field is for writing the EEPROM.)
84
85 III. Driver operation
86
87 IIIa. Ring buffers
88 The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
89 the base and length of the data buffer, along with status bits. The length
90 of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
91 the buffer length (rather than being directly the buffer length) for
92 implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
93 ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
94 needlessly uses extra space and reduces the chance that an upper layer will
95 be able to reorder queued Tx packets based on priority. Decreasing the number
96 of entries makes it more difficult to achieve back-to-back packet transmission
97 and increases the chance that Rx ring will overflow. (Consider the worst case
98 of receiving back-to-back minimum-sized packets.)
99
100 The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
101 statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
102 avoid the administrative overhead. For the Rx side this avoids dynamically
103 allocating full-sized buffers "just in case", at the expense of a
104 memory-to-memory data copy for each packet received. For most systems this
105 is a good tradeoff: the Rx buffer will always be in low memory, the copy
106 is inexpensive, and it primes the cache for later packet processing. For Tx
107 the buffers are only used when needed as low-memory bounce buffers.
108
109 IIIB. 16M memory limitations.
110 For the ISA bus master mode all structures used directly by the LANCE,
111 the initialization block, Rx and Tx rings, and data buffers, must be
112 accessible from the ISA bus, i.e. in the lower 16M of real memory.
113 This is a problem for current Linux kernels on >16M machines. The network
114 devices are initialized after memory initialization, and the kernel doles out
115 memory from the top of memory downward. The current solution is to have a
116 special network initialization routine that's called before memory
117 initialization; this will eventually be generalized for all network devices.
118 As mentioned before, low-memory "bounce-buffers" are used when needed.
119
120 IIIC. Synchronization
121 The driver runs as two independent, single-threaded flows of control. One
122 is the send-packet routine, which enforces single-threaded use by the
123 dev->tbusy flag. The other thread is the interrupt handler, which is single
124 threaded by the hardware and other software.
125
126 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
127 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
128 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
129 the 'lp->tx_full' flag.
130
131 The interrupt handler has exclusive control over the Rx ring and records stats
132 from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
133 we can't avoid the interrupt overhead by having the Tx routine reap the Tx
134 stats.) After reaping the stats, it marks the queue entry as empty by setting
135 the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
136 tx_full and tbusy flags.
137
138 */
139
140 /* Set the number of Tx and Rx buffers, using Log_2(# buffers).
141 Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
142 That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4). */
143 #ifndef LANCE_LOG_TX_BUFFERS
144 #define LANCE_LOG_TX_BUFFERS 4
145 #define LANCE_LOG_RX_BUFFERS 4
146 #endif
147
148 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
149 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
150 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
151
152 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
153 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
154 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
155
156 #define PKT_BUF_SZ 1544
157
158 /* Offsets from base I/O address. */
159 #define LANCE_DATA 0x10
160 #define LANCE_ADDR 0x12
161 #define LANCE_RESET 0x14
162 #define LANCE_BUS_IF 0x16
163 #define LANCE_TOTAL_SIZE 0x18
164
165 /* The LANCE Rx and Tx ring descriptors. */
166 struct lance_rx_head {
167 int base;
168 short buf_length; /* This length is 2s complement (negative)! */
169 short msg_length; /* This length is "normal". */
170 };
171
172 struct lance_tx_head {
173 int base;
174 short length; /* Length is 2s complement (negative)! */
175 short misc;
176 };
177
178 /* The LANCE initialization block, described in databook. */
179 struct lance_init_block {
180 unsigned short mode; /* Pre-set mode (reg. 15) */
181 unsigned char phys_addr[6]; /* Physical ethernet address */
182 unsigned filter[2]; /* Multicast filter (unused). */
183 /* Receive and transmit ring base, along with extra bits. */
184 unsigned rx_ring; /* Tx and Rx ring base pointers */
185 unsigned tx_ring;
186 };
187
188 struct lance_private {
189 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries.
190 This is always true for kmalloc'ed memory */
191 struct lance_rx_head rx_ring[RX_RING_SIZE];
192 struct lance_tx_head tx_ring[TX_RING_SIZE];
193 struct lance_init_block init_block;
194 const char *name;
195 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
196 struct sk_buff* tx_skbuff[TX_RING_SIZE];
197 long rx_buffs; /* Address of Rx and Tx buffers. */
198 /* Tx low-memory "bounce buffer" address. */
199 char (*tx_bounce_buffs)[PKT_BUF_SZ];
200 int cur_rx, cur_tx; /* The next free ring entry */
201 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
202 int dma;
203 struct enet_statistics stats;
204 unsigned char chip_version; /* See lance_chip_type. */
205 char tx_full;
206 char lock;
207 };
208
209 #define LANCE_MUST_PAD 0x00000001
210 #define LANCE_ENABLE_AUTOSELECT 0x00000002
211 #define LANCE_MUST_REINIT_RING 0x00000004
212 #define LANCE_MUST_UNRESET 0x00000008
213 #define LANCE_HAS_MISSED_FRAME 0x00000010
214
215 /* A mapping from the chip ID number to the part number and features.
216 These are from the datasheets -- in real life the '970 version
217 reportedly has the same ID as the '965. */
218 static struct lance_chip_type {
219 int id_number;
220 const char *name;
221 int flags;
222 } chip_table[] = {
223 {0x0000, "LANCE 7990", /* Ancient lance chip. */
224 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
225 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
226 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
227 LANCE_HAS_MISSED_FRAME},
228 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
229 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
230 LANCE_HAS_MISSED_FRAME},
231 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
232 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
233 LANCE_HAS_MISSED_FRAME},
234 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
235 it the PCnet32. */
236 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
237 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
238 LANCE_HAS_MISSED_FRAME},
239 {0x0, "PCnet (unknown)",
240 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
241 LANCE_HAS_MISSED_FRAME},
242 };
243
244 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, LANCE_UNKNOWN=5};
245
246 /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
247 static unsigned char pci_irq_line = 0;
248
249 /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
250 Assume yes until we know the memory size. */
251 static unsigned char lance_need_isa_bounce_buffers = 1;
252
253 static int lance_open(struct device *dev);
254 static void lance_init_ring(struct device *dev);
255 static int lance_start_xmit(struct sk_buff *skb, struct device *dev);
256 static int lance_rx(struct device *dev);
257 static void lance_interrupt(int irq, struct pt_regs *regs);
258 static int lance_close(struct device *dev);
259 static struct enet_statistics *lance_get_stats(struct device *dev);
260 #ifdef HAVE_MULTICAST
261 static void set_multicast_list(struct device *dev, int num_addrs, void *addrs);
262 #endif
263
264
265
266 /* This lance probe is unlike the other board probes in 1.0.*. The LANCE may
267 have to allocate a contiguous low-memory region for bounce buffers.
268 This requirement is satisfied by having the lance initialization occur
269 before the memory management system is started, and thus well before the
270 other probes. */
271
272 int lance_init(void)
/* ![[next]](../icons/right.png)
![[first]](../icons/n_first.png)
![[top]](../icons/top.png)
*/
273 {
274 int *port;
275
276 if (high_memory <= 16*1024*1024)
277 lance_need_isa_bounce_buffers = 0;
278
279 #if defined(CONFIG_PCI)
280 if (pcibios_present()) {
281 int pci_index;
282 printk("lance.c: PCI bios is present, checking for devices...\n");
283 for (pci_index = 0; pci_index < 8; pci_index++) {
284 unsigned char pci_bus, pci_device_fn;
285 unsigned int pci_ioaddr;
286 unsigned short pci_command;
287
288 if (pcibios_find_device (PCI_VENDOR_ID_AMD,
289 PCI_DEVICE_ID_AMD_LANCE, pci_index,
290 &pci_bus, &pci_device_fn) != 0)
291 break;
292 pcibios_read_config_byte(pci_bus, pci_device_fn,
293 PCI_INTERRUPT_LINE, &pci_irq_line);
294 pcibios_read_config_dword(pci_bus, pci_device_fn,
295 PCI_BASE_ADDRESS_0, &pci_ioaddr);
296 /* Remove I/O space marker in bit 0. */
297 pci_ioaddr &= ~3;
298 /* PCI Spec 2.1 states that it is either the driver or PCI card's
299 * responsibility to set the PCI Master Enable Bit if needed.
300 * (From Mark Stockton <marks@schooner.sys.hou.compaq.com>)
301 */
302 pcibios_read_config_word(pci_bus, pci_device_fn,
303 PCI_COMMAND, &pci_command);
304 if ( ! (pci_command & PCI_COMMAND_MASTER)) {
305 printk("PCI Master Bit has not been set. Setting...\n");
306 pci_command |= PCI_COMMAND_MASTER;
307 pcibios_write_config_word(pci_bus, pci_device_fn,
308 PCI_COMMAND, pci_command);
309 }
310 printk("Found PCnet/PCI at %#x, irq %d.\n",
311 pci_ioaddr, pci_irq_line);
312 lance_probe1(pci_ioaddr);
313 pci_irq_line = 0;
314 }
315 }
316 #endif /* defined(CONFIG_PCI) */
317
318 for (port = lance_portlist; *port; port++) {
319 int ioaddr = *port;
320
321 if ( check_region(ioaddr, LANCE_TOTAL_SIZE) == 0) {
322 /* Detect "normal" 0x57 0x57 and the NI6510EB 0x52 0x44
323 signatures w/ minimal I/O reads */
324 char offset15, offset14 = inb(ioaddr + 14);
325
326 if ((offset14 == 0x52 || offset14 == 0x57) &&
327 ((offset15 = inb(ioaddr + 15)) == 0x57 || offset15 == 0x44))
328 lance_probe1(ioaddr);
329 }
330 }
331
332 return 0;
333 }
334
335 void lance_probe1(int ioaddr)
/* ![[previous]](../icons/left.png)
*/
336 {
337 struct device *dev;
338 struct lance_private *lp;
339 short dma_channels; /* Mark spuriously-busy DMA channels */
340 int i, reset_val, lance_version;
341 const char *chipname;
342 /* Flags for specific chips or boards. */
343 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
344 int hp_builtin = 0; /* HP on-board ethernet. */
345 static int did_version = 0; /* Already printed version info. */
346
347 /* First we look for special cases.
348 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
349 There are two HP versions, check the BIOS for the configuration port.
350 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
351 */
352 if ( *((unsigned short *) 0x000f0102) == 0x5048) {
353 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
354 int hp_port = ( *((unsigned char *) 0x000f00f1) & 1) ? 0x499 : 0x99;
355 /* We can have boards other than the built-in! Verify this is on-board. */
356 if ((inb(hp_port) & 0xc0) == 0x80
357 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
358 hp_builtin = hp_port;
359 }
360 /* We also recognize the HP Vectra on-board here, but check below. */
361 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
362 && inb(ioaddr+2) == 0x09);
363
364 /* Reset the LANCE. */
365 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
366
367 /* The Un-Reset needed is only needed for the real NE2100, and will
368 confuse the HP board. */
369 if (!hpJ2405A)
370 outw(reset_val, ioaddr+LANCE_RESET);
371
372 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
373 if (inw(ioaddr+LANCE_DATA) != 0x0004)
374 return;
375
376 /* Get the version of the chip. */
377 outw(88, ioaddr+LANCE_ADDR);
378 if (inw(ioaddr+LANCE_ADDR) != 88) {
379 lance_version = 0;
380 } else { /* Good, it's a newer chip. */
381 int chip_version = inw(ioaddr+LANCE_DATA);
382 outw(89, ioaddr+LANCE_ADDR);
383 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
384 if (lance_debug > 2)
385 printk(" LANCE chip version is %#x.\n", chip_version);
386 if ((chip_version & 0xfff) != 0x003)
387 return;
388 chip_version = (chip_version >> 12) & 0xffff;
389 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
390 if (chip_table[lance_version].id_number == chip_version)
391 break;
392 }
393 }
394
395 dev = init_etherdev(0, 0);
396 chipname = chip_table[lance_version].name;
397 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
398
399 /* There is a 16 byte station address PROM at the base address.
400 The first six bytes are the station address. */
401 for (i = 0; i < 6; i++)
402 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
403
404 dev->base_addr = ioaddr;
405 request_region(ioaddr, LANCE_TOTAL_SIZE, chip_table[lance_version].name);
406
407 /* Make certain the data structures used by the LANCE are aligned and DMAble. */
408 lp = (struct lance_private *) kmalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL);
409 memset(lp, 0, sizeof(*lp));
410 dev->priv = lp;
411 lp->name = chipname;
412 lp->rx_buffs = (unsigned long) kmalloc(PKT_BUF_SZ*RX_RING_SIZE, GFP_DMA | GFP_KERNEL);
413 lp->tx_bounce_buffs = NULL;
414 if (lance_need_isa_bounce_buffers)
415 lp->tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE, GFP_DMA | GFP_KERNEL);
416
417 lp->chip_version = lance_version;
418
419 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
420 for (i = 0; i < 6; i++)
421 lp->init_block.phys_addr[i] = dev->dev_addr[i];
422 lp->init_block.filter[0] = 0x00000000;
423 lp->init_block.filter[1] = 0x00000000;
424 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
425 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
426
427 outw(0x0001, ioaddr+LANCE_ADDR);
428 inw(ioaddr+LANCE_ADDR);
429 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
430 outw(0x0002, ioaddr+LANCE_ADDR);
431 inw(ioaddr+LANCE_ADDR);
432 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
433 outw(0x0000, ioaddr+LANCE_ADDR);
434 inw(ioaddr+LANCE_ADDR);
435
436 if (pci_irq_line) {
437 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
438 dev->irq = pci_irq_line;
439 } else if (hp_builtin) {
440 static const char dma_tbl[4] = {3, 5, 6, 0};
441 static const char irq_tbl[4] = {3, 4, 5, 9};
442 unsigned char port_val = inb(hp_builtin);
443 dev->dma = dma_tbl[(port_val >> 4) & 3];
444 dev->irq = irq_tbl[(port_val >> 2) & 3];
445 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
446 } else if (hpJ2405A) {
447 static const char dma_tbl[4] = {3, 5, 6, 7};
448 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
449 short reset_val = inw(ioaddr+LANCE_RESET);
450 dev->dma = dma_tbl[(reset_val >> 2) & 3];
451 dev->irq = irq_tbl[(reset_val >> 4) & 7];
452 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
453 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
454 short bus_info;
455 outw(8, ioaddr+LANCE_ADDR);
456 bus_info = inw(ioaddr+LANCE_BUS_IF);
457 dev->dma = bus_info & 0x07;
458 dev->irq = (bus_info >> 4) & 0x0F;
459 } else {
460 /* The DMA channel may be passed in PARAM1. */
461 if (dev->mem_start & 0x07)
462 dev->dma = dev->mem_start & 0x07;
463 }
464
465 if (dev->dma == 0) {
466 /* Read the DMA channel status register, so that we can avoid
467 stuck DMA channels in the DMA detection below. */
468 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
469 (inb(DMA2_STAT_REG) & 0xf0);
470 }
471 if (dev->irq >= 2)
472 printk(" assigned IRQ %d", dev->irq);
473 else {
474 /* To auto-IRQ we enable the initialization-done and DMA error
475 interrupts. For ISA boards we get a DMA error, but VLB and PCI
476 boards will work. */
477 autoirq_setup(0);
478
479 /* Trigger an initialization just for the interrupt. */
480 outw(0x0041, ioaddr+LANCE_DATA);
481
482 dev->irq = autoirq_report(1);
483 if (dev->irq)
484 printk(", probed IRQ %d", dev->irq);
485 else {
486 printk(", failed to detect IRQ line.\n");
487 return;
488 }
489
490 /* Check for the initialization done bit, 0x0100, which means
491 that we don't need a DMA channel. */
492 if (inw(ioaddr+LANCE_DATA) & 0x0100)
493 dev->dma = 4;
494 }
495
496 if (dev->dma == 4) {
497 printk(", no DMA needed.\n");
498 } else if (dev->dma) {
499 if (request_dma(dev->dma, chipname)) {
500 printk("DMA %d allocation failed.\n", dev->dma);
501 return;
502 } else
503 printk(", assigned DMA %d.\n", dev->dma);
504 } else { /* OK, we have to auto-DMA. */
505 for (i = 0; i < 4; i++) {
506 static const char dmas[] = { 5, 6, 7, 3 };
507 int dma = dmas[i];
508 int boguscnt;
509
510 /* Don't enable a permanently busy DMA channel, or the machine
511 will hang. */
512 if (test_bit(dma, &dma_channels))
513 continue;
514 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
515 if (request_dma(dma, chipname))
516 continue;
517 set_dma_mode(dma, DMA_MODE_CASCADE);
518 enable_dma(dma);
519
520 /* Trigger an initialization. */
521 outw(0x0001, ioaddr+LANCE_DATA);
522 for (boguscnt = 100; boguscnt > 0; --boguscnt)
523 if (inw(ioaddr+LANCE_DATA) & 0x0900)
524 break;
525 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
526 dev->dma = dma;
527 printk(", DMA %d.\n", dev->dma);
528 break;
529 } else {
530 disable_dma(dma);
531 free_dma(dma);
532 }
533 }
534 if (i == 4) { /* Failure: bail. */
535 printk("DMA detection failed.\n");
536 return;
537 }
538 }
539
540 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
541 /* Turn on auto-select of media (10baseT or BNC) so that the user
542 can watch the LEDs even if the board isn't opened. */
543 outw(0x0002, ioaddr+LANCE_ADDR);
544 outw(0x0002, ioaddr+LANCE_BUS_IF);
545 }
546
547 if (lance_debug > 0 && did_version++ == 0)
548 printk(version);
549
550 /* The LANCE-specific entries in the device structure. */
551 dev->open = &lance_open;
552 dev->hard_start_xmit = &lance_start_xmit;
553 dev->stop = &lance_close;
554 dev->get_stats = &lance_get_stats;
555 dev->set_multicast_list = &set_multicast_list;
556
557 return;
558 }
559
560
561 static int
562 lance_open(struct device *dev)
/* */
563 {
564 struct lance_private *lp = (struct lance_private *)dev->priv;
565 int ioaddr = dev->base_addr;
566 int i;
567
568 if (dev->irq == 0 ||
569 request_irq(dev->irq, &lance_interrupt, 0, lp->name)) {
570 return -EAGAIN;
571 }
572
573 /* We used to allocate DMA here, but that was silly.
574 DMA lines can't be shared! We now permanently snarf them. */
575
576 irq2dev_map[dev->irq] = dev;
577
578 /* Reset the LANCE */
579 inw(ioaddr+LANCE_RESET);
580
581 /* The DMA controller is used as a no-operation slave, "cascade mode". */
582 if (dev->dma != 4) {
583 enable_dma(dev->dma);
584 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
585 }
586
587 /* Un-Reset the LANCE, needed only for the NE2100. */
588 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
589 outw(0, ioaddr+LANCE_RESET);
590
591 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
592 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
593 outw(0x0002, ioaddr+LANCE_ADDR);
594 outw(0x0002, ioaddr+LANCE_BUS_IF);
595 }
596
597 if (lance_debug > 1)
598 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
599 dev->name, dev->irq, dev->dma, (int) lp->tx_ring, (int) lp->rx_ring,
600 (int) &lp->init_block);
601
602 lance_init_ring(dev);
603 /* Re-initialize the LANCE, and start it when done. */
604 outw(0x0001, ioaddr+LANCE_ADDR);
605 outw((short) (int) &lp->init_block, ioaddr+LANCE_DATA);
606 outw(0x0002, ioaddr+LANCE_ADDR);
607 outw(((int)&lp->init_block) >> 16, ioaddr+LANCE_DATA);
608
609 outw(0x0004, ioaddr+LANCE_ADDR);
610 outw(0x0915, ioaddr+LANCE_DATA);
611
612 outw(0x0000, ioaddr+LANCE_ADDR);
613 outw(0x0001, ioaddr+LANCE_DATA);
614
615 dev->tbusy = 0;
616 dev->interrupt = 0;
617 dev->start = 1;
618 i = 0;
619 while (i++ < 100)
620 if (inw(ioaddr+LANCE_DATA) & 0x0100)
621 break;
622 /*
623 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
624 * reports that doing so triggers a bug in the '974.
625 */
626 outw(0x0042, ioaddr+LANCE_DATA);
627
628 if (lance_debug > 2)
629 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
630 dev->name, i, (int) &lp->init_block, inw(ioaddr+LANCE_DATA));
631
632 return 0; /* Always succeed */
633 }
634
635 /* The LANCE has been halted for one reason or another (busmaster memory
636 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
637 etc.). Modern LANCE variants always reload their ring-buffer
638 configuration when restarted, so we must reinitialize our ring
639 context before restarting. As part of this reinitialization,
640 find all packets still on the Tx ring and pretend that they had been
641 sent (in effect, drop the packets on the floor) - the higher-level
642 protocols will time out and retransmit. It'd be better to shuffle
643 these skbs to a temp list and then actually re-Tx them after
644 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
645 */
646
647 static void
648 lance_purge_tx_ring(struct device *dev)
/* */
649 {
650 struct lance_private *lp = (struct lance_private *)dev->priv;
651 int i;
652
653 for (i = 0; i < TX_RING_SIZE; i++) {
654 if (lp->tx_skbuff[i]) {
655 dev_kfree_skb(lp->tx_skbuff[i],FREE_WRITE);
656 lp->tx_skbuff[i] = NULL;
657 }
658 }
659 }
660
661
662 /* Initialize the LANCE Rx and Tx rings. */
663 static void
664 lance_init_ring(struct device *dev)
/* */
665 {
666 struct lance_private *lp = (struct lance_private *)dev->priv;
667 int i;
668
669 lp->lock = 0, lp->tx_full = 0;
670 lp->cur_rx = lp->cur_tx = 0;
671 lp->dirty_rx = lp->dirty_tx = 0;
672
673 for (i = 0; i < RX_RING_SIZE; i++) {
674 lp->rx_ring[i].base = (lp->rx_buffs + i*PKT_BUF_SZ) | 0x80000000;
675 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
676 }
677 /* The Tx buffer address is filled in as needed, but we do need to clear
678 the upper ownership bit. */
679 for (i = 0; i < TX_RING_SIZE; i++) {
680 lp->tx_ring[i].base = 0;
681 }
682
683 lp->init_block.mode = 0x0000;
684 for (i = 0; i < 6; i++)
685 lp->init_block.phys_addr[i] = dev->dev_addr[i];
686 lp->init_block.filter[0] = 0x00000000;
687 lp->init_block.filter[1] = 0x00000000;
688 lp->init_block.rx_ring = (int)lp->rx_ring | RX_RING_LEN_BITS;
689 lp->init_block.tx_ring = (int)lp->tx_ring | TX_RING_LEN_BITS;
690 }
691
692 static void
693 lance_restart(struct device *dev, unsigned int csr0_bits, int must_reinit)
/* */
694 {
695 struct lance_private *lp = (struct lance_private *)dev->priv;
696
697 if (must_reinit ||
698 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
699 lance_purge_tx_ring(dev);
700 lance_init_ring(dev);
701 }
702 outw(0x0000, dev->base_addr + LANCE_ADDR);
703 outw(csr0_bits, dev->base_addr + LANCE_DATA);
704 }
705
706 static int
707 lance_start_xmit(struct sk_buff *skb, struct device *dev)
/* */
708 {
709 struct lance_private *lp = (struct lance_private *)dev->priv;
710 int ioaddr = dev->base_addr;
711 int entry;
712 unsigned long flags;
713
714 /* Transmitter timeout, serious problems. */
715 if (dev->tbusy) {
716 int tickssofar = jiffies - dev->trans_start;
717 if (tickssofar < 20)
718 return 1;
719 outw(0, ioaddr+LANCE_ADDR);
720 printk("%s: transmit timed out, status %4.4x, resetting.\n",
721 dev->name, inw(ioaddr+LANCE_DATA));
722 outw(0x0004, ioaddr+LANCE_DATA);
723 lp->stats.tx_errors++;
724 #ifndef final_version
725 {
726 int i;
727 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
728 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
729 lp->cur_rx);
730 for (i = 0 ; i < RX_RING_SIZE; i++)
731 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
732 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
733 lp->rx_ring[i].msg_length);
734 for (i = 0 ; i < TX_RING_SIZE; i++)
735 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
736 lp->tx_ring[i].base, -lp->tx_ring[i].length,
737 lp->tx_ring[i].misc);
738 printk("\n");
739 }
740 #endif
741 lance_restart(dev, 0x0043, 1);
742
743 dev->tbusy=0;
744 dev->trans_start = jiffies;
745
746 return 0;
747 }
748
749 if (skb == NULL) {
750 dev_tint(dev);
751 return 0;
752 }
753
754 if (skb->len <= 0)
755 return 0;
756
757 if (lance_debug > 3) {
758 outw(0x0000, ioaddr+LANCE_ADDR);
759 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
760 inw(ioaddr+LANCE_DATA));
761 outw(0x0000, ioaddr+LANCE_DATA);
762 }
763
764 /* Block a timer-based transmit from overlapping. This could better be
765 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
766 if (set_bit(0, (void*)&dev->tbusy) != 0) {
767 printk("%s: Transmitter access conflict.\n", dev->name);
768 return 1;
769 }
770
771 if (set_bit(0, (void*)&lp->lock) != 0) {
772 if (lance_debug > 0)
773 printk("%s: tx queue lock!.\n", dev->name);
774 /* don't clear dev->tbusy flag. */
775 return 1;
776 }
777
778 /* Fill in a Tx ring entry */
779
780 /* Mask to ring buffer boundary. */
781 entry = lp->cur_tx & TX_RING_MOD_MASK;
782
783 /* Caution: the write order is important here, set the base address
784 with the "ownership" bits last. */
785
786 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
787 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
788 lp->tx_ring[entry].length =
789 -(ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN);
790 } else
791 lp->tx_ring[entry].length = -skb->len;
792
793 lp->tx_ring[entry].misc = 0x0000;
794
795 /* If any part of this buffer is >16M we must copy it to a low-memory
796 buffer. */
797 if ((int)(skb->data) + skb->len > 0x01000000) {
798 if (lance_debug > 5)
799 printk("%s: bouncing a high-memory packet (%#x).\n",
800 dev->name, (int)(skb->data));
801 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
802 lp->tx_ring[entry].base =
803 (int)(lp->tx_bounce_buffs + entry) | 0x83000000;
804 dev_kfree_skb (skb, FREE_WRITE);
805 } else {
806 lp->tx_skbuff[entry] = skb;
807 lp->tx_ring[entry].base = (int)(skb->data) | 0x83000000;
808 }
809 lp->cur_tx++;
810
811 /* Trigger an immediate send poll. */
812 outw(0x0000, ioaddr+LANCE_ADDR);
813 outw(0x0048, ioaddr+LANCE_DATA);
814
815 dev->trans_start = jiffies;
816
817 save_flags(flags);
818 cli();
819 lp->lock = 0;
820 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
821 dev->tbusy=0;
822 else
823 lp->tx_full = 1;
824 restore_flags(flags);
825
826 return 0;
827 }
828
829 /* The LANCE interrupt handler. */
830 static void
831 lance_interrupt(int irq, struct pt_regs * regs)
/* */
832 {
833 struct device *dev = (struct device *)(irq2dev_map[irq]);
834 struct lance_private *lp;
835 int csr0, ioaddr, boguscnt=10;
836 int must_restart;
837
838 if (dev == NULL) {
839 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
840 return;
841 }
842
843 ioaddr = dev->base_addr;
844 lp = (struct lance_private *)dev->priv;
845 if (dev->interrupt)
846 printk("%s: Re-entering the interrupt handler.\n", dev->name);
847
848 dev->interrupt = 1;
849
850 outw(0x00, dev->base_addr + LANCE_ADDR);
851 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
852 && --boguscnt >= 0) {
853 /* Acknowledge all of the current interrupt sources ASAP. */
854 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
855
856 must_restart = 0;
857
858 if (lance_debug > 5)
859 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
860 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
861
862 if (csr0 & 0x0400) /* Rx interrupt */
863 lance_rx(dev);
864
865 if (csr0 & 0x0200) { /* Tx-done interrupt */
866 int dirty_tx = lp->dirty_tx;
867
868 while (dirty_tx < lp->cur_tx) {
869 int entry = dirty_tx & TX_RING_MOD_MASK;
870 int status = lp->tx_ring[entry].base;
871
872 if (status < 0)
873 break; /* It still hasn't been Txed */
874
875 lp->tx_ring[entry].base = 0;
876
877 if (status & 0x40000000) {
878 /* There was an major error, log it. */
879 int err_status = lp->tx_ring[entry].misc;
880 lp->stats.tx_errors++;
881 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
882 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
883 if (err_status & 0x1000) lp->stats.tx_window_errors++;
884 if (err_status & 0x4000) {
885 /* Ackk! On FIFO errors the Tx unit is turned off! */
886 lp->stats.tx_fifo_errors++;
887 /* Remove this verbosity later! */
888 printk("%s: Tx FIFO error! Status %4.4x.\n",
889 dev->name, csr0);
890 /* Restart the chip. */
891 must_restart = 1;
892 }
893 } else {
894 if (status & 0x18000000)
895 lp->stats.collisions++;
896 lp->stats.tx_packets++;
897 }
898
899 /* We must free the original skb if it's not a data-only copy
900 in the bounce buffer. */
901 if (lp->tx_skbuff[entry]) {
902 dev_kfree_skb(lp->tx_skbuff[entry],FREE_WRITE);
903 lp->tx_skbuff[entry] = 0;
904 }
905 dirty_tx++;
906 }
907
908 #ifndef final_version
909 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
910 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
911 dirty_tx, lp->cur_tx, lp->tx_full);
912 dirty_tx += TX_RING_SIZE;
913 }
914 #endif
915
916 if (lp->tx_full && dev->tbusy
917 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
918 /* The ring is no longer full, clear tbusy. */
919 lp->tx_full = 0;
920 dev->tbusy = 0;
921 mark_bh(NET_BH);
922 }
923
924 lp->dirty_tx = dirty_tx;
925 }
926
927 /* Log misc errors. */
928 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
929 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
930 if (csr0 & 0x0800) {
931 printk("%s: Bus master arbitration failure, status %4.4x.\n",
932 dev->name, csr0);
933 /* Restart the chip. */
934 must_restart = 1;
935 }
936
937 if (must_restart) {
938 /* stop the chip to clear the error condition, then restart */
939 outw(0x0000, dev->base_addr + LANCE_ADDR);
940 outw(0x0004, dev->base_addr + LANCE_DATA);
941 lance_restart(dev, 0x0002, 0);
942 }
943 }
944
945 /* Clear any other interrupt, and set interrupt enable. */
946 outw(0x0000, dev->base_addr + LANCE_ADDR);
947 outw(0x7940, dev->base_addr + LANCE_DATA);
948
949 if (lance_debug > 4)
950 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
951 dev->name, inw(ioaddr + LANCE_ADDR),
952 inw(dev->base_addr + LANCE_DATA));
953
954 dev->interrupt = 0;
955 return;
956 }
957
958 static int
959 lance_rx(struct device *dev)
/* */
960 {
961 struct lance_private *lp = (struct lance_private *)dev->priv;
962 int entry = lp->cur_rx & RX_RING_MOD_MASK;
963 int i;
964
965 /* If we own the next entry, it's a new packet. Send it up. */
966 while (lp->rx_ring[entry].base >= 0) {
967 int status = lp->rx_ring[entry].base >> 24;
968
969 if (status != 0x03) { /* There was an error. */
970 /* There is a tricky error noted by John Murphy,
971 <murf@perftech.com> to Russ Nelson: Even with full-sized
972 buffers it's possible for a jabber packet to use two
973 buffers, with only the last correctly noting the error. */
974 if (status & 0x01) /* Only count a general error at the */
975 lp->stats.rx_errors++; /* end of a packet.*/
976 if (status & 0x20) lp->stats.rx_frame_errors++;
977 if (status & 0x10) lp->stats.rx_over_errors++;
978 if (status & 0x08) lp->stats.rx_crc_errors++;
979 if (status & 0x04) lp->stats.rx_fifo_errors++;
980 lp->rx_ring[entry].base &= 0x03ffffff;
981 } else {
982 /* Malloc up new buffer, compatible with net-2e. */
983 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
984 struct sk_buff *skb;
985
986 skb = dev_alloc_skb(pkt_len+2);
987 if (skb == NULL) {
988 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
989 for (i=0; i < RX_RING_SIZE; i++)
990 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
991 break;
992
993 if (i > RX_RING_SIZE -2) {
994 lp->stats.rx_dropped++;
995 lp->rx_ring[entry].base |= 0x80000000;
996 lp->cur_rx++;
997 }
998 break;
999 }
1000 skb->dev = dev;
1001 skb_reserve(skb,2); /* 16 byte align */
1002 skb_put(skb,pkt_len); /* Make room */
1003 eth_copy_and_sum(skb,
1004 (unsigned char *)(lp->rx_ring[entry].base & 0x00ffffff),
1005 pkt_len,0);
1006 skb->protocol=eth_type_trans(skb,dev);
1007 netif_rx(skb);
1008 lp->stats.rx_packets++;
1009 }
1010
1011 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1012 of QNX reports that some revs of the 79C965 clear it. */
1013 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1014 lp->rx_ring[entry].base |= 0x80000000;
1015 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1016 }
1017
1018 /* We should check that at least two ring entries are free. If not,
1019 we should free one and mark stats->rx_dropped++. */
1020
1021 return 0;
1022 }
1023
1024 static int
1025 lance_close(struct device *dev)
/* */
1026 {
1027 int ioaddr = dev->base_addr;
1028 struct lance_private *lp = (struct lance_private *)dev->priv;
1029
1030 dev->start = 0;
1031 dev->tbusy = 1;
1032
1033 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1034 outw(112, ioaddr+LANCE_ADDR);
1035 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1036 }
1037 outw(0, ioaddr+LANCE_ADDR);
1038
1039 if (lance_debug > 1)
1040 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1041 dev->name, inw(ioaddr+LANCE_DATA));
1042
1043 /* We stop the LANCE here -- it occasionally polls
1044 memory if we don't. */
1045 outw(0x0004, ioaddr+LANCE_DATA);
1046
1047 if (dev->dma != 4)
1048 disable_dma(dev->dma);
1049
1050 free_irq(dev->irq);
1051
1052 irq2dev_map[dev->irq] = 0;
1053
1054 return 0;
1055 }
1056
1057 static struct enet_statistics *
1058 lance_get_stats(struct device *dev)
/* */
1059 {
1060 struct lance_private *lp = (struct lance_private *)dev->priv;
1061 short ioaddr = dev->base_addr;
1062 short saved_addr;
1063 unsigned long flags;
1064
1065 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1066 save_flags(flags);
1067 cli();
1068 saved_addr = inw(ioaddr+LANCE_ADDR);
1069 outw(112, ioaddr+LANCE_ADDR);
1070 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1071 outw(saved_addr, ioaddr+LANCE_ADDR);
1072 restore_flags(flags);
1073 }
1074
1075 return &lp->stats;
1076 }
1077
1078 /* Set or clear the multicast filter for this adaptor.
1079 num_addrs == -2 All multicasts
1080 num_addrs == -1 Promiscuous mode, receive all packets
1081 num_addrs == 0 Normal mode, clear multicast list
1082 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1083 best-effort filtering.
1084 */
1085 static void
1086 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
/* ![[last]](../icons/n_last.png)
*/
1087 {
1088 short ioaddr = dev->base_addr;
1089
1090 outw(0, ioaddr+LANCE_ADDR);
1091 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1092
1093 if (num_addrs >= 0 || num_addrs==-2) {
1094 short multicast_table[4];
1095 int i;
1096 /* We don't use the multicast table, but rely on upper-layer filtering. */
1097 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1098 for (i = 0; i < 4; i++) {
1099 outw(8 + i, ioaddr+LANCE_ADDR);
1100 outw(multicast_table[i], ioaddr+LANCE_DATA);
1101 }
1102 outw(15, ioaddr+LANCE_ADDR);
1103 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1104 } else {
1105 /* Log any net taps. */
1106 printk("%s: Promiscuous mode enabled.\n", dev->name);
1107 outw(15, ioaddr+LANCE_ADDR);
1108 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1109 }
1110
1111 lance_restart(dev, 0x0142, 0); /* Resume normal operation */
1112
1113 }
1114
1115
1116 /*
1117 * Local variables:
1118 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c lance.c"
1119 * c-indent-level: 4
1120 * tab-width: 4
1121 * End:
1122 */
![[bottom]](../icons/n_bottom.png){kind=icon}
*/