1 #ifndef _SPARC_MEMREG_H 2 #define _SPARC_MEMREG_H 3 /* memreg.h: Definitions of the values found in the synchronous 4 * and asynchronous memory error registers when a fault 5 * occurs on the sun4c. 6 * 7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 8 */ 9 10 /* First the synchronous error codes, these are usually just 11 * normal page faults. 12 */ 13 14 #define SUN4C_SYNC_WDRESET 0x1 /* watchdog reset, only the prom sees this */ 15 #define SUN4C_SYNC_SIZE 0x2 /* bad access size? whuz this? */ 16 #define SUN4C_SYNC_PARITY 0x8 /* bad ram chips caused a parity error */ 17 #define SUN4C_SYNC_SBUS 0x10 /* the SBUS had some problems... */ 18 #define SUN4C_SYNC_NOMEM 0x20 /* translation pointed to non-existant ram */ 19 #define SUN4C_SYNC_PROT 0x40 /* access violated pte protection settings */ 20 #define SUN4C_SYNC_NPRESENT 0x80 /* pte said that page was not present */ 21 #define SUN4C_SYNC_BADWRITE 0x8000 /* while writing something went bogus */ 22 23 /* Now the asynchronous error codes, these are almost always produced 24 * by the cache writing things back to memory and getting a bad translation. 25 * Bad DVMA transactions can cause these faults too. 26 */ 27 28 #define SUN4C_ASYNC_BADDVMA 0x10 /* error during DVMA access */ 29 #define SUN4C_ASYNC_NOMEM 0x20 /* write back pointed to bad phys addr */ 30 #define SUN4C_ASYNC_BADWB 0x80 /* write back points to non-present page */ 31 32 /* These are the values passed as the first arguement to the fault 33 * entry c-code from the assembly entry points. 34 */ 35 #define FAULT_ASYNC 0x0 36 #define FAULT_SYNC 0x1 37 38 #endif /* !(_SPARC_MEMREG_H) */