This source file includes following definitions.
- depca_probe
- depca_hw_init
- depca_open
- depca_init_ring
- depca_start_xmit
- depca_interrupt
- depca_rx
- depca_tx
- depca_close
- LoadCSRs
- InitRestartDepca
- depca_get_stats
- set_multicast_list
- SetMulticastFilter
- isa_probe
- eisa_probe
- alloc_device
- DepcaSignature
- DevicePresent
- get_hw_addr
- load_packet
- EISA_signature
- depca_ioctl
- init_module
- cleanup_module
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189 static const char *version = "depca.c:v0.41 5/26/95 davies@wanton.lkg.dec.com\n";
190
191 #include <linux/module.h>
192
193 #include <linux/types.h>
194 #include <linux/kernel.h>
195 #include <linux/sched.h>
196 #include <linux/string.h>
197 #include <linux/ptrace.h>
198 #include <linux/errno.h>
199 #include <linux/ioport.h>
200 #include <linux/malloc.h>
201 #include <linux/interrupt.h>
202 #include <asm/segment.h>
203 #include <asm/bitops.h>
204 #include <asm/io.h>
205 #include <asm/dma.h>
206
207 #include <linux/netdevice.h>
208 #include <linux/etherdevice.h>
209 #include <linux/skbuff.h>
210
211 #include "depca.h"
212
213 #ifdef DEPCA_DEBUG
214 static int depca_debug = DEPCA_DEBUG;
215 #else
216 static int depca_debug = 1;
217 #endif
218
219 #define DEPCA_NDA 0xffe0
220
221
222
223
224 #define PROBE_LENGTH 32
225 #define ETH_PROM_SIG 0xAA5500FFUL
226
227
228
229
230
231
232
233
234 #define NUM_RX_DESC 8
235 #define NUM_TX_DESC 8
236 #define RX_BUFF_SZ 1536
237 #define TX_BUFF_SZ 1536
238
239 #define CRC_POLYNOMIAL_BE 0x04c11db7UL
240 #define CRC_POLYNOMIAL_LE 0xedb88320UL
241
242
243
244
245 #define DEPCA_EISA_IO_PORTS 0x0c00
246 #define MAX_EISA_SLOTS 16
247 #define EISA_SLOT_INC 0x1000
248
249
250
251
252 #define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
253 #define DEPCA_IO_PORTS {0x300, 0x200, 0}
254 #define DEPCA_TOTAL_SIZE 0x10
255 static short mem_chkd = 0;
256
257
258
259
260 #define DEPCA_SIGNATURE {"DEPCA",\
261 "DE100","DE101",\
262 "DE200","DE201","DE202",\
263 "DE210",\
264 "DE422",\
265 ""}
266 static enum {DEPCA, de100, de101, de200, de201, de202, de210, de422, unknown} adapter;
267
268
269
270
271 #define DEPCA_STRLEN 16
272 #define MAX_NUM_DEPCAS 2
273
274
275
276
277
278
279
280 #define ALIGN4 ((u_long)4 - 1)
281 #define ALIGN8 ((u_long)8 - 1)
282 #define ALIGN ALIGN8
283
284
285
286
287 struct depca_rx_desc {
288 volatile s32 base;
289 s16 buf_length;
290 s16 msg_length;
291 };
292
293 struct depca_tx_desc {
294 volatile s32 base;
295 s16 length;
296 s16 misc;
297 };
298
299 #define LA_MASK 0x0000ffff
300
301
302
303
304
305 struct depca_init {
306 u16 mode;
307 u8 phys_addr[ETH_ALEN];
308 u8 mcast_table[8];
309 u32 rx_ring;
310 u32 tx_ring;
311 };
312
313 #define DEPCA_PKT_STAT_SZ 16
314 #define DEPCA_PKT_BIN_SZ 128
315
316 struct depca_private {
317 char devname[DEPCA_STRLEN];
318 char adapter_name[DEPCA_STRLEN];
319 char adapter;
320 struct depca_rx_desc *rx_ring;
321 struct depca_tx_desc *tx_ring;
322 struct depca_init init_block;
323 char *rx_memcpy[NUM_RX_DESC];
324 char *tx_memcpy[NUM_TX_DESC];
325 u_long bus_offset;
326 u_long sh_mem;
327 u_long dma_buffs;
328 int rx_new, tx_new;
329 int rx_old, tx_old;
330 struct enet_statistics stats;
331 struct {
332 u32 bins[DEPCA_PKT_STAT_SZ];
333 u32 unicast;
334 u32 multicast;
335 u32 broadcast;
336 u32 excessive_collisions;
337 u32 tx_underruns;
338 u32 excessive_underruns;
339 } pktStats;
340 int txRingMask;
341 int rxRingMask;
342 s32 rx_rlen;
343 s32 tx_rlen;
344 };
345
346
347
348
349
350
351
352
353 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
354 lp->tx_old+lp->txRingMask-lp->tx_new:\
355 lp->tx_old -lp->tx_new-1)
356
357
358
359
360 static int depca_open(struct device *dev);
361 static int depca_start_xmit(struct sk_buff *skb, struct device *dev);
362 static void depca_interrupt(int irq, struct pt_regs * regs);
363 static int depca_close(struct device *dev);
364 static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd);
365 static struct enet_statistics *depca_get_stats(struct device *dev);
366 static void set_multicast_list(struct device *dev,int num_addrs,void *addrs);
367
368
369
370
371 static int depca_hw_init(struct device *dev, u_long ioaddr);
372 static void depca_init_ring(struct device *dev);
373 static int depca_rx(struct device *dev);
374 static int depca_tx(struct device *dev);
375
376 static void LoadCSRs(struct device *dev);
377 static int InitRestartDepca(struct device *dev);
378 static void DepcaSignature(char *name, u_long paddr);
379 static int DevicePresent(u_long ioaddr);
380 static int get_hw_addr(struct device *dev);
381 static int EISA_signature(char *name, s32 eisa_id);
382 static void SetMulticastFilter(struct device *dev,int num_addrs,char *addrs);
383 static void isa_probe(struct device *dev, u_long iobase);
384 static void eisa_probe(struct device *dev, u_long iobase);
385 static struct device *alloc_device(struct device *dev, u_long iobase);
386 static int load_packet(struct device *dev, struct sk_buff *skb);
387
388 #ifdef MODULE
389 int init_module(void);
390 void cleanup_module(void);
391 static int autoprobed = 1, loading_module = 1;
392 # else
393 static u_char de1xx_irq[] = {2,3,4,5,7,0};
394 static u_char de2xx_irq[] = {5,9,10,11,15,0};
395 static u_char de422_irq[] = {5,9,10,11,0};
396 static u_char *depca_irq;
397 static int autoprobed = 0, loading_module = 0;
398 #endif
399
400 static char name[DEPCA_STRLEN];
401 static int num_depcas = 0, num_eth = 0;
402
403
404
405
406 #define STOP_DEPCA \
407 outw(CSR0, DEPCA_ADDR);\
408 outw(STOP, DEPCA_DATA)
409
410
411
412 int depca_probe(struct device *dev)
413 {
414 int tmp = num_depcas, status = -ENODEV;
415 u_long iobase = dev->base_addr;
416
417 if ((iobase == 0) && loading_module){
418 printk("Autoprobing is not supported when loading a module based driver.\n");
419 status = -EIO;
420 } else {
421 isa_probe(dev, iobase);
422 eisa_probe(dev, iobase);
423
424 if ((tmp == num_depcas) && (iobase != 0) && loading_module) {
425 printk("%s: depca_probe() cannot find device at 0x%04lx.\n", dev->name,
426 iobase);
427 }
428
429
430
431
432
433 for (; (dev->priv == NULL) && (dev->next != NULL); dev = dev->next);
434
435 if (dev->priv) status = 0;
436 if (iobase == 0) autoprobed = 1;
437 }
438
439 return status;
440 }
441
442 static int
443 depca_hw_init(struct device *dev, u_long ioaddr)
444 {
445 struct depca_private *lp;
446 int i, j, offset, netRAM, mem_len, status=0;
447 s16 nicsr;
448 u_long mem_start=0, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
449
450 STOP_DEPCA;
451
452 nicsr = inb(DEPCA_NICSR);
453 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
454 outb(nicsr, DEPCA_NICSR);
455
456 if (inw(DEPCA_DATA) == STOP) {
457 for (; mem_base[mem_chkd]; mem_chkd++) {
458 mem_start = mem_base[mem_chkd];
459 DepcaSignature(name, mem_start);
460 if (*name != '\0') break;
461 }
462
463 if ((*name != '\0') && mem_start) {
464 dev->base_addr = ioaddr;
465
466 if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {
467 printk("%s: %s at 0x%04lx (EISA slot %d)",
468 dev->name, name, ioaddr, (int)((ioaddr>>12)&0x0f));
469 } else {
470 printk("%s: %s at 0x%04lx", dev->name, name, ioaddr);
471 }
472
473 printk(", h/w address ");
474 status = get_hw_addr(dev);
475 for (i=0; i<ETH_ALEN - 1; i++) {
476 printk("%2.2x:", dev->dev_addr[i]);
477 }
478 printk("%2.2x", dev->dev_addr[i]);
479
480 if (status == 0) {
481
482 netRAM = ((adapter != DEPCA) ? 64 : 48);
483 if ((nicsr & _128KB) && (adapter == de422)) netRAM = 128;
484 offset = 0x0000;
485
486
487 if (nicsr & BUF) {
488 offset = 0x8000;
489 nicsr &= ~BS;
490 netRAM -= 32;
491 }
492 mem_start += offset;
493 if ((mem_len = (NUM_RX_DESC*(sizeof(struct depca_rx_desc)+RX_BUFF_SZ) +
494 NUM_TX_DESC*(sizeof(struct depca_tx_desc)+TX_BUFF_SZ) +
495 sizeof(struct depca_init))) <=
496 (netRAM<<10)) {
497 printk(",\n has %dkB RAM at 0x%.5lx", netRAM, mem_start);
498
499
500 if (adapter != DEPCA) {
501 nicsr |= SHE;
502 outb(nicsr, DEPCA_NICSR);
503 }
504
505
506 dev->priv = (void *) kmalloc(sizeof(struct depca_private), GFP_KERNEL);
507 if (dev->priv == NULL)
508 return -ENOMEM;
509 lp = (struct depca_private *)dev->priv;
510 memset((char *)dev->priv, 0, sizeof(struct depca_private));
511 lp->adapter = adapter;
512 sprintf(lp->adapter_name,"%s (%s)", name, dev->name);
513 request_region(ioaddr, DEPCA_TOTAL_SIZE, lp->adapter_name);
514
515
516 lp->sh_mem = mem_start;
517 mem_start += sizeof(struct depca_init);
518
519
520 mem_start = (mem_start + ALIGN) & ~ALIGN;
521 lp->rx_ring = (struct depca_rx_desc *)mem_start;
522
523 mem_start += (sizeof(struct depca_rx_desc) * NUM_RX_DESC);
524 lp->tx_ring = (struct depca_tx_desc *)mem_start;
525
526 mem_start += (sizeof(struct depca_tx_desc) * NUM_TX_DESC);
527 lp->bus_offset = mem_start & 0x00ff0000;
528 mem_start &= LA_MASK;
529
530 lp->dma_buffs = mem_start;
531
532
533 lp->rxRingMask = NUM_RX_DESC - 1;
534 lp->txRingMask = NUM_TX_DESC - 1;
535
536
537 for (i=0, j = lp->rxRingMask; j>0; i++) {
538 j >>= 1;
539 }
540 lp->rx_rlen = (s32)(i << 29);
541 for (i=0, j = lp->txRingMask; j>0; i++) {
542 j >>= 1;
543 }
544 lp->tx_rlen = (s32)(i << 29);
545
546
547 depca_init_ring(dev);
548
549
550 LoadCSRs(dev);
551
552
553 nicsr = ((nicsr & ~IM)|IEN);
554 outb(nicsr, DEPCA_NICSR);
555
556
557
558 if (dev->irq < 2) {
559 #ifndef MODULE
560 unsigned char irqnum;
561 autoirq_setup(0);
562
563
564 switch (lp->adapter) {
565 case DEPCA:
566 case de100:
567 case de101:
568 depca_irq = de1xx_irq;
569 break;
570 case de200:
571 case de201:
572 case de202:
573 case de210:
574 depca_irq = de2xx_irq;
575 break;
576 case de422:
577 depca_irq = de422_irq;
578 break;
579 }
580
581
582 outw(INEA | INIT, DEPCA_DATA);
583
584 irqnum = autoirq_report(1);
585 if (!irqnum) {
586 printk(" and failed to detect IRQ line.\n");
587 status = -ENXIO;
588 } else {
589 for (dev->irq=0,i=0; (depca_irq[i]) && (!dev->irq); i++) {
590 if (irqnum == depca_irq[i]) {
591 dev->irq = irqnum;
592 printk(" and uses IRQ%d.\n", dev->irq);
593 }
594 }
595
596 if (!dev->irq) {
597 printk(" but incorrect IRQ line detected.\n");
598 status = -ENXIO;
599 }
600 }
601 #endif
602 } else {
603 printk(" and assigned IRQ%d.\n", dev->irq);
604 }
605 if (status) release_region(ioaddr, DEPCA_TOTAL_SIZE);
606 } else {
607 printk(",\n requests %dkB RAM: only %dkB is available!\n",
608 (mem_len>>10), netRAM);
609 status = -ENXIO;
610 }
611 } else {
612 printk(" which has an Ethernet PROM CRC error.\n");
613 status = -ENXIO;
614 }
615 }
616 if (!status) {
617 if (depca_debug > 0) {
618 printk(version);
619 }
620
621
622 dev->open = &depca_open;
623 dev->hard_start_xmit = &depca_start_xmit;
624 dev->stop = &depca_close;
625 dev->get_stats = &depca_get_stats;
626 dev->set_multicast_list = &set_multicast_list;
627 dev->do_ioctl = &depca_ioctl;
628
629 dev->mem_start = 0;
630
631
632 ether_setup(dev);
633 } else {
634 if (dev->priv) {
635 kfree_s(dev->priv, sizeof(struct depca_private));
636 dev->priv = NULL;
637 }
638 }
639 } else {
640 status = -ENXIO;
641 }
642
643 return status;
644 }
645
646
647 static int
648 depca_open(struct device *dev)
649 {
650 struct depca_private *lp = (struct depca_private *)dev->priv;
651 s16 nicsr;
652 u_long ioaddr = dev->base_addr;
653 int i, status = 0;
654 struct depca_init *p = (struct depca_init *)lp->sh_mem;
655
656 if (request_irq(dev->irq, &depca_interrupt, 0, lp->adapter_name)) {
657 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
658 status = -EAGAIN;
659 }
660
661 irq2dev_map[dev->irq] = dev;
662 STOP_DEPCA;
663 nicsr = inb(DEPCA_NICSR);
664
665
666 if (adapter != DEPCA) {
667 nicsr |= SHE;
668 outb(nicsr, DEPCA_NICSR);
669 }
670
671
672 depca_init_ring(dev);
673 LoadCSRs(dev);
674
675 if (depca_debug > 1){
676
677 memcpy_toio((char *)lp->sh_mem, &lp->init_block, sizeof(struct depca_init));
678
679 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
680 printk("Descriptor head addresses:\n");
681 printk("\t0x%lx 0x%lx\n",(u_long)lp->rx_ring, (u_long)lp->tx_ring);
682 printk("Descriptor addresses:\nRX: ");
683 for (i=0;i<lp->rxRingMask;i++){
684 if (i < 3) {
685 printk("0x%8.8lx ", (long) &lp->rx_ring[i].base);
686 }
687 }
688 printk("...0x%8.8lx\n", (long) &lp->rx_ring[i].base);
689 printk("TX: ");
690 for (i=0;i<lp->txRingMask;i++){
691 if (i < 3) {
692 printk("0x%8.8lx ", (long) &lp->tx_ring[i].base);
693 }
694 }
695 printk("...0x%8.8lx\n", (long) &lp->tx_ring[i].base);
696 printk("\nDescriptor buffers:\nRX: ");
697 for (i=0;i<lp->rxRingMask;i++){
698 if (i < 3) {
699 printk("0x%8.8x ", readl(&lp->rx_ring[i].base));
700 }
701 }
702 printk("...0x%8.8x\n", readl(&lp->rx_ring[i].base));
703 printk("TX: ");
704 for (i=0;i<lp->txRingMask;i++){
705 if (i < 3) {
706 printk("0x%8.8x ", readl(&lp->tx_ring[i].base));
707 }
708 }
709 printk("...0x%8.8x\n", readl(&lp->tx_ring[i].base));
710 printk("Status: %d\n", status);
711 printk("Initialisation block at 0x%8.8lx\n",lp->sh_mem);
712 printk("\tmode: 0x%4.4x\n",readw(&p->mode));
713 printk("\tphysical address: ");
714 for (i=0;i<ETH_ALEN-1;i++){
715 printk("%2.2x:",(u_char)readb(&p->phys_addr[i]));
716 }
717 printk("%2.2x\n",(u_char)readb(&p->phys_addr[i]));
718 printk("\tmulticast hash table: ");
719 for (i=0;i<(HASH_TABLE_LEN >> 3)-1;i++){
720 printk("%2.2x:",(u_char)readb(&p->mcast_table[i]));
721 }
722 printk("%2.2x\n",(u_char)readb(&p->mcast_table[i]));
723 printk("\trx_ring at: 0x%8.8x\n",readl(&p->rx_ring));
724 printk("\ttx_ring at: 0x%8.8x\n",readl(&p->tx_ring));
725 printk("dma_buffs: 0x%8.8lx\n",lp->dma_buffs);
726 printk("Ring size:\nRX: %d Log2(rxRingMask): 0x%8.8x\n",
727 (int)lp->rxRingMask + 1,
728 lp->rx_rlen);
729 printk("TX: %d Log2(txRingMask): 0x%8.8x\n",
730 (int)lp->txRingMask + 1,
731 lp->tx_rlen);
732 outw(CSR2,DEPCA_ADDR);
733 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
734 outw(CSR1,DEPCA_ADDR);
735 printk("%4.4x\n",inw(DEPCA_DATA));
736 outw(CSR3,DEPCA_ADDR);
737 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
738 }
739
740
741 nicsr = ((nicsr & ~IM & ~LED)|IEN);
742 outb(nicsr, DEPCA_NICSR);
743 outw(CSR0,DEPCA_ADDR);
744
745 dev->tbusy = 0;
746 dev->interrupt = 0;
747 dev->start = 1;
748
749 status = InitRestartDepca(dev);
750
751 if (depca_debug > 1){
752 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
753 printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
754 }
755
756 MOD_INC_USE_COUNT;
757
758 return status;
759 }
760
761
762 static void
763 depca_init_ring(struct device *dev)
764 {
765 struct depca_private *lp = (struct depca_private *)dev->priv;
766 u_int i;
767 u_long p;
768
769
770 set_bit(0, (void *)&dev->tbusy);
771
772 lp->rx_new = lp->tx_new = 0;
773 lp->rx_old = lp->tx_old = 0;
774
775
776 for (i = 0; i <= lp->rxRingMask; i++) {
777 writel((p=lp->dma_buffs+i*RX_BUFF_SZ) | R_OWN, &lp->rx_ring[i].base);
778 writew(-RX_BUFF_SZ, &lp->rx_ring[i].buf_length);
779 lp->rx_memcpy[i]=(char *)(p+lp->bus_offset);
780 }
781 for (i = 0; i <= lp->txRingMask; i++) {
782 writel((p=lp->dma_buffs+(i+lp->txRingMask+1)*TX_BUFF_SZ) & 0x00ffffff,
783 &lp->tx_ring[i].base);
784 lp->tx_memcpy[i]=(char *)(p+lp->bus_offset);
785 }
786
787
788 lp->init_block.rx_ring = ((u32)((u_long)lp->rx_ring)&LA_MASK) | lp->rx_rlen;
789 lp->init_block.tx_ring = ((u32)((u_long)lp->tx_ring)&LA_MASK) | lp->tx_rlen;
790
791 SetMulticastFilter(dev, 0, NULL);
792
793 for (i = 0; i < ETH_ALEN; i++) {
794 lp->init_block.phys_addr[i] = dev->dev_addr[i];
795 }
796
797 lp->init_block.mode = 0x0000;
798
799 return;
800 }
801
802
803
804
805 static int
806 depca_start_xmit(struct sk_buff *skb, struct device *dev)
807 {
808 struct depca_private *lp = (struct depca_private *)dev->priv;
809 u_long ioaddr = dev->base_addr;
810 int status = 0;
811
812
813 if (dev->tbusy) {
814 int tickssofar = jiffies - dev->trans_start;
815 if (tickssofar < 1*HZ) {
816 status = -1;
817 } else {
818 printk("%s: transmit timed out, status %04x, resetting.\n",
819 dev->name, inw(DEPCA_DATA));
820
821 STOP_DEPCA;
822 depca_init_ring(dev);
823 LoadCSRs(dev);
824 dev->interrupt = UNMASK_INTERRUPTS;
825 dev->start = 1;
826 dev->tbusy=0;
827 dev->trans_start = jiffies;
828 InitRestartDepca(dev);
829 }
830 return status;
831 } else if (skb == NULL) {
832 dev_tint(dev);
833 } else if (skb->len > 0) {
834
835 if (set_bit(0, (void*)&dev->tbusy) != 0) {
836 printk("%s: Transmitter access conflict.\n", dev->name);
837 status = -1;
838 } else {
839 if (TX_BUFFS_AVAIL) {
840 status = load_packet(dev, skb);
841
842 if (!status) {
843
844 outw(CSR0, DEPCA_ADDR);
845 outw(INEA | TDMD, DEPCA_DATA);
846
847 dev->trans_start = jiffies;
848 dev_kfree_skb(skb, FREE_WRITE);
849 }
850 if (TX_BUFFS_AVAIL) {
851 dev->tbusy=0;
852 }
853 } else {
854 status = -1;
855 }
856 }
857 }
858
859 return status;
860 }
861
862
863
864
865 static void
866 depca_interrupt(int irq, struct pt_regs * regs)
867 {
868 struct device *dev = (struct device *)(irq2dev_map[irq]);
869 struct depca_private *lp;
870 s16 csr0, nicsr;
871 u_long ioaddr;
872
873 if (dev == NULL) {
874 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
875 } else {
876 lp = (struct depca_private *)dev->priv;
877 ioaddr = dev->base_addr;
878
879 if (dev->interrupt)
880 printk("%s: Re-entering the interrupt handler.\n", dev->name);
881
882 dev->interrupt = MASK_INTERRUPTS;
883
884
885 nicsr = inb(DEPCA_NICSR);
886 nicsr |= (IM|LED);
887 outb(nicsr, DEPCA_NICSR);
888
889 outw(CSR0, DEPCA_ADDR);
890 csr0 = inw(DEPCA_DATA);
891
892
893 outw(csr0 & INTE, DEPCA_DATA);
894
895 if (csr0 & RINT)
896 depca_rx(dev);
897
898 if (csr0 & TINT)
899 depca_tx(dev);
900
901 if ((TX_BUFFS_AVAIL >= 0) && dev->tbusy) {
902 dev->tbusy = 0;
903 mark_bh(NET_BH);
904 }
905
906
907 nicsr = (nicsr & ~IM & ~LED);
908 outb(nicsr, DEPCA_NICSR);
909
910 dev->interrupt = UNMASK_INTERRUPTS;
911 }
912
913 return;
914 }
915
916 static int
917 depca_rx(struct device *dev)
918 {
919 struct depca_private *lp = (struct depca_private *)dev->priv;
920 int i, entry;
921 s32 status;
922
923 for (entry=lp->rx_new;
924 !(readl(&lp->rx_ring[entry].base) & R_OWN);
925 entry=lp->rx_new){
926 status = readl(&lp->rx_ring[entry].base) >> 16 ;
927 if (status & R_STP) {
928 lp->rx_old = entry;
929 }
930 if (status & R_ENP) {
931 if (status & R_ERR) {
932 lp->stats.rx_errors++;
933 if (status & R_FRAM) lp->stats.rx_frame_errors++;
934 if (status & R_OFLO) lp->stats.rx_over_errors++;
935 if (status & R_CRC) lp->stats.rx_crc_errors++;
936 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
937 } else {
938 short len, pkt_len = readw(&lp->rx_ring[entry].msg_length);
939 struct sk_buff *skb;
940
941 skb = dev_alloc_skb(pkt_len+2);
942 if (skb != NULL) {
943 unsigned char * buf;
944 skb_reserve(skb,2);
945 buf = skb_put(skb,pkt_len);
946 skb->dev = dev;
947 if (entry < lp->rx_old) {
948 len = (lp->rxRingMask - lp->rx_old + 1) * RX_BUFF_SZ;
949 memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], len);
950 memcpy_fromio(buf + len, lp->rx_memcpy[0], pkt_len-len);
951 } else {
952 memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], pkt_len);
953 }
954
955
956
957
958
959 skb->protocol=eth_type_trans(skb,dev);
960 netif_rx(skb);
961
962
963
964
965 lp->stats.rx_packets++;
966 for (i=1; i<DEPCA_PKT_STAT_SZ-1; i++) {
967 if (pkt_len < (i*DEPCA_PKT_BIN_SZ)) {
968 lp->pktStats.bins[i]++;
969 i = DEPCA_PKT_STAT_SZ;
970 }
971 }
972 if (buf[0] & 0x01) {
973 if ((*(s16 *)&buf[0] == -1) && (*(s32 *)&buf[2] == -1)) {
974 lp->pktStats.broadcast++;
975 } else {
976 lp->pktStats.multicast++;
977 }
978 } else if ((*(s16 *)&buf[0] == *(s16 *)&dev->dev_addr[0]) &&
979 (*(s32 *)&buf[2] == *(s32 *)&dev->dev_addr[2])) {
980 lp->pktStats.unicast++;
981 }
982
983 lp->pktStats.bins[0]++;
984 if (lp->pktStats.bins[0] == 0) {
985 memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats));
986 }
987 } else {
988 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
989 lp->stats.rx_dropped++;
990 break;
991 }
992 }
993
994 for (; lp->rx_old!=entry; lp->rx_old=(++lp->rx_old)&lp->rxRingMask) {
995 writel(readl(&lp->rx_ring[lp->rx_old].base) | R_OWN,
996 &lp->rx_ring[lp->rx_old].base);
997 }
998 writel(readl(&lp->rx_ring[entry].base) | R_OWN, &lp->rx_ring[entry].base);
999 }
1000
1001
1002
1003
1004 lp->rx_new = (++lp->rx_new) & lp->rxRingMask;
1005 }
1006
1007 return 0;
1008 }
1009
1010
1011
1012
1013 static int
1014 depca_tx(struct device *dev)
1015 {
1016 struct depca_private *lp = (struct depca_private *)dev->priv;
1017 int entry;
1018 s32 status;
1019 u_long ioaddr = dev->base_addr;
1020
1021 for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) {
1022 status = readl(&lp->tx_ring[entry].base) >> 16 ;
1023
1024 if (status < 0) {
1025 break;
1026 } else if (status & T_ERR) {
1027 status = readl(&lp->tx_ring[entry].misc);
1028 lp->stats.tx_errors++;
1029 if (status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1030 if (status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1031 if (status & TMD3_LCOL) lp->stats.tx_window_errors++;
1032 if (status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1033 if (status & (TMD3_BUFF | TMD3_UFLO)) {
1034
1035 outw(CSR0, DEPCA_ADDR);
1036 outw(INEA | TDMD, DEPCA_DATA);
1037 }
1038 } else if (status & (T_MORE | T_ONE)) {
1039 lp->stats.collisions++;
1040 } else {
1041 lp->stats.tx_packets++;
1042 }
1043
1044
1045 lp->tx_old = (++lp->tx_old) & lp->txRingMask;
1046 }
1047
1048 return 0;
1049 }
1050
1051 static int
1052 depca_close(struct device *dev)
1053 {
1054 struct depca_private *lp = (struct depca_private *)dev->priv;
1055 s16 nicsr;
1056 u_long ioaddr = dev->base_addr;
1057
1058 dev->start = 0;
1059 dev->tbusy = 1;
1060
1061 outw(CSR0, DEPCA_ADDR);
1062
1063 if (depca_debug > 1) {
1064 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1065 dev->name, inw(DEPCA_DATA));
1066 }
1067
1068
1069
1070
1071
1072 outw(STOP, DEPCA_DATA);
1073
1074
1075
1076
1077 if (lp->adapter != DEPCA) {
1078 nicsr = inb(DEPCA_NICSR);
1079 nicsr &= ~SHE;
1080 outb(nicsr, DEPCA_NICSR);
1081 }
1082
1083
1084
1085
1086 free_irq(dev->irq);
1087 irq2dev_map[dev->irq] = NULL;
1088
1089 MOD_DEC_USE_COUNT;
1090
1091 return 0;
1092 }
1093
1094 static void LoadCSRs(struct device *dev)
1095 {
1096 struct depca_private *lp = (struct depca_private *)dev->priv;
1097 u_long ioaddr = dev->base_addr;
1098
1099 outw(CSR1, DEPCA_ADDR);
1100 outw((u16)(lp->sh_mem & LA_MASK), DEPCA_DATA);
1101 outw(CSR2, DEPCA_ADDR);
1102 outw((u16)((lp->sh_mem & LA_MASK) >> 16), DEPCA_DATA);
1103 outw(CSR3, DEPCA_ADDR);
1104 outw(ACON, DEPCA_DATA);
1105
1106 outw(CSR0, DEPCA_ADDR);
1107
1108 return;
1109 }
1110
1111 static int InitRestartDepca(struct device *dev)
1112 {
1113 struct depca_private *lp = (struct depca_private *)dev->priv;
1114 u_long ioaddr = dev->base_addr;
1115 int i, status=0;
1116
1117
1118 memcpy_toio((char *)lp->sh_mem, &lp->init_block, sizeof(struct depca_init));
1119
1120 outw(CSR0, DEPCA_ADDR);
1121 outw(INIT, DEPCA_DATA);
1122
1123
1124 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1125
1126 if (i!=100) {
1127
1128 outw(IDON | INEA | STRT, DEPCA_DATA);
1129 if (depca_debug > 2) {
1130 printk("%s: DEPCA open after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1131 dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1132 }
1133 } else {
1134 printk("%s: DEPCA unopen after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1135 dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1136 status = -1;
1137 }
1138
1139 return status;
1140 }
1141
1142 static struct enet_statistics *
1143 depca_get_stats(struct device *dev)
1144 {
1145 struct depca_private *lp = (struct depca_private *)dev->priv;
1146
1147
1148
1149 return &lp->stats;
1150 }
1151
1152
1153
1154
1155
1156
1157
1158
1159 static void
1160 set_multicast_list(struct device *dev, int num_addrs, void *addrs)
1161 {
1162 struct depca_private *lp = (struct depca_private *)dev->priv;
1163 u_long ioaddr = dev->base_addr;
1164
1165 if (irq2dev_map[dev->irq] != NULL) {
1166 while(dev->tbusy);
1167 set_bit(0, (void*)&dev->tbusy);
1168 while(lp->tx_old != lp->tx_new);
1169
1170 STOP_DEPCA;
1171 depca_init_ring(dev);
1172
1173 if (num_addrs >= 0) {
1174 SetMulticastFilter(dev, num_addrs, (char *)addrs);
1175 lp->init_block.mode &= ~PROM;
1176 } else {
1177 lp->init_block.mode |= PROM;
1178 }
1179
1180 LoadCSRs(dev);
1181 InitRestartDepca(dev);
1182 dev->tbusy = 0;
1183 }
1184 }
1185
1186
1187
1188
1189
1190
1191
1192 static void SetMulticastFilter(struct device *dev, int num_addrs, char *addrs)
1193 {
1194 struct depca_private *lp = (struct depca_private *)dev->priv;
1195 int i, j, bit, byte;
1196 u16 hashcode;
1197 s32 crc, poly = CRC_POLYNOMIAL_BE;
1198
1199 if (num_addrs == HASH_TABLE_LEN) {
1200 for (i=0; i<(HASH_TABLE_LEN>>3); i++) {
1201 lp->init_block.mcast_table[i] = (char)0xff;
1202 }
1203 } else {
1204
1205 for (i=0; i<(HASH_TABLE_LEN>>3); i++){
1206 lp->init_block.mcast_table[i]=0;
1207 }
1208
1209
1210 for (i=0;i<num_addrs;i++) {
1211 if ((*addrs & 0x01) == 1) {
1212 crc = 0xffffffff;
1213 for (byte=0;byte<ETH_ALEN;byte++) {
1214
1215 for (bit = *addrs++,j=0;j<8;j++, bit>>=1) {
1216 crc = (crc << 1) ^ ((((crc<0?1:0) ^ bit) & 0x01) ? poly : 0);
1217 }
1218 }
1219 hashcode = (crc & 1);
1220 for (j=0;j<5;j++) {
1221 hashcode = (hashcode << 1) | ((crc>>=1) & 1);
1222 }
1223
1224
1225 byte = hashcode >> 3;
1226 bit = 1 << (hashcode & 0x07);
1227 lp->init_block.mcast_table[byte] |= bit;
1228 } else {
1229 addrs += ETH_ALEN;
1230 }
1231 }
1232 }
1233
1234 return;
1235 }
1236
1237
1238
1239
1240 static void isa_probe(struct device *dev, u_long ioaddr)
1241 {
1242 int i = num_depcas, maxSlots;
1243 s32 ports[] = DEPCA_IO_PORTS;
1244
1245 if (!ioaddr && autoprobed) return ;
1246 if (ioaddr > 0x400) return;
1247 if (i >= MAX_NUM_DEPCAS) return;
1248
1249 if (ioaddr == 0) {
1250 maxSlots = MAX_NUM_DEPCAS;
1251 } else {
1252 ports[i] = ioaddr;
1253 maxSlots = i + 1;
1254 }
1255
1256 for (; (i<maxSlots) && (dev!=NULL) && ports[i]; i++) {
1257 if (DevicePresent(ports[i]) == 0) {
1258 if (check_region(ports[i], DEPCA_TOTAL_SIZE) == 0) {
1259 if ((dev = alloc_device(dev, ports[i])) != NULL) {
1260 if (depca_hw_init(dev, ports[i]) == 0) {
1261 num_depcas++;
1262 }
1263 num_eth++;
1264 }
1265 } else if (autoprobed) {
1266 printk("%s: region already allocated at 0x%04x.\n", dev->name,ports[i]);
1267 }
1268 }
1269 }
1270
1271 return;
1272 }
1273
1274
1275
1276
1277
1278 static void eisa_probe(struct device *dev, u_long ioaddr)
1279 {
1280 int i, maxSlots;
1281 u_long iobase;
1282 char name[DEPCA_STRLEN];
1283
1284 if (!ioaddr && autoprobed) return ;
1285 if ((ioaddr < 0x400) && (ioaddr > 0)) return;
1286
1287 if (ioaddr == 0) {
1288 iobase = EISA_SLOT_INC;
1289 i = 1;
1290 maxSlots = MAX_EISA_SLOTS;
1291 } else {
1292 iobase = ioaddr;
1293 i = (ioaddr >> 12);
1294 maxSlots = i + 1;
1295 }
1296 if ((iobase & 0x0fff) == 0) iobase += DEPCA_EISA_IO_PORTS;
1297
1298 for (; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) {
1299 if (EISA_signature(name, EISA_ID)) {
1300 if (DevicePresent(iobase) == 0) {
1301 if (check_region(iobase, DEPCA_TOTAL_SIZE) == 0) {
1302 if ((dev = alloc_device(dev, iobase)) != NULL) {
1303 if (depca_hw_init(dev, iobase) == 0) {
1304 num_depcas++;
1305 }
1306 num_eth++;
1307 }
1308 } else if (autoprobed) {
1309 printk("%s: region already allocated at 0x%04lx.\n",dev->name,iobase);
1310 }
1311 }
1312 }
1313 }
1314
1315 return;
1316 }
1317
1318
1319
1320
1321
1322 static struct device *alloc_device(struct device *dev, u_long iobase)
1323 {
1324 int addAutoProbe = 0;
1325 struct device *tmp = NULL, *ret;
1326 int (*init)(struct device *) = NULL;
1327
1328
1329
1330
1331 if (!loading_module) {
1332 while (dev->next != NULL) {
1333 if ((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0)) break;
1334 dev = dev->next;
1335 num_eth++;
1336 }
1337
1338
1339
1340
1341
1342 if ((dev->base_addr == 0) && (num_depcas > 0)) {
1343 addAutoProbe++;
1344 tmp = dev->next;
1345 init = dev->init;
1346 }
1347
1348
1349
1350
1351
1352 if ((dev->next == NULL) &&
1353 !((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0))){
1354 dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1355 GFP_KERNEL);
1356
1357 dev = dev->next;
1358 if (dev == NULL) {
1359 printk("eth%d: Device not initialised, insufficient memory\n",
1360 num_eth);
1361 } else {
1362
1363
1364
1365
1366
1367 dev->name = (char *)(dev + sizeof(struct device));
1368 if (num_eth > 9999) {
1369 sprintf(dev->name,"eth????");
1370 } else {
1371 sprintf(dev->name,"eth%d", num_eth);
1372 }
1373 dev->base_addr = iobase;
1374 dev->next = NULL;
1375 dev->init = &depca_probe;
1376 num_depcas++;
1377 }
1378 }
1379 ret = dev;
1380
1381
1382
1383
1384
1385 if (ret != NULL) {
1386 if (addAutoProbe) {
1387 for (;(tmp->next!=NULL) && (tmp->base_addr!=DEPCA_NDA); tmp=tmp->next);
1388
1389
1390
1391
1392
1393 if ((tmp->next == NULL) && !(tmp->base_addr == DEPCA_NDA)) {
1394 tmp->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1395 GFP_KERNEL);
1396 tmp = tmp->next;
1397 if (tmp == NULL) {
1398 printk("%s: Insufficient memory to extend the device list.\n",
1399 dev->name);
1400 } else {
1401
1402
1403
1404
1405
1406 tmp->name = (char *)(tmp + sizeof(struct device));
1407 if (num_eth > 9999) {
1408 sprintf(tmp->name,"eth????");
1409 } else {
1410 sprintf(tmp->name,"eth%d", num_eth);
1411 }
1412 tmp->base_addr = 0;
1413 tmp->next = NULL;
1414 tmp->init = init;
1415 }
1416 } else {
1417 tmp->base_addr = 0;
1418 }
1419 }
1420 }
1421 } else {
1422 ret = dev;
1423 }
1424
1425 return ret;
1426 }
1427
1428
1429
1430
1431
1432
1433 static void DepcaSignature(char *name, u_long paddr)
1434 {
1435 u_int i,j,k;
1436 const char *signatures[] = DEPCA_SIGNATURE;
1437 char tmpstr[16];
1438
1439 for (i=0;i<16;i++) {
1440 tmpstr[i] = readb(paddr+0xc000+i);
1441 }
1442
1443 strcpy(name,"");
1444 for (i=0;*signatures[i]!='\0' && *name=='\0';i++) {
1445 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {
1446 if (signatures[i][k] == tmpstr[j]) {
1447 k++;
1448 } else {
1449 k=0;
1450 }
1451 }
1452 if (k == strlen(signatures[i])) {
1453 strcpy(name,signatures[i]);
1454 }
1455 }
1456
1457 adapter = i - 1;
1458
1459 return;
1460 }
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477 static int DevicePresent(u_long ioaddr)
1478 {
1479 union {
1480 struct {
1481 u32 a;
1482 u32 b;
1483 } llsig;
1484 char Sig[sizeof(u32) << 1];
1485 } dev;
1486 short sigLength=0;
1487 s8 data;
1488 s16 nicsr;
1489 int i, j, status = 0;
1490
1491 data = inb(DEPCA_PROM);
1492 data = inb(DEPCA_PROM);
1493
1494 if (data == 0x08) {
1495 nicsr = inb(DEPCA_NICSR);
1496 nicsr |= AAC;
1497 outb(nicsr, DEPCA_NICSR);
1498 }
1499
1500 dev.llsig.a = ETH_PROM_SIG;
1501 dev.llsig.b = ETH_PROM_SIG;
1502 sigLength = sizeof(u32) << 1;
1503
1504 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1505 data = inb(DEPCA_PROM);
1506 if (dev.Sig[j] == data) {
1507 j++;
1508 } else {
1509 if (data == dev.Sig[0]) {
1510 j=1;
1511 } else {
1512 j=0;
1513 }
1514 }
1515 }
1516
1517 if (j!=sigLength) {
1518 status = -ENODEV;
1519 }
1520
1521 return status;
1522 }
1523
1524
1525
1526
1527
1528
1529 static int get_hw_addr(struct device *dev)
1530 {
1531 u_long ioaddr = dev->base_addr;
1532 int i, k, tmp, status = 0;
1533 u_short j, x, chksum;
1534
1535 x = (((adapter == de100) || (adapter == de101)) ? 1 : 0);
1536
1537 for (i=0,k=0,j=0;j<3;j++) {
1538 k <<= 1 ;
1539 if (k > 0xffff) k-=0xffff;
1540
1541 k += (u_char) (tmp = inb(DEPCA_PROM + x));
1542 dev->dev_addr[i++] = (u_char) tmp;
1543 k += (u_short) ((tmp = inb(DEPCA_PROM + x)) << 8);
1544 dev->dev_addr[i++] = (u_char) tmp;
1545
1546 if (k > 0xffff) k-=0xffff;
1547 }
1548 if (k == 0xffff) k=0;
1549
1550 chksum = (u_char) inb(DEPCA_PROM + x);
1551 chksum |= (u_short) (inb(DEPCA_PROM + x) << 8);
1552 if (k != chksum) status = -1;
1553
1554 return status;
1555 }
1556
1557
1558
1559
1560 static int load_packet(struct device *dev, struct sk_buff *skb)
1561 {
1562 struct depca_private *lp = (struct depca_private *)dev->priv;
1563 int i, entry, end, len, status = 0;
1564
1565 entry = lp->tx_new;
1566 end = (entry + (skb->len - 1) / TX_BUFF_SZ) & lp->txRingMask;
1567 if (!(readl(&lp->tx_ring[end].base) & T_OWN)) {
1568
1569
1570
1571
1572 if (end < entry) {
1573 len = (lp->txRingMask - entry + 1) * TX_BUFF_SZ;
1574 memcpy_toio(lp->tx_memcpy[entry], skb->data, len);
1575 memcpy_toio(lp->tx_memcpy[0], skb->data + len, skb->len - len);
1576 } else {
1577 memcpy_toio(lp->tx_memcpy[entry], skb->data, skb->len);
1578 }
1579
1580
1581 len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
1582 for (i = entry; i != end; i = (++i) & lp->txRingMask) {
1583
1584 writel(readl(&lp->tx_ring[i].base) & ~T_FLAGS, &lp->tx_ring[i].base);
1585 writew(0x0000, &lp->tx_ring[i].misc);
1586 writew(-TX_BUFF_SZ, &lp->tx_ring[i].length);
1587 len -= TX_BUFF_SZ;
1588 }
1589
1590 writel(readl(&lp->tx_ring[end].base) & ~T_FLAGS, &lp->tx_ring[end].base);
1591 writew(0x0000, &lp->tx_ring[end].misc);
1592 writew(-len, &lp->tx_ring[end].length);
1593
1594
1595 writel(readl(&lp->tx_ring[entry].base) | T_STP, &lp->tx_ring[entry].base);
1596
1597 writel(readl(&lp->tx_ring[end].base) | T_ENP, &lp->tx_ring[end].base);
1598
1599 for (i=end; i!=entry; --i) {
1600
1601 writel(readl(&lp->tx_ring[i].base) | T_OWN, &lp->tx_ring[i].base);
1602 if (i == 0) i=lp->txRingMask+1;
1603 }
1604 writel(readl(&lp->tx_ring[entry].base) | T_OWN, &lp->tx_ring[entry].base);
1605
1606 lp->tx_new = (++end) & lp->txRingMask;
1607 } else {
1608 status = -1;
1609 }
1610
1611 return status;
1612 }
1613
1614
1615
1616
1617 static int EISA_signature(char *name, s32 eisa_id)
1618 {
1619 u_int i;
1620 const char *signatures[] = DEPCA_SIGNATURE;
1621 char ManCode[DEPCA_STRLEN];
1622 union {
1623 s32 ID;
1624 char Id[4];
1625 } Eisa;
1626 int status = 0;
1627
1628 *name = '\0';
1629 Eisa.ID = inl(eisa_id);
1630
1631 ManCode[0]=(((Eisa.Id[0]>>2)&0x1f)+0x40);
1632 ManCode[1]=(((Eisa.Id[1]&0xe0)>>5)+((Eisa.Id[0]&0x03)<<3)+0x40);
1633 ManCode[2]=(((Eisa.Id[2]>>4)&0x0f)+0x30);
1634 ManCode[3]=((Eisa.Id[2]&0x0f)+0x30);
1635 ManCode[4]=(((Eisa.Id[3]>>4)&0x0f)+0x30);
1636 ManCode[5]='\0';
1637
1638 for (i=0;(*signatures[i] != '\0') && (*name == '\0');i++) {
1639 if (strstr(ManCode, signatures[i]) != NULL) {
1640 strcpy(name,ManCode);
1641 status = 1;
1642 }
1643 }
1644
1645 return status;
1646 }
1647
1648
1649
1650
1651
1652 static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd)
1653 {
1654 struct depca_private *lp = (struct depca_private *)dev->priv;
1655 struct depca_ioctl *ioc = (struct depca_ioctl *) &rq->ifr_data;
1656 int i, status = 0;
1657 u_long ioaddr = dev->base_addr;
1658 union {
1659 u8 addr[(HASH_TABLE_LEN * ETH_ALEN)];
1660 u16 sval[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1661 u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];
1662 } tmp;
1663
1664 switch(ioc->cmd) {
1665 case DEPCA_GET_HWADDR:
1666 for (i=0; i<ETH_ALEN; i++) {
1667 tmp.addr[i] = dev->dev_addr[i];
1668 }
1669 ioc->len = ETH_ALEN;
1670 if (!(status = verify_area(VERIFY_WRITE, (void *)ioc->data, ioc->len))) {
1671 memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1672 }
1673
1674 break;
1675 case DEPCA_SET_HWADDR:
1676 if (suser()) {
1677 if (!(status = verify_area(VERIFY_READ, (void *)ioc->data, ETH_ALEN))) {
1678 memcpy_fromfs(tmp.addr,ioc->data,ETH_ALEN);
1679 for (i=0; i<ETH_ALEN; i++) {
1680 dev->dev_addr[i] = tmp.addr[i];
1681 }
1682 while(dev->tbusy);
1683 set_bit(0, (void*)&dev->tbusy);
1684 while(lp->tx_old != lp->tx_new);
1685
1686 STOP_DEPCA;
1687 depca_init_ring(dev);
1688 LoadCSRs(dev);
1689 InitRestartDepca(dev);
1690 dev->tbusy = 0;
1691 }
1692 } else {
1693 status = -EPERM;
1694 }
1695
1696 break;
1697 case DEPCA_SET_PROM:
1698 if (suser()) {
1699 while(dev->tbusy);
1700 set_bit(0, (void*)&dev->tbusy);
1701 while(lp->tx_old != lp->tx_new);
1702
1703 STOP_DEPCA;
1704 depca_init_ring(dev);
1705 lp->init_block.mode |= PROM;
1706
1707 LoadCSRs(dev);
1708 InitRestartDepca(dev);
1709 dev->tbusy = 0;
1710 } else {
1711 status = -EPERM;
1712 }
1713
1714 break;
1715 case DEPCA_CLR_PROM:
1716 if (suser()) {
1717 while(dev->tbusy);
1718 set_bit(0, (void*)&dev->tbusy);
1719 while(lp->tx_old != lp->tx_new);
1720
1721 STOP_DEPCA;
1722 depca_init_ring(dev);
1723 lp->init_block.mode &= ~PROM;
1724
1725 LoadCSRs(dev);
1726 InitRestartDepca(dev);
1727 dev->tbusy = 0;
1728 } else {
1729 status = -EPERM;
1730 }
1731
1732 break;
1733 case DEPCA_SAY_BOO:
1734 printk("%s: Boo!\n", dev->name);
1735
1736 break;
1737 case DEPCA_GET_MCA:
1738 ioc->len = (HASH_TABLE_LEN >> 3);
1739 if (!(status = verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1740 memcpy_tofs(ioc->data, lp->init_block.mcast_table, ioc->len);
1741 }
1742
1743 break;
1744 case DEPCA_SET_MCA:
1745 if (suser()) {
1746 if (ioc->len != HASH_TABLE_LEN) {
1747 if (!(status=verify_area(VERIFY_READ, ioc->data, ETH_ALEN*ioc->len))) {
1748 memcpy_fromfs(tmp.addr, ioc->data, ETH_ALEN * ioc->len);
1749 set_multicast_list(dev, ioc->len, tmp.addr);
1750 }
1751 } else {
1752 set_multicast_list(dev, ioc->len, NULL);
1753 }
1754 } else {
1755 status = -EPERM;
1756 }
1757
1758 break;
1759 case DEPCA_CLR_MCA:
1760 if (suser()) {
1761 set_multicast_list(dev, 0, NULL);
1762 } else {
1763 status = -EPERM;
1764 }
1765
1766 break;
1767 case DEPCA_MCA_EN:
1768 if (suser()) {
1769 set_multicast_list(dev, HASH_TABLE_LEN, NULL);
1770 } else {
1771 status = -EPERM;
1772 }
1773
1774 break;
1775 case DEPCA_GET_STATS:
1776 cli();
1777 ioc->len = sizeof(lp->pktStats);
1778 if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1779 memcpy_tofs(ioc->data, &lp->pktStats, ioc->len);
1780 }
1781 sti();
1782
1783 break;
1784 case DEPCA_CLR_STATS:
1785 if (suser()) {
1786 cli();
1787 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1788 sti();
1789 } else {
1790 status = -EPERM;
1791 }
1792
1793 break;
1794 case DEPCA_GET_REG:
1795 i=0;
1796 tmp.sval[i++] = inw(DEPCA_NICSR);
1797 outw(CSR0, DEPCA_ADDR);
1798 tmp.sval[i++] = inw(DEPCA_DATA);
1799 memcpy(&tmp.sval[i], &lp->init_block, sizeof(struct depca_init));
1800 ioc->len = i+sizeof(struct depca_init);
1801 if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1802 memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1803 }
1804
1805 break;
1806 default:
1807 status = -EOPNOTSUPP;
1808 }
1809
1810 return status;
1811 }
1812
1813 #ifdef MODULE
1814 static char devicename[9] = { 0, };
1815 static struct device thisDepca = {
1816 devicename,
1817 0, 0, 0, 0,
1818 0x200, 7,
1819 0, 0, 0, NULL, depca_probe };
1820
1821 static int irq=7;
1822 static int io=0x200;
1823
1824 int
1825 init_module(void)
1826 {
1827 if (io == 0)
1828 printk("depca: You should not use auto-probing with insmod!\n");
1829 thisDepca.irq=irq;
1830 thisDepca.base_addr=io;
1831 if (register_netdev(&thisDepca) != 0)
1832 return -EIO;
1833
1834 return 0;
1835 }
1836
1837 void
1838 cleanup_module(void)
1839 {
1840 release_region(thisDepca.base_addr, DEPCA_TOTAL_SIZE);
1841 if (thisDepca.priv) {
1842 kfree_s(thisDepca.priv, sizeof(struct depca_private));
1843 thisDepca.priv = NULL;
1844 }
1845
1846 unregister_netdev(&thisDepca);
1847 }
1848 #endif
1849
1850
1851
1852
1853
1854
1855
1856
1857