1 /*
2 * linux/drivers/block/triton.c Version 1.03 Nov 16, 1995
3 *
4 * Copyright (c) 1995 Mark Lord
5 * May be copied or modified under the terms of the GNU General Public License
6 */
7
8 /*
9 * This module provides support for the Bus Master IDE DMA function
10 * of the Intel PCI Triton chipset (82371FB).
11 *
12 * DMA is currently supported only for hard disk drives (not cdroms).
13 *
14 * Support for cdroms will likely be added at a later date,
15 * after broader experience has been obtained with hard disks.
16 *
17 * Up to four drives may be enabled for DMA, and the Triton chipset will
18 * (hopefully) arbitrate the PCI bus among them. Note that the 82371FB chip
19 * provides a single "line buffer" for the BM IDE function, so performance of
20 * multiple (two) drives doing DMA simultaneously will suffer somewhat,
21 * as they contest for that resource bottleneck. This is handled transparently
22 * inside the 82371FB chip.
23 *
24 * By default, DMA support is prepared for use, but is currently enabled only
25 * for drives which support multi-word DMA mode2 (mword2), or which are
26 * recognized as "good" (see table below). Drives with only mode0 or mode1
27 * (single or multi) DMA should also work with this chipset/driver (eg. MC2112A)
28 * but are not enabled by default. Use "hdparm -i" to view modes supported
29 * by a given drive.
30 *
31 * The hdparm-2.4 (or later) utility can be used for manually enabling/disabling
32 * DMA support, but must be (re-)compiled against this kernel version or later.
33 *
34 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
35 * If problems arise, ide.c will disable DMA operation after a few retries.
36 * This error recovery mechanism works and has been extremely well exercised.
37 *
38 * IDE drives, depending on their vintage, may support several different modes
39 * of DMA operation. The boot-time modes are indicated with a "*" in
40 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
41 * the "hdparm -X" feature. There is seldom a need to do this, as drives
42 * normally power-up with their "best" PIO/DMA modes enabled.
43 *
44 * Testing was done with an ASUS P55TP4XE/100 system and the following drives:
45 *
46 * Quantum Fireball 1080A (1Gig w/83kB buffer), DMA mode2, PIO mode4.
47 * - DMA mode2 works well (7.4MB/sec), despite the tiny on-drive buffer.
48 * - This drive also does PIO mode4, at about the same speed as DMA mode2.
49 * An awesome drive for the price!
50 *
51 * Fujitsu M1606TA (1Gig w/256kB buffer), DMA mode2, PIO mode4.
52 * - DMA mode2 gives horrible performance (1.6MB/sec), despite the good
53 * size of the on-drive buffer and a boasted 10ms average access time.
54 * - PIO mode4 was better, but peaked at a mere 4.5MB/sec.
55 *
56 * Micropolis MC2112A (1Gig w/508kB buffer), drive pre-dates EIDE and ATA2.
57 * - DMA works fine (2.2MB/sec), probably due to the large on-drive buffer.
58 * - This older drive can also be tweaked for fastPIO (3.7MB/sec) by using
59 * maximum clock settings (5,4) and setting all flags except prefetch.
60 *
61 * Western Digital AC31000H (1Gig w/128kB buffer), DMA mode1, PIO mode3.
62 * - DMA does not work reliably. The drive appears to be somewhat tardy
63 * in deasserting DMARQ at the end of a sector. This is evident in
64 * the observation that WRITEs work most of the time, depending on
65 * cache-buffer occupancy, but multi-sector reads seldom work.
66 *
67 * Testing was done with a Gigabyte GA-586 ATE system and the following drive:
68 * (Uwe Bonnes - bon@elektron.ikp.physik.th-darmstadt.de)
69 *
70 * Western Digital AC31600H (1.6Gig w/128kB buffer), DMA mode2, PIO mode4.
71 * - much better than its 1Gig cousin, this drive is reported to work
72 * very well with DMA (7.3MB/sec).
73 *
74 * If you have any drive models to add, email your results to: mlord@bnr.ca
75 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
76 */
77 #define _TRITON_C
78 #include <linux/config.h>
79 #ifndef CONFIG_BLK_DEV_TRITON
80 #define CONFIG_BLK_DEV_TRITON y
81 #endif
82 #include <linux/types.h>
83 #include <linux/kernel.h>
84 #include <linux/timer.h>
85 #include <linux/mm.h>
86 #include <linux/ioport.h>
87 #include <linux/interrupt.h>
88 #include <linux/blkdev.h>
89 #include <linux/hdreg.h>
90 #include <linux/pci.h>
91 #include <linux/bios32.h>
92
93 #include <asm/io.h>
94 #include <asm/dma.h>
95
96 #include "ide.h"
97
98 /*
99 * good_dma_drives() lists the model names (from "hdparm -i")
100 * of drives which do not support mword2 DMA but which are
101 * known to work fine with this interface under Linux.
102 */
103 const char *good_dma_drives[] = {"Micropolis 2112A"};
104
105 /*
106 * Our Physical Region Descriptor (PRD) table should be large enough
107 * to handle the biggest I/O request we are likely to see. Since requests
108 * can have no more than 256 sectors, and since the typical blocksize is
109 * two sectors, we can get by with a limit of 128 entries here for the
110 * usual worst case. Most requests seem to include some contiguous blocks,
111 * further reducing the number of table entries required.
112 *
113 * Note that the driver reverts to PIO mode for individual requests that exceed
114 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
115 * 100% of all crazy scenarios here is not necessary.
116 *
117 * As it turns out, though, we must allocate a full 4KB page for this,
118 * so the two PRD tables (ide0 & ide1) will each get half of that,
119 * allowing each to have about 256 entries (8 bytes each) from this.
120 */
121 #define PRD_BYTES 8
122 #define PRD_ENTRIES (PAGE_SIZE / (2 * PRD_BYTES))
123
124 /*
125 * dma_intr() is the handler for disk read/write DMA interrupts
126 */
127 static void dma_intr (ide_drive_t *drive)
/* ![[previous]](../icons/n_left.png)
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*/
128 {
129 byte stat, dma_stat;
130 int i;
131 struct request *rq = HWGROUP(drive)->rq;
132 unsigned short dma_base = HWIF(drive)->dma_base;
133
134 dma_stat = inb(dma_base+2); /* get DMA status */
135 outb(inb(dma_base)&~1, dma_base); /* stop DMA operation */
136 stat = GET_STAT(); /* get drive status */
137 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
138 if ((dma_stat & 7) == 4) { /* verify good DMA status */
139 rq = HWGROUP(drive)->rq;
140 for (i = rq->nr_sectors; i > 0;) {
141 i -= rq->current_nr_sectors;
142 ide_end_request(1, HWGROUP(drive));
143 }
144 IDE_DO_REQUEST;
145 return;
146 }
147 printk("%s: bad DMA status: 0x%02x\n", drive->name, dma_stat);
148 }
149 sti();
150 if (!ide_error(drive, "dma_intr", stat))
151 IDE_DO_REQUEST;
152 }
153
154 /*
155 * build_dmatable() prepares a dma request.
156 * Returns 0 if all went okay, returns 1 otherwise.
157 */
158 static int build_dmatable (ide_drive_t *drive)
/* ![[previous]](../icons/left.png)
![[next]](../icons/right.png)
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![[last]](../icons/last.png)
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*/
159 {
160 struct request *rq = HWGROUP(drive)->rq;
161 struct buffer_head *bh = rq->bh;
162 unsigned long size, addr, *table = HWIF(drive)->dmatable;
163 unsigned int count = 0;
164
165 do {
166 /*
167 * Determine addr and size of next buffer area. We assume that
168 * individual virtual buffers are always composed linearly in
169 * physical memory. For example, we assume that any 8kB buffer
170 * is always composed of two adjacent physical 4kB pages rather
171 * than two possibly non-adjacent physical 4kB pages.
172 */
173 if (bh == NULL) { /* paging requests have (rq->bh == NULL) */
174 addr = virt_to_bus (rq->buffer);
175 size = rq->nr_sectors << 9;
176 } else {
177 /* group sequential buffers into one large buffer */
178 addr = virt_to_bus (bh->b_data);
179 size = bh->b_size;
180 while ((bh = bh->b_reqnext) != NULL) {
181 if ((addr + size) != virt_to_bus (bh->b_data))
182 break;
183 size += bh->b_size;
184 }
185 }
186
187 /*
188 * Fill in the dma table, without crossing any 64kB boundaries.
189 * We assume 16-bit alignment of all blocks.
190 */
191 while (size) {
192 if (++count >= PRD_ENTRIES) {
193 printk("%s: DMA table too small\n", drive->name);
194 return 1; /* revert to PIO for this request */
195 } else {
196 unsigned long bcount = 0x10000 - (addr & 0xffff);
197 if (bcount > size)
198 bcount = size;
199 *table++ = addr;
200 *table++ = bcount;
201 addr += bcount;
202 size -= bcount;
203 }
204 }
205 } while (bh != NULL);
206 if (count) {
207 *--table |= 0x80000000; /* set End-Of-Table (EOT) bit */
208 return 0;
209 }
210 printk("%s: empty DMA table?\n", drive->name);
211 return 1; /* let the PIO routines handle this weirdness */
212 }
213
214 static int config_drive_for_dma (ide_drive_t *drive)
/* ![[previous]](../icons/left.png)
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*/
215 {
216 const char **list;
217
218 struct hd_driveid *id = drive->id;
219 if (id && (id->capability & 1)) {
220 /* Enable DMA on any drive that supports mword2 DMA */
221 if ((id->field_valid & 2) && (id->dma_mword & 0x404) == 0x404) {
222 drive->using_dma = 1;
223 return 0; /* DMA enabled */
224 }
225 /* Consult the list of known "good" drives */
226 list = good_dma_drives;
227 while (*list) {
228 if (!strcmp(*list++,id->model)) {
229 drive->using_dma = 1;
230 return 0; /* DMA enabled */
231 }
232 }
233 }
234 return 1; /* DMA not enabled */
235 }
236
237 /*
238 * triton_dmaproc() initiates/aborts DMA read/write operations on a drive.
239 *
240 * The caller is assumed to have selected the drive and programmed the drive's
241 * sector address using CHS or LBA. All that remains is to prepare for DMA
242 * and then issue the actual read/write DMA/PIO command to the drive.
243 *
244 * Returns 0 if all went well.
245 * Returns 1 if DMA read/write could not be started, in which case
246 * the caller should revert to PIO for the current request.
247 */
248 static int triton_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
/* ![[previous]](../icons/left.png)
![[next]](../icons/right.png)
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![[top]](../icons/top.png)
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![[index]](../icons/index.png)
*/
249 {
250 unsigned long dma_base = HWIF(drive)->dma_base;
251 unsigned int reading = (1 << 3);
252
253 switch (func) {
254 case ide_dma_abort:
255 outb(inb(dma_base)&~1, dma_base); /* stop DMA */
256 return 0;
257 case ide_dma_check:
258 return config_drive_for_dma (drive);
259 case ide_dma_write:
260 reading = 0;
261 case ide_dma_read:
262 break;
263 default:
264 printk("triton_dmaproc: unsupported func: %d\n", func);
265 return 1;
266 }
267 if (build_dmatable (drive))
268 return 1;
269 outl(virt_to_bus (HWIF(drive)->dmatable), dma_base + 4); /* PRD table */
270 outb(reading, dma_base); /* specify r/w */
271 outb(0x26, dma_base+2); /* clear status bits */
272 ide_set_handler (drive, &dma_intr); /* issue cmd to drive */
273 OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA, IDE_COMMAND_REG);
274 outb(inb(dma_base)|1, dma_base); /* begin DMA */
275 return 0;
276 }
277
278 /*
279 * print_triton_drive_flags() displays the currently programmed options
280 * in the Triton chipset for a given drive.
281 *
282 * If fastDMA is "no", then slow ISA timings are used for DMA data xfers.
283 * If fastPIO is "no", then slow ISA timings are used for PIO data xfers.
284 * If IORDY is "no", then IORDY is assumed to always be asserted.
285 * If PreFetch is "no", then data pre-fetch/post are not used.
286 *
287 * When "fastPIO" and/or "fastDMA" are "yes", then faster PCI timings and
288 * back-to-back 16-bit data transfers are enabled, using the sample_CLKs
289 * and recovery_CLKs (PCI clock cycles) timing parameters for that interface.
290 */
291 static void print_triton_drive_flags (unsigned int unit, byte flags)
/* ![[previous]](../icons/left.png)
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![[top]](../icons/top.png)
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![[index]](../icons/index.png)
*/
292 {
293 printk(" %s ", unit ? "slave :" : "master:");
294 printk( "fastDMA=%s", (flags&9) ? "on " : "off");
295 printk(" PreFetch=%s", (flags&4) ? "on " : "off");
296 printk(" IORDY=%s", (flags&2) ? "on " : "off");
297 printk(" fastPIO=%s\n", ((flags&9)==1) ? "on " : "off");
298 }
299
300 /*
301 * ide_init_triton() prepares the IDE driver for DMA operation.
302 * This routine is called once, from ide.c during driver initialization,
303 * for each triton chipset which is found (unlikely to be more than one).
304 */
305 void ide_init_triton (byte bus, byte fn)
/* ![[previous]](../icons/left.png)
![[next]](../icons/n_right.png)
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![[top]](../icons/top.png)
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*/
306 {
307 int rc = 0, h;
308 unsigned short bmiba, pcicmd;
309 unsigned int timings;
310 unsigned char *dmatable = NULL;
311 extern ide_hwif_t ide_hwifs[];
312
313 /*
314 * See if IDE and BM-DMA features are enabled:
315 */
316 if ((rc = pcibios_read_config_word(bus, fn, 0x04, &pcicmd)))
317 goto quit;
318 if ((pcicmd & 5) != 5) {
319 if ((pcicmd & 1) == 0)
320 printk("ide: Triton IDE ports are not enabled\n");
321 else
322 printk("ide: Triton BM-DMA feature is not enabled\n");
323 goto quit;
324 }
325 #if 0
326 (void) pcibios_write_config_word(bus, fn, 0x42, 0x8037); /* for my MC2112A */
327 #endif
328 /*
329 * See if ide port(s) are enabled
330 */
331 if ((rc = pcibios_read_config_dword(bus, fn, 0x40, &timings)))
332 goto quit;
333 if (!(timings & 0x80008000)) {
334 printk("ide: Triton IDE ports are not enabled\n");
335 goto quit;
336 }
337 printk("ide: Triton BM-IDE on PCI bus %d function %d\n", bus, fn);
338
339 /*
340 * Get the bmiba base address
341 */
342 if ((rc = pcibios_read_config_word(bus, fn, 0x20, &bmiba)))
343 goto quit;
344 bmiba &= 0xfff0; /* extract port base address */
345
346 /*
347 * Save the dma_base port addr for each interface
348 */
349 for (h = 0; h < MAX_HWIFS; ++h) {
350 ide_hwif_t *hwif = &ide_hwifs[h];
351 unsigned short base, time;
352 if (hwif->io_base == 0x1f0 && (timings & 0x8000)) {
353 time = timings & 0xffff;
354 base = bmiba;
355 } else if (hwif->io_base == 0x170 && (timings & 0x80000000)) {
356 time = timings >> 16;
357 base = bmiba + 8;
358 } else
359 continue;
360 printk(" %s: BusMaster DMA at 0x%04x-0x%04x", hwif->name, base, base+7);
361 if (check_region(base, 8)) {
362 printk(" -- ERROR, PORTS ALREADY IN USE");
363 } else {
364 request_region(base, 8, hwif->name);
365 hwif->dma_base = base;
366 if (dmatable == NULL) {
367 /*
368 * Since we know we are on a PCI bus, we could
369 * actually use __get_free_pages() here instead
370 * of __get_dma_pages() -- no ISA limitations.
371 */
372 dmatable = (void *) __get_dma_pages(GFP_KERNEL, 0);
373 }
374 if (dmatable != NULL) {
375 hwif->dmatable = (unsigned long *) dmatable;
376 dmatable += (PRD_ENTRIES * PRD_BYTES);
377 outl(virt_to_bus(hwif->dmatable), base + 4);
378 hwif->dmaproc = &triton_dmaproc;
379 }
380 }
381 printk("\n %s timing: (0x%04x) sample_CLKs=%d, recovery_CLKs=%d\n",
382 hwif->name, time, ((~time>>12)&3)+2, ((~time>>8)&3)+1);
383 print_triton_drive_flags (0, time & 0xf);
384 print_triton_drive_flags (1, (time >> 4) & 0xf);
385 }
386
387 quit: if (rc) printk("ide: pcibios access failed - %s\n", pcibios_strerror(rc));
388 }
389