This source file includes following definitions.
- atp_init
- atp_probe1
- get_node_ID
- eeprom_op
- net_open
- hardware_init
- trigger_send
- write_packet
- net_send_packet
- net_interrupt
- atp_timed_checker
- net_rx
- read_block
- net_close
- net_get_stats
- set_multicast_list
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21 static const char *version =
22 "atp.c:v1.01 1/18/95 Donald Becker (becker@cesdis.gsfc.nasa.gov)\n";
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84 #include <linux/kernel.h>
85 #include <linux/sched.h>
86 #include <linux/types.h>
87 #include <linux/fcntl.h>
88 #include <linux/interrupt.h>
89 #include <linux/ptrace.h>
90 #include <linux/ioport.h>
91 #include <linux/in.h>
92 #include <linux/malloc.h>
93 #include <linux/string.h>
94 #include <asm/system.h>
95 #include <asm/bitops.h>
96 #include <asm/io.h>
97 #include <asm/dma.h>
98 #include <linux/errno.h>
99
100 #include <linux/netdevice.h>
101 #include <linux/etherdevice.h>
102 #include <linux/skbuff.h>
103
104 #include "atp.h"
105
106
107 #ifndef NET_DEBUG
108 #define NET_DEBUG 1
109 #endif
110 static unsigned int net_debug = NET_DEBUG;
111
112
113 #define ETHERCARD_TOTAL_SIZE 3
114
115
116
117
118 #define TIMED_CHECKER (HZ/4)
119 #ifdef TIMED_CHECKER
120 #include <linux/timer.h>
121 static void atp_timed_checker(unsigned long ignored);
122 static struct device *atp_timed_dev;
123 static struct timer_list atp_timer = {NULL, NULL, 0, 0, atp_timed_checker};
124 #endif
125
126
127
128 extern int atp_probe(struct device *dev);
129
130 static int atp_probe1(struct device *dev, short ioaddr);
131 static void get_node_ID(struct device *dev);
132 static unsigned short eeprom_op(short ioaddr, unsigned int cmd);
133 static int net_open(struct device *dev);
134 static void hardware_init(struct device *dev);
135 static void write_packet(short ioaddr, int length, unsigned char *packet, int mode);
136 static void trigger_send(short ioaddr, int length);
137 static int net_send_packet(struct sk_buff *skb, struct device *dev);
138 static void net_interrupt(int irq, struct pt_regs *regs);
139 static void net_rx(struct device *dev);
140 static void read_block(short ioaddr, int length, unsigned char *buffer, int data_mode);
141 static int net_close(struct device *dev);
142 static struct enet_statistics *net_get_stats(struct device *dev);
143 static void set_multicast_list(struct device *dev);
144
145
146
147
148
149
150
151
152 int
153 atp_init(struct device *dev)
154 {
155 int *port, ports[] = {0x378, 0x278, 0x3bc, 0};
156 int base_addr = dev->base_addr;
157
158 if (base_addr > 0x1ff)
159 return atp_probe1(dev, base_addr);
160 else if (base_addr == 1)
161 return ENXIO;
162
163 for (port = ports; *port; port++) {
164 int ioaddr = *port;
165 outb(0x57, ioaddr + PAR_DATA);
166 if (inb(ioaddr + PAR_DATA) != 0x57)
167 continue;
168 if (atp_probe1(dev, ioaddr) == 0)
169 return 0;
170 }
171
172 return ENODEV;
173 }
174
175 static int atp_probe1(struct device *dev, short ioaddr)
176 {
177 int saved_ctrl_reg, status;
178
179 outb(0xff, ioaddr + PAR_DATA);
180
181
182 saved_ctrl_reg = inb(ioaddr + PAR_CONTROL);
183
184 outb(0x04, ioaddr + PAR_CONTROL);
185 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
186 eeprom_delay(2048);
187 status = read_nibble(ioaddr, CMR1);
188
189 if ((status & 0x78) != 0x08) {
190
191 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
192 return 1;
193 }
194 status = read_nibble(ioaddr, CMR2_h);
195 if ((status & 0x78) != 0x10) {
196 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
197 return 1;
198 }
199
200 write_reg_byte(ioaddr, CMR2, 0x01);
201 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
202
203
204 if (ioaddr == 0x378)
205 dev->irq = 7;
206 else
207 dev->irq = 5;
208 write_reg_high(ioaddr, CMR1, CMR1h_TxRxOFF);
209 write_reg(ioaddr, CMR2, CMR2_NULL);
210
211 dev->base_addr = ioaddr;
212
213
214 get_node_ID(dev);
215
216 printk("%s: Pocket adapter found at %#3lx, IRQ %d, SAPROM "
217 "%02X:%02X:%02X:%02X:%02X:%02X.\n", dev->name, dev->base_addr,
218 dev->irq, dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
219 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
220
221
222 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
223
224 if (net_debug)
225 printk(version);
226
227
228 ether_setup(dev);
229 dev->priv = kmalloc(sizeof(struct net_local), GFP_KERNEL);
230 if (dev->priv == NULL)
231 return -ENOMEM;
232 memset(dev->priv, 0, sizeof(struct net_local));
233
234
235 {
236 struct net_local *lp = (struct net_local *)dev->priv;
237 lp->addr_mode = CMR2h_Normal;
238 }
239
240
241 dev->if_port = (dev->mem_start & 0xf) ? dev->mem_start & 0x7 : 4;
242 if (dev->mem_end & 0xf)
243 net_debug = dev->mem_end & 7;
244
245 dev->open = net_open;
246 dev->stop = net_close;
247 dev->hard_start_xmit = net_send_packet;
248 dev->get_stats = net_get_stats;
249 dev->set_multicast_list = &set_multicast_list;
250
251 #ifdef TIMED_CHECKER
252 del_timer(&atp_timer);
253 atp_timer.expires = jiffies + TIMED_CHECKER;
254 atp_timed_dev = dev;
255 add_timer(&atp_timer);
256 #endif
257 return 0;
258 }
259
260
261 static void get_node_ID(struct device *dev)
262 {
263 short ioaddr = dev->base_addr;
264 int sa_offset = 0;
265 int i;
266
267 write_reg(ioaddr, CMR2, CMR2_EEPROM);
268
269
270
271 if (eeprom_op(ioaddr, EE_READ(0)) == 0xffff)
272 sa_offset = 15;
273
274 for (i = 0; i < 3; i++)
275 ((unsigned short *)dev->dev_addr)[i] =
276 ntohs(eeprom_op(ioaddr, EE_READ(sa_offset + i)));
277
278 write_reg(ioaddr, CMR2, CMR2_NULL);
279 }
280
281
282
283
284
285
286
287
288
289
290
291
292
293 static unsigned short eeprom_op(short ioaddr, unsigned int cmd)
294 {
295 unsigned eedata_out = 0;
296 int num_bits = EE_CMD_SIZE;
297
298 while (--num_bits >= 0) {
299 char outval = test_bit(num_bits, &cmd) ? EE_DATA_WRITE : 0;
300 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_LOW);
301 eeprom_delay(5);
302 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_HIGH);
303 eedata_out <<= 1;
304 if (read_nibble(ioaddr, PROM_DATA) & EE_DATA_READ)
305 eedata_out++;
306 eeprom_delay(5);
307 }
308 write_reg_high(ioaddr, PROM_CMD, EE_CLK_LOW & ~EE_CS);
309 return eedata_out;
310 }
311
312
313
314
315
316
317
318
319
320
321
322
323 static int net_open(struct device *dev)
324 {
325
326
327
328
329 if (irq2dev_map[dev->irq] != 0
330 || (irq2dev_map[dev->irq] = dev) == 0
331 || request_irq(dev->irq, &net_interrupt, 0, "ATP")) {
332 return -EAGAIN;
333 }
334
335 hardware_init(dev);
336 dev->start = 1;
337 return 0;
338 }
339
340
341
342 static void hardware_init(struct device *dev)
343 {
344 struct net_local *lp = (struct net_local *)dev->priv;
345 int ioaddr = dev->base_addr;
346 int i;
347
348 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
349
350 for (i = 0; i < 6; i++)
351 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
352
353 write_reg_high(ioaddr, CMR2, lp->addr_mode);
354
355 if (net_debug > 2) {
356 printk("%s: Reset: current Rx mode %d.\n", dev->name,
357 (read_nibble(ioaddr, CMR2_h) >> 3) & 0x0f);
358 }
359
360 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
361 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
362
363
364 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
365
366
367 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
368 write_reg_high(ioaddr, IMR, ISRh_RxErr);
369
370 lp->tx_unit_busy = 0;
371 lp->pac_cnt_in_tx_buf = 0;
372 lp->saved_tx_size = 0;
373
374 dev->tbusy = 0;
375 dev->interrupt = 0;
376 }
377
378 static void trigger_send(short ioaddr, int length)
379 {
380 write_reg_byte(ioaddr, TxCNT0, length & 0xff);
381 write_reg(ioaddr, TxCNT1, length >> 8);
382 write_reg(ioaddr, CMR1, CMR1_Xmit);
383 }
384
385 static void write_packet(short ioaddr, int length, unsigned char *packet, int data_mode)
386 {
387 length = (length + 1) & ~1;
388 outb(EOC+MAR, ioaddr + PAR_DATA);
389 if ((data_mode & 1) == 0) {
390
391 outb(WrAddr+MAR, ioaddr + PAR_DATA);
392 do {
393 write_byte_mode0(ioaddr, *packet++);
394 } while (--length > 0) ;
395 } else {
396
397 unsigned char outbyte = *packet++;
398
399 outb(Ctrl_LNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
400 outb(WrAddr+MAR, ioaddr + PAR_DATA);
401
402 outb((outbyte & 0x0f)|0x40, ioaddr + PAR_DATA);
403 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
404 outbyte >>= 4;
405 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
406 outb(Ctrl_HNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
407 while (--length > 0)
408 write_byte_mode1(ioaddr, *packet++);
409 }
410
411 outb(0xff, ioaddr + PAR_DATA);
412 outb(Ctrl_HNibWrite | Ctrl_SelData | Ctrl_IRQEN, ioaddr + PAR_CONTROL);
413 }
414
415 static int
416 net_send_packet(struct sk_buff *skb, struct device *dev)
417 {
418 struct net_local *lp = (struct net_local *)dev->priv;
419 int ioaddr = dev->base_addr;
420
421 if (dev->tbusy) {
422
423
424 int tickssofar = jiffies - dev->trans_start;
425 if (tickssofar < 5)
426 return 1;
427 printk("%s: transmit timed out, %s?\n", dev->name,
428 inb(ioaddr + PAR_CONTROL) & 0x10 ? "network cable problem"
429 : "IRQ conflict");
430 lp->stats.tx_errors++;
431
432 hardware_init(dev);
433 dev->tbusy=0;
434 dev->trans_start = jiffies;
435 }
436
437
438
439
440 if (skb == NULL) {
441 dev_tint(dev);
442 return 0;
443 }
444
445
446
447 if (set_bit(0, (void*)&dev->tbusy) != 0)
448 printk("%s: Transmitter access conflict.\n", dev->name);
449 else {
450 short length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
451 unsigned char *buf = skb->data;
452 int flags;
453
454
455
456 save_flags(flags);
457 cli();
458 write_reg(ioaddr, IMR, 0);
459 write_reg_high(ioaddr, IMR, 0);
460 restore_flags(flags);
461
462 write_packet(ioaddr, length, buf, dev->if_port);
463
464 lp->pac_cnt_in_tx_buf++;
465 if (lp->tx_unit_busy == 0) {
466 trigger_send(ioaddr, length);
467 lp->saved_tx_size = 0;
468 lp->re_tx = 0;
469 lp->tx_unit_busy = 1;
470 } else
471 lp->saved_tx_size = length;
472
473 dev->trans_start = jiffies;
474
475 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
476 write_reg_high(ioaddr, IMR, ISRh_RxErr);
477 }
478
479 dev_kfree_skb (skb, FREE_WRITE);
480
481 return 0;
482 }
483
484
485
486 static void
487 net_interrupt(int irq, struct pt_regs * regs)
488 {
489 struct device *dev = (struct device *)(irq2dev_map[irq]);
490 struct net_local *lp;
491 int ioaddr, status, boguscount = 20;
492 static int num_tx_since_rx = 0;
493
494 if (dev == NULL) {
495 printk ("ATP_interrupt(): irq %d for unknown device.\n", irq);
496 return;
497 }
498 dev->interrupt = 1;
499
500 ioaddr = dev->base_addr;
501 lp = (struct net_local *)dev->priv;
502
503
504 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
505
506
507 write_reg(ioaddr, CMR2, CMR2_NULL);
508 write_reg(ioaddr, IMR, 0);
509
510 if (net_debug > 5) printk("%s: In interrupt ", dev->name);
511 while (--boguscount > 0) {
512 status = read_nibble(ioaddr, ISR);
513 if (net_debug > 5) printk("loop status %02x..", status);
514
515 if (status & (ISR_RxOK<<3)) {
516 write_reg(ioaddr, ISR, ISR_RxOK);
517 do {
518 int read_status = read_nibble(ioaddr, CMR1);
519 if (net_debug > 6)
520 printk("handling Rx packet %02x..", read_status);
521
522
523 if (read_status & (CMR1_IRQ << 3)) {
524 lp->stats.rx_over_errors++;
525
526 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
527 net_rx(dev);
528
529 write_reg_high(ioaddr, ISR, ISRh_RxErr);
530 write_reg_high(ioaddr, CMR2, lp->addr_mode);
531 } else if ((read_status & (CMR1_BufEnb << 3)) == 0) {
532 net_rx(dev);
533 dev->last_rx = jiffies;
534 num_tx_since_rx = 0;
535 } else
536 break;
537 } while (--boguscount > 0);
538 } else if (status & ((ISR_TxErr + ISR_TxOK)<<3)) {
539 if (net_debug > 6) printk("handling Tx done..");
540
541
542 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK);
543 if (status & (ISR_TxErr<<3)) {
544 lp->stats.collisions++;
545 if (++lp->re_tx > 15) {
546 lp->stats.tx_aborted_errors++;
547 hardware_init(dev);
548 break;
549 }
550
551 if (net_debug > 6) printk("attempting to ReTx");
552 write_reg(ioaddr, CMR1, CMR1_ReXmit + CMR1_Xmit);
553 } else {
554
555 lp->stats.tx_packets++;
556 lp->pac_cnt_in_tx_buf--;
557 if ( lp->saved_tx_size) {
558 trigger_send(ioaddr, lp->saved_tx_size);
559 lp->saved_tx_size = 0;
560 lp->re_tx = 0;
561 } else
562 lp->tx_unit_busy = 0;
563 dev->tbusy = 0;
564 mark_bh(NET_BH);
565 }
566 num_tx_since_rx++;
567 } else if (num_tx_since_rx > 8
568 && jiffies > dev->last_rx + 100) {
569 if (net_debug > 2)
570 printk("%s: Missed packet? No Rx after %d Tx and %ld jiffies"
571 " status %02x CMR1 %02x.\n", dev->name,
572 num_tx_since_rx, jiffies - dev->last_rx, status,
573 (read_nibble(ioaddr, CMR1) >> 3) & 15);
574 lp->stats.rx_missed_errors++;
575 hardware_init(dev);
576 num_tx_since_rx = 0;
577 break;
578 } else
579 break;
580 }
581
582
583
584 {
585 int i;
586 for (i = 0; i < 6; i++)
587 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
588 #ifdef TIMED_CHECKER
589 del_timer(&atp_timer);
590 atp_timer.expires = jiffies + TIMED_CHECKER;
591 add_timer(&atp_timer);
592 #endif
593 }
594
595
596 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
597
598 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
599
600 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
601 write_reg_high(ioaddr, IMR, ISRh_RxErr);
602
603 if (net_debug > 5) printk("exiting interrupt.\n");
604
605 dev->interrupt = 0;
606
607 return;
608 }
609
610 #ifdef TIMED_CHECKER
611
612
613 static void atp_timed_checker(unsigned long ignored)
614 {
615 int i;
616 int ioaddr = atp_timed_dev->base_addr;
617
618 if (!atp_timed_dev->interrupt)
619 {
620 for (i = 0; i < 6; i++)
621 #if 0
622 if (read_cmd_byte(ioaddr, PAR0 + i) != atp_timed_dev->dev_addr[i])
623 {
624 struct net_local *lp = (struct net_local *)atp_timed_dev->priv;
625 write_reg_byte(ioaddr, PAR0 + i, atp_timed_dev->dev_addr[i]);
626 if (i == 2)
627 lp->stats.tx_errors++;
628 else if (i == 3)
629 lp->stats.tx_dropped++;
630 else if (i == 4)
631 lp->stats.collisions++;
632 else
633 lp->stats.rx_errors++;
634 }
635 #else
636 write_reg_byte(ioaddr, PAR0 + i, atp_timed_dev->dev_addr[i]);
637 #endif
638 }
639 del_timer(&atp_timer);
640 atp_timer.expires = jiffies + TIMED_CHECKER;
641 add_timer(&atp_timer);
642 }
643 #endif
644
645
646 static void net_rx(struct device *dev)
647 {
648 struct net_local *lp = (struct net_local *)dev->priv;
649 int ioaddr = dev->base_addr;
650 #ifdef notdef
651 ushort header[4];
652 #else
653 struct rx_header rx_head;
654 #endif
655
656
657 outb(EOC+MAR, ioaddr + PAR_DATA);
658 read_block(ioaddr, 8, (unsigned char*)&rx_head, dev->if_port);
659 if (net_debug > 5)
660 printk(" rx_count %04x %04x %04x %04x..", rx_head.pad,
661 rx_head.rx_count, rx_head.rx_status, rx_head.cur_addr);
662 if ((rx_head.rx_status & 0x77) != 0x01) {
663 lp->stats.rx_errors++;
664
665
666 if (net_debug > 3) printk("%s: Unknown ATP Rx error %04x.\n",
667 dev->name, rx_head.rx_status);
668 hardware_init(dev);
669 return;
670 } else {
671
672 int pkt_len = (rx_head.rx_count & 0x7ff) - 4;
673 struct sk_buff *skb;
674
675 skb = dev_alloc_skb(pkt_len);
676 if (skb == NULL) {
677 printk("%s: Memory squeeze, dropping packet.\n", dev->name);
678 lp->stats.rx_dropped++;
679 goto done;
680 }
681 skb->dev = dev;
682
683 read_block(ioaddr, pkt_len, skb_put(skb,pkt_len), dev->if_port);
684
685 if (net_debug > 6) {
686 unsigned char *data = skb->data;
687 printk(" data %02x%02x%02x %02x%02x%02x %02x%02x%02x"
688 "%02x%02x%02x %02x%02x..",
689 data[0], data[1], data[2], data[3], data[4], data[5],
690 data[6], data[7], data[8], data[9], data[10], data[11],
691 data[12], data[13]);
692 }
693
694 skb->protocol=eth_type_trans(skb,dev);
695 netif_rx(skb);
696 lp->stats.rx_packets++;
697 }
698 done:
699 write_reg(ioaddr, CMR1, CMR1_NextPkt);
700 return;
701 }
702
703 static void read_block(short ioaddr, int length, unsigned char *p, int data_mode)
704 {
705
706 if (data_mode <= 3) {
707 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL);
708 outb(length == 8 ? RdAddr | HNib | MAR : RdAddr | MAR,
709 ioaddr + PAR_DATA);
710 if (data_mode <= 1) {
711 do *p++ = read_byte_mode0(ioaddr); while (--length > 0);
712 } else
713 do *p++ = read_byte_mode2(ioaddr); while (--length > 0);
714 } else if (data_mode <= 5)
715 do *p++ = read_byte_mode4(ioaddr); while (--length > 0);
716 else
717 do *p++ = read_byte_mode6(ioaddr); while (--length > 0);
718
719 outb(EOC+HNib+MAR, ioaddr + PAR_DATA);
720 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
721 }
722
723
724 static int
725 net_close(struct device *dev)
726 {
727 struct net_local *lp = (struct net_local *)dev->priv;
728 int ioaddr = dev->base_addr;
729
730 dev->tbusy = 1;
731 dev->start = 0;
732
733
734 lp->addr_mode = CMR2h_OFF;
735 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
736
737
738 outb(0x00, ioaddr + PAR_CONTROL);
739 free_irq(dev->irq);
740 irq2dev_map[dev->irq] = 0;
741
742
743 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
744
745 return 0;
746 }
747
748
749
750 static struct enet_statistics *
751 net_get_stats(struct device *dev)
752 {
753 struct net_local *lp = (struct net_local *)dev->priv;
754 return &lp->stats;
755 }
756
757
758
759
760
761 static void set_multicast_list(struct device *dev)
762 {
763 struct net_local *lp = (struct net_local *)dev->priv;
764 short ioaddr = dev->base_addr;
765 int num_addrs=dev->mc_list;
766
767 if(dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
768 num_addrs=1;
769
770
771
772
773
774 if(num_addrs)
775 dev->flags|=IFF_PROMISC;
776 lp->addr_mode = num_addrs ? CMR2h_PROMISC : CMR2h_Normal;
777 write_reg_high(ioaddr, CMR2, lp->addr_mode);
778 }
779
780
781
782
783
784
785
786
787