This source file includes following definitions.
- wavelan_splhi
- wavelan_splx
- hasr_read
- hacr_write
- hacr_write_slow
- set_chan_attn
- wavelan_reset
- wavelan_16_off
- wavelan_16_on
- wavelan_ints_off
- wavelan_ints_on
- psa_read
- psa_write
- obram_read
- obram_write
- mmc_read
- mmc_write
- wavelan_unmap_irq
- wavelan_map_irq
- wavelan_mmc_init
- wavelan_ack
- wavelan_synchronous_cmd
- wavelan_hardware_reset
- wavelan_struct_check
- wavelan_probe
- wavelan_probe1
- wavelan_ru_start
- wavelan_cu_start
- wavelan_open
- hardware_send_packet
- wavelan_send_packet
- addrcmp
- wavelan_receive
- wavelan_complete
- wavelan_watchdog
- wavelan_interrupt
- wavelan_close
- wavelan_get_stats
- wavelan_set_multicast_list
- sprintf_stats
- wavelan_get_info
- init_module
- cleanup_module
- wavelan_cu_show_one
- wavelan_psa_show
- wavelan_mmc_show
- wavelan_scb_show
- wavelan_ru_show
- wavelan_cu_show
- wavelan_dev_show
- wavelan_local_show
1
2
3
4
5
6
7 #include <linux/module.h>
8
9 #include <linux/kernel.h>
10 #include <linux/sched.h>
11 #include <linux/types.h>
12 #include <linux/fcntl.h>
13 #include <linux/interrupt.h>
14 #include <linux/stat.h>
15 #include <linux/ptrace.h>
16 #include <linux/ioport.h>
17 #include <linux/in.h>
18 #include <linux/string.h>
19 #include <linux/delay.h>
20 #include <asm/system.h>
21 #include <asm/bitops.h>
22 #include <asm/io.h>
23 #include <asm/dma.h>
24 #include <linux/errno.h>
25 #include <linux/netdevice.h>
26 #include <linux/etherdevice.h>
27 #include <linux/skbuff.h>
28 #include <linux/malloc.h>
29 #include <linux/timer.h>
30 #include <linux/proc_fs.h>
31 #define STRUCT_CHECK 1
32 #include "i82586.h"
33 #include "wavelan.h"
34
35 #ifndef WAVELAN_DEBUG
36 #define WAVELAN_DEBUG 0
37 #endif
38
39 #define WATCHDOG_JIFFIES 512
40 #define ENABLE_FULL_PROMISCUOUS 0x10000
41
42 #define nels(a) (sizeof(a) / sizeof(a[0]))
43
44 typedef struct device device;
45 typedef struct enet_statistics en_stats;
46 typedef struct net_local net_local;
47 typedef struct timer_list timer_list;
48
49 struct net_local
50 {
51 en_stats stats;
52 unsigned int tx_n_in_use;
53 unsigned char nwid[2];
54 unsigned short hacr;
55 unsigned short rx_head;
56 unsigned short rx_last;
57 unsigned short tx_first_free;
58 unsigned short tx_first_in_use;
59 unsigned int nresets;
60 unsigned int correct_nwid;
61 unsigned int wrong_nwid;
62 unsigned int promiscuous;
63 unsigned int full_promiscuous;
64 timer_list watchdog;
65 device *dev;
66 net_local *prev;
67 net_local *next;
68 };
69
70 extern int wavelan_probe(device *);
71
72 static const char *version = "wavelan.c:v7 95/4/8\n";
73
74
75
76
77 static int wavelan_probe1(device *, unsigned short);
78 static int wavelan_open(device *);
79 static int wavelan_send_packet(struct sk_buff *, device *);
80 static void wavelan_interrupt(int, struct pt_regs *);
81 static int wavelan_close(device *);
82 static en_stats *wavelan_get_stats(device *);
83 static void wavelan_set_multicast_list(device *);
84 static int wavelan_get_info(char*, char**, off_t, int, int);
85
86
87
88
89 static void wavelan_cu_show_one(device *, net_local *, int, unsigned short);
90 static void wavelan_cu_start(device *);
91 static void wavelan_ru_start(device *);
92 static void wavelan_watchdog(unsigned long);
93 #if 0
94 static void wavelan_psa_show(psa_t *);
95 static void wavelan_mmc_show(unsigned short);
96 #endif
97 static void wavelan_scb_show(unsigned short);
98 static void wavelan_ru_show(device *);
99 static void wavelan_cu_show(device *);
100 static void wavelan_dev_show(device *);
101 static void wavelan_local_show(device *);
102
103 static unsigned int wavelan_debug = WAVELAN_DEBUG;
104 static net_local *first_wavelan = (net_local *)0;
105
106 static
107 unsigned long
108 wavelan_splhi(void)
109 {
110 unsigned long flags;
111
112 save_flags(flags);
113 cli();
114
115 return flags;
116 }
117
118 static
119 void
120 wavelan_splx(unsigned long flags)
121 {
122 restore_flags(flags);
123 }
124
125 static
126 unsigned short
127 hasr_read(unsigned short ioaddr)
128 {
129 return inw(HASR(ioaddr));
130 }
131
132 static
133 void
134 hacr_write(unsigned short ioaddr, int hacr)
135 {
136 outw(hacr, HACR(ioaddr));
137 }
138
139 static
140 void
141 hacr_write_slow(unsigned short ioaddr, int hacr)
142 {
143 hacr_write(ioaddr, hacr);
144
145 udelay(1000);
146 }
147
148
149
150
151 static
152 void
153 set_chan_attn(unsigned short ioaddr, unsigned short current_hacr)
154 {
155 hacr_write(ioaddr, current_hacr | HACR_CA);
156 }
157
158
159
160
161 static
162 void
163 wavelan_reset(unsigned short ioaddr)
164 {
165 hacr_write_slow(ioaddr, HACR_RESET);
166 hacr_write(ioaddr, HACR_DEFAULT);
167 }
168
169 static
170 void
171 wavelan_16_off(unsigned short ioaddr, unsigned short hacr)
172 {
173 hacr &= ~HACR_16BITS;
174
175 hacr_write(ioaddr, hacr);
176 }
177
178 static
179 void
180 wavelan_16_on(unsigned short ioaddr, unsigned short hacr)
181 {
182 hacr |= HACR_16BITS;
183
184 hacr_write(ioaddr, hacr);
185 }
186
187 static
188 void
189 wavelan_ints_off(device *dev)
190 {
191 unsigned short ioaddr;
192 net_local *lp;
193 unsigned long x;
194
195 ioaddr = dev->base_addr;
196 lp = (net_local *)dev->priv;
197
198 x = wavelan_splhi();
199
200 lp->hacr &= ~HACR_INTRON;
201 hacr_write(ioaddr, lp->hacr);
202
203 wavelan_splx(x);
204 }
205
206 static
207 void
208 wavelan_ints_on(device *dev)
209 {
210 unsigned short ioaddr;
211 net_local *lp;
212 unsigned long x;
213
214 ioaddr = dev->base_addr;
215 lp = (net_local *)dev->priv;
216
217 x = wavelan_splhi();
218
219 lp->hacr |= HACR_INTRON;
220 hacr_write(ioaddr, lp->hacr);
221
222 wavelan_splx(x);
223 }
224
225
226
227
228 static
229 void
230 psa_read(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
231 {
232 wavelan_16_off(ioaddr, hacr);
233
234 while (n-- > 0)
235 {
236 outw(o, PIOR2(ioaddr));
237 o++;
238 *b++ = inb(PIOP2(ioaddr));
239 }
240
241 wavelan_16_on(ioaddr, hacr);
242 }
243
244 #if defined(IRQ_SET_WORKS)
245
246
247
248 static
249 void
250 psa_write(unsigned short ioaddr, unsigned short hacr, int o, unsigned char *b, int n)
251 {
252 wavelan_16_off(ioaddr, hacr);
253
254 while (n-- > 0)
255 {
256 outw(o, PIOR2(ioaddr));
257 o++;
258 outb(*b, PIOP2(ioaddr));
259 b++;
260 }
261
262 wavelan_16_on(ioaddr, hacr);
263 }
264 #endif
265
266
267
268
269 static
270 void
271 obram_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
272 {
273 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
274
275 outw(o, PIOR1(ioaddr));
276
277 insw(PIOP1(ioaddr), (unsigned short *)b, n);
278 }
279
280
281
282
283 static
284 void
285 obram_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
286 {
287 n = (n + 1) / (sizeof(unsigned short) / sizeof(unsigned char));
288
289 outw(o, PIOR1(ioaddr));
290
291 outsw(PIOP1(ioaddr), (unsigned short *)b, n);
292 }
293
294
295
296
297 static
298 void
299 mmc_read(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
300 {
301 while (n-- > 0)
302 {
303 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
304 ;
305
306 outw(o << 1, MMCR(ioaddr));
307 o++;
308
309 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
310 ;
311
312 *b++ = (unsigned char)(inw(MMCR(ioaddr)) >> 8);
313 }
314 }
315
316
317
318
319 static
320 void
321 mmc_write(unsigned short ioaddr, unsigned short o, unsigned char *b, int n)
322 {
323 while (n-- > 0)
324 {
325 while (inw(HASR(ioaddr)) & HASR_MMC_BUSY)
326 ;
327
328 outw((unsigned short)(((unsigned short)*b << 8) | (o << 1) | 1), MMCR(ioaddr));
329 b++;
330 o++;
331 }
332 }
333
334 static int irqvals[] =
335 {
336 0, 0, 0, 0x01,
337 0x02, 0x04, 0, 0x08,
338 0, 0, 0x10, 0x20,
339 0x40, 0, 0, 0x80,
340 };
341
342 #if defined(IRQ_SET_WORKS)
343 static
344 int
345 wavelan_unmap_irq(int irq, unsigned char *irqval)
346 {
347 if (irq < 0 || irq >= nels(irqvals) || irqvals[irq] == 0)
348 return -1;
349
350 *irqval = (unsigned char)irqvals[irq];
351
352 return 0;
353 }
354 #endif
355
356
357
358
359 static
360 int
361 wavelan_map_irq(unsigned char irqval)
362 {
363 int irq;
364
365 for (irq = 0; irq < nels(irqvals); irq++)
366 {
367 if (irqvals[irq] == (int)irqval)
368 return irq;
369 }
370
371 return -1;
372 }
373
374
375
376
377 static
378 void
379 wavelan_mmc_init(device *dev, psa_t *psa)
380 {
381 unsigned short ioaddr;
382 net_local *lp;
383 mmw_t m;
384 int configured;
385
386 ioaddr = dev->base_addr;
387 lp = (net_local *)dev->priv;
388 memset(&m, 0x00, sizeof(m));
389
390
391
392
393
394
395
396
397
398 configured = 0;
399
400
401
402
403
404 m.mmw_jabber_enable = 0x01;
405 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
406 m.mmw_ifs = 0x20;
407 m.mmw_mod_delay = 0x04;
408 m.mmw_jam_time = 0x38;
409
410 m.mmw_encr_enable = 0;
411 m.mmw_des_io_invert = 0;
412 m.mmw_freeze = 0;
413 m.mmw_decay_prm = 0;
414 m.mmw_decay_updat_prm = 0;
415
416 if (configured)
417 {
418
419
420
421 if (psa->psa_undefined & 1)
422 m.mmw_loopt_sel = 0x00;
423 else
424 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
425
426 m.mmw_thr_pre_set = psa->psa_thr_pre_set & 0x3F;
427 m.mmw_quality_thr = psa->psa_quality_thr & 0x0F;
428 }
429 else
430 {
431 if (lp->promiscuous && lp->full_promiscuous)
432 m.mmw_loopt_sel = MMW_LOOPT_SEL_UNDEFINED;
433 else
434 m.mmw_loopt_sel = 0x00;
435
436
437
438
439
440 if (psa->psa_comp_number & 1)
441 m.mmw_thr_pre_set = 0x01;
442 else
443 m.mmw_thr_pre_set = 0x04;
444
445 m.mmw_quality_thr = 0x03;
446 }
447
448 m.mmw_netw_id_l = lp->nwid[1];
449 m.mmw_netw_id_h = lp->nwid[0];
450
451 mmc_write(ioaddr, 0, (unsigned char *)&m, sizeof(m));
452 }
453
454 static
455 void
456 wavelan_ack(device *dev)
457 {
458 unsigned short ioaddr;
459 net_local *lp;
460 unsigned short scb_cs;
461 int i;
462
463 ioaddr = dev->base_addr;
464 lp = (net_local *)dev->priv;
465
466 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
467 scb_cs &= SCB_ST_INT;
468
469 if (scb_cs == 0)
470 return;
471
472 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
473
474 set_chan_attn(ioaddr, lp->hacr);
475
476 for (i = 1000; i > 0; i--)
477 {
478 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
479 if (scb_cs == 0)
480 break;
481
482 udelay(1000);
483 }
484
485 if (i <= 0)
486 printk("%s: wavelan_ack(): board not accepting command.\n", dev->name);
487 }
488
489
490
491
492
493 static
494 int
495 wavelan_synchronous_cmd(device *dev, const char *str)
496 {
497 unsigned short ioaddr;
498 net_local *lp;
499 unsigned short scb_cmd;
500 ach_t cb;
501 int i;
502
503 ioaddr = dev->base_addr;
504 lp = (net_local *)dev->priv;
505
506 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
507 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
508
509 set_chan_attn(ioaddr, lp->hacr);
510
511 for (i = 64; i > 0; i--)
512 {
513 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
514 if (cb.ac_status & AC_SFLD_C)
515 break;
516
517 udelay(1000);
518 }
519
520 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK))
521 {
522 printk("%s: %s failed; status = 0x%x\n", dev->name, str, cb.ac_status);
523 wavelan_scb_show(ioaddr);
524 return -1;
525 }
526
527 wavelan_ack(dev);
528
529 return 0;
530 }
531
532 static
533 int
534 wavelan_hardware_reset(device *dev)
535 {
536 unsigned short ioaddr;
537 psa_t psa;
538 net_local *lp;
539 scp_t scp;
540 iscp_t iscp;
541 scb_t scb;
542 ach_t cb;
543 int i;
544 ac_cfg_t cfg;
545 ac_ias_t ias;
546
547 if (wavelan_debug > 0)
548 printk("%s: ->wavelan_hardware_reset(dev=0x%x)\n", dev->name, (unsigned int)dev);
549
550 ioaddr = dev->base_addr;
551 lp = (net_local *)dev->priv;
552
553 lp->nresets++;
554
555 wavelan_reset(ioaddr);
556 lp->hacr = HACR_DEFAULT;
557
558
559
560
561 {
562 unsigned char zeroes[512];
563
564 memset(&zeroes[0], 0x00, sizeof(zeroes));
565
566 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
567 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
568 }
569
570 psa_read(ioaddr, lp->hacr, 0, (unsigned char *)&psa, sizeof(psa));
571
572 wavelan_mmc_init(dev, &psa);
573
574
575
576
577
578 memset(&scp, 0x00, sizeof(scp));
579 scp.scp_sysbus = SCP_SY_16BBUS;
580 scp.scp_iscpl = OFFSET_ISCP;
581 obram_write(ioaddr, OFFSET_SCP, (unsigned char *)&scp, sizeof(scp));
582
583 memset(&iscp, 0x00, sizeof(iscp));
584 iscp.iscp_busy = 1;
585 iscp.iscp_offset = OFFSET_SCB;
586 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
587
588 memset(&scb, 0x00, sizeof(scb));
589 scb.scb_command = SCB_CMD_RESET;
590 scb.scb_cbl_offset = OFFSET_CU;
591 scb.scb_rfa_offset = OFFSET_RU;
592 obram_write(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
593
594 set_chan_attn(ioaddr, lp->hacr);
595
596 for (i = 1000; i > 0; i--)
597 {
598 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *)&iscp, sizeof(iscp));
599
600 if (iscp.iscp_busy == (unsigned short)0)
601 break;
602
603 udelay(1000);
604 }
605
606 if (i <= 0)
607 {
608 printk("%s: wavelan_hardware_reset(): iscp_busy timeout.\n", dev->name);
609 if (wavelan_debug > 0)
610 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
611 return -1;
612 }
613
614 for (i = 15; i > 0; i--)
615 {
616 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
617
618 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
619 break;
620
621 udelay(1000);
622 }
623
624 if (i <= 0)
625 {
626 printk("%s: wavelan_hardware_reset(): status: expected 0x%02x, got 0x%02x.\n", dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
627 if (wavelan_debug > 0)
628 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
629 return -1;
630 }
631
632 wavelan_ack(dev);
633
634 memset(&cb, 0x00, sizeof(cb));
635 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
636 cb.ac_link = OFFSET_CU;
637 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
638
639 if (wavelan_synchronous_cmd(dev, "diag()") == -1)
640 {
641 if (wavelan_debug > 0)
642 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
643 return -1;
644 }
645
646 obram_read(ioaddr, OFFSET_CU, (unsigned char *)&cb, sizeof(cb));
647 if (cb.ac_status & AC_SFLD_FAIL)
648 {
649 printk("%s: wavelan_hardware_reset(): i82586 Self Test failed.\n", dev->name);
650 if (wavelan_debug > 0)
651 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
652 return -1;
653 }
654
655 memset(&cfg, 0x00, sizeof(cfg));
656
657 #if 0
658
659
660
661 cfg.fifolim_bytecnt = 0x080c;
662 cfg.addrlen_mode = 0x2600;
663 cfg.linprio_interframe = 0x7820;
664 cfg.slot_time = 0xf00c;
665 cfg.hardware = 0x0008;
666 cfg.min_frame_len = 0x0040;
667 #endif
668
669
670
671
672
673
674 cfg.cfg_byte_cnt = AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
675 cfg.cfg_fifolim = AC_CFG_FIFOLIM(8);
676 cfg.cfg_byte8 = AC_CFG_SAV_BF(0) |
677 AC_CFG_SRDY(0);
678 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
679 AC_CFG_ILPBCK(0) |
680 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
681 AC_CFG_ALOC(1) |
682 AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
683 cfg.cfg_byte10 = AC_CFG_BOFMET(0) |
684 AC_CFG_ACR(0) |
685 AC_CFG_LINPRIO(0);
686 cfg.cfg_ifs = 32;
687 cfg.cfg_slotl = 0;
688 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) |
689 AC_CFG_SLTTMHI(2);
690 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
691 AC_CFG_BTSTF(0) |
692 AC_CFG_CRC16(0) |
693 AC_CFG_NCRC(0) |
694 AC_CFG_TNCRS(1) |
695 AC_CFG_MANCH(0) |
696 AC_CFG_BCDIS(0) |
697 AC_CFG_PRM(lp->promiscuous);
698 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
699 AC_CFG_CDTF(0) |
700 AC_CFG_ICSS(0) |
701 AC_CFG_CSTF(0);
702
703
704
705 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
706
707 cfg.cfg_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_configure);
708 cfg.cfg_h.ac_link = OFFSET_CU;
709 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&cfg, sizeof(cfg));
710
711 if (wavelan_synchronous_cmd(dev, "reset()-configure") == -1)
712 {
713 if (wavelan_debug > 0)
714 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
715
716 return -1;
717 }
718
719 memset(&ias, 0x00, sizeof(ias));
720 ias.ias_h.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_ia_setup);
721 ias.ias_h.ac_link = OFFSET_CU;
722 memcpy(&ias.ias_addr[0], (unsigned char *)&dev->dev_addr[0], sizeof(ias.ias_addr));
723 obram_write(ioaddr, OFFSET_CU, (unsigned char *)&ias, sizeof(ias));
724
725 if (wavelan_synchronous_cmd(dev, "reset()-address") == -1)
726 {
727 if (wavelan_debug > 0)
728 printk("%s: <-wavelan_hardware_reset(): -1\n", dev->name);
729
730 return -1;
731 }
732
733 wavelan_ints_on(dev);
734
735 if (wavelan_debug > 4)
736 wavelan_scb_show(ioaddr);
737
738 wavelan_ru_start(dev);
739 wavelan_cu_start(dev);
740
741 if (wavelan_debug > 0)
742 printk("%s: <-wavelan_hardware_reset(): 0\n", dev->name);
743
744 return 0;
745 }
746
747 #if STRUCT_CHECK == 1
748
749 static
750 const char *
751 wavelan_struct_check(void)
752 {
753 #define SC(t,s,n) if (sizeof(t) != s) return n
754 SC(psa_t, PSA_SIZE, "psa_t");
755 SC(mmw_t, MMW_SIZE, "mmw_t");
756 SC(mmr_t, MMR_SIZE, "mmr_t");
757 SC(ha_t, HA_SIZE, "ha_t");
758 #undef SC
759
760 return (char *)0;
761 }
762
763 #endif
764
765
766
767
768
769
770
771
772 int
773 wavelan_probe(device *dev)
774 {
775 int i;
776 int r;
777 short base_addr;
778 static unsigned short iobase[] =
779 {
780 #if 0
781 Leave out 0x3C0 for now -- seems to clash
782 with some video controllers.
783 Leave out the others too -- we will always
784 use 0x390 and leave 0x300 for the Ethernet device.
785 0x300, 0x390, 0x3E0, 0x3C0,
786 #endif
787 0x390,
788 };
789
790 if (wavelan_debug > 0)
791 printk("%s: ->wavelan_probe(dev=0x%x (base_addr=0x%x))\n", dev->name, (unsigned int)dev, (unsigned int)dev->base_addr);
792
793 #if STRUCT_CHECK == 1
794 if (wavelan_struct_check() != (char *)0)
795 {
796 printk("%s: structure/compiler botch: \"%s\"\n", dev->name, wavelan_struct_check());
797
798 if (wavelan_debug > 0)
799 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
800
801 return ENODEV;
802 }
803 #endif
804
805 base_addr = dev->base_addr;
806
807 if (base_addr < 0)
808 {
809
810
811
812 if (wavelan_debug > 0)
813 printk("%s: <-wavelan_probe(): ENXIO\n", dev->name);
814 return ENXIO;
815 }
816
817 if (base_addr > 0x100)
818 {
819
820
821
822 r = wavelan_probe1(dev, base_addr);
823 if (wavelan_debug > 0)
824 printk("%s: <-wavelan_probe(): %d\n", dev->name, r);
825 return r;
826 }
827
828 for (i = 0; i < nels(iobase); i++)
829 {
830 if (check_region(iobase[i], sizeof(ha_t)))
831 continue;
832
833 if (wavelan_probe1(dev, iobase[i]) == 0)
834 {
835 if (wavelan_debug > 0)
836 printk("%s: <-wavelan_probe(): 0\n", dev->name);
837 proc_net_register(&(struct proc_dir_entry) {
838 PROC_NET_WAVELAN, 7, "wavelan",
839 S_IFREG | S_IRUGO, 1, 0, 0,
840 0, &proc_net_inode_operations,
841 wavelan_get_info
842 });
843
844 return 0;
845 }
846 }
847
848 if (wavelan_debug > 0)
849 printk("%s: <-wavelan_probe(): ENODEV\n", dev->name);
850
851 return ENODEV;
852 }
853
854 static
855 int
856 wavelan_probe1(device *dev, unsigned short ioaddr)
857 {
858 psa_t psa;
859 int irq;
860 int i;
861 net_local *lp;
862 int enable_full_promiscuous;
863
864 if (wavelan_debug > 0)
865 printk("%s: ->wavelan_probe1(dev=0x%x, ioaddr=0x%x)\n", dev->name, (unsigned int)dev, ioaddr);
866
867 wavelan_reset(ioaddr);
868
869 psa_read(ioaddr, HACR_DEFAULT, 0, (unsigned char *)&psa, sizeof(psa));
870
871
872
873
874
875 if
876 (
877 psa.psa_univ_mac_addr[0] != SA_ADDR0
878 ||
879 psa.psa_univ_mac_addr[1] != SA_ADDR1
880 ||
881 psa.psa_univ_mac_addr[2] != SA_ADDR2
882 )
883 {
884 if (wavelan_debug > 0)
885 printk("%s: <-wavelan_probe1(): ENODEV\n", dev->name);
886 return ENODEV;
887 }
888
889 printk("%s: WaveLAN at %#x,", dev->name, ioaddr);
890
891 if (dev->irq != 0)
892 {
893 printk("[WARNING: explicit IRQ value %d ignored: using PSA value instead]", dev->irq);
894 #if defined(IRQ_SET_WORKS)
895 Leave this out until I can get it to work -- BJ.
896 if (wavelan_unmap_irq(dev->irq, &psa.psa_int_req_no) == -1)
897 {
898 printk(" could not wavelan_unmap_irq(%d, ..) -- ignored.\n", dev->irq);
899 dev->irq = 0;
900 }
901 else
902 {
903 psa_write(ioaddr, HACR_DEFAULT, (char *)&psa.psa_int_req_no - (char *)&psa, (unsigned char *)&psa.psa_int_req_no, sizeof(psa.psa_int_req_no));
904 wavelan_reset(ioaddr);
905 }
906 #endif
907 }
908
909 if ((irq = wavelan_map_irq(psa.psa_int_req_no)) == -1)
910 {
911 printk(" could not wavelan_map_irq(%d).\n", psa.psa_int_req_no);
912 if (wavelan_debug > 0)
913 printk("%s: <-wavelan_probe1(): EAGAIN\n", dev->name);
914 return EAGAIN;
915 }
916
917 dev->irq = irq;
918
919 request_region(ioaddr, sizeof(ha_t), "wavelan");
920 dev->base_addr = ioaddr;
921
922
923
924
925
926
927
928
929
930
931
932
933 enable_full_promiscuous = (dev->mem_start & ENABLE_FULL_PROMISCUOUS) == ENABLE_FULL_PROMISCUOUS;
934 dev->mem_start &= ~ENABLE_FULL_PROMISCUOUS;
935
936 if (dev->mem_start != 0)
937 {
938 psa.psa_nwid[0] = (dev->mem_start >> 8) & 0xFF;
939 psa.psa_nwid[1] = (dev->mem_start >> 0) & 0xFF;
940 }
941
942 dev->mem_start = 0x0000;
943 dev->mem_end = 0x0000;
944 dev->if_port = 0;
945
946 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
947
948 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
949 printk("%s%02x", (i == 0) ? " " : ":", dev->dev_addr[i]);
950
951 printk(", IRQ %d", dev->irq);
952 if (enable_full_promiscuous)
953 printk(", promisc");
954 printk(", nwid 0x%02x%02x", psa.psa_nwid[0], psa.psa_nwid[1]);
955
956 printk(", PC");
957 switch (psa.psa_comp_number)
958 {
959 case PSA_COMP_PC_AT_915:
960 case PSA_COMP_PC_AT_2400:
961 printk("-AT");
962 break;
963
964 case PSA_COMP_PC_MC_915:
965 case PSA_COMP_PC_MC_2400:
966 printk("-MC");
967 break;
968
969 case PSA_COMP_PCMCIA_915:
970 printk("MCIA");
971 break;
972
973 default:
974 printk("???");
975 break;
976 }
977
978 printk(", ");
979 switch (psa.psa_subband)
980 {
981 case PSA_SUBBAND_915:
982 printk("915");
983 break;
984
985 case PSA_SUBBAND_2425:
986 printk("2425");
987 break;
988
989 case PSA_SUBBAND_2460:
990 printk("2460");
991 break;
992
993 case PSA_SUBBAND_2484:
994 printk("2484");
995 break;
996
997 case PSA_SUBBAND_2430_5:
998 printk("2430.5");
999 break;
1000
1001 default:
1002 printk("???");
1003 break;
1004 }
1005 printk(" MHz");
1006
1007 printk("\n");
1008
1009 if (wavelan_debug > 0)
1010 printk(version);
1011
1012 dev->priv = kmalloc(sizeof(net_local), GFP_KERNEL);
1013 if (dev->priv == NULL)
1014 return -ENOMEM;
1015 memset(dev->priv, 0x00, sizeof(net_local));
1016 lp = (net_local *)dev->priv;
1017
1018 if (first_wavelan == (net_local *)0)
1019 {
1020 first_wavelan = lp;
1021 lp->prev = lp;
1022 lp->next = lp;
1023 }
1024 else
1025 {
1026 lp->prev = first_wavelan->prev;
1027 lp->next = first_wavelan;
1028 first_wavelan->prev->next = lp;
1029 first_wavelan->prev = lp;
1030 }
1031 lp->dev = dev;
1032
1033 lp->hacr = HACR_DEFAULT;
1034
1035 lp->full_promiscuous = enable_full_promiscuous;
1036 lp->nwid[0] = psa.psa_nwid[0];
1037 lp->nwid[1] = psa.psa_nwid[1];
1038
1039 lp->watchdog.function = wavelan_watchdog;
1040 lp->watchdog.data = (unsigned long)dev;
1041
1042 dev->open = wavelan_open;
1043 dev->stop = wavelan_close;
1044 dev->hard_start_xmit = wavelan_send_packet;
1045 dev->get_stats = wavelan_get_stats;
1046 dev->set_multicast_list = &wavelan_set_multicast_list;
1047
1048
1049
1050
1051
1052 ether_setup(dev);
1053
1054 dev->flags &= ~IFF_MULTICAST;
1055
1056 dev->mtu = WAVELAN_MTU;
1057
1058 if (wavelan_debug > 0)
1059 printk("%s: <-wavelan_probe1(): 0\n", dev->name);
1060
1061 return 0;
1062 }
1063
1064
1065
1066
1067
1068 static
1069 void
1070 wavelan_ru_start(device *dev)
1071 {
1072 unsigned short ioaddr;
1073 net_local *lp;
1074 unsigned short scb_cs;
1075 fd_t fd;
1076 rbd_t rbd;
1077 unsigned short rx;
1078 unsigned short rx_next;
1079 int i;
1080
1081 ioaddr = dev->base_addr;
1082 lp = (net_local *)dev->priv;
1083
1084 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&scb_cs, sizeof(scb_cs));
1085 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
1086 return;
1087
1088 lp->rx_head = OFFSET_RU;
1089
1090 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next)
1091 {
1092 rx_next = (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
1093
1094 fd.fd_status = 0;
1095 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
1096 fd.fd_link_offset = rx_next;
1097 fd.fd_rbd_offset = rx + sizeof(fd);
1098 obram_write(ioaddr, rx, (unsigned char *)&fd, sizeof(fd));
1099
1100 rbd.rbd_status = 0;
1101 rbd.rbd_next_rbd_offset = I82586NULL;
1102 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
1103 rbd.rbd_bufh = 0;
1104 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
1105 obram_write(ioaddr, rx + sizeof(fd), (unsigned char *)&rbd, sizeof(rbd));
1106
1107 lp->rx_last = rx;
1108 }
1109
1110 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), (unsigned char *)&lp->rx_head, sizeof(lp->rx_head));
1111
1112 scb_cs = SCB_CMD_RUC_GO;
1113 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1114
1115 set_chan_attn(ioaddr, lp->hacr);
1116
1117 for (i = 1000; i > 0; i--)
1118 {
1119 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1120 if (scb_cs == 0)
1121 break;
1122
1123 udelay(1000);
1124 }
1125
1126 if (i <= 0)
1127 printk("%s: wavelan_ru_start(): board not accepting command.\n", dev->name);
1128 }
1129
1130
1131
1132
1133
1134
1135 static
1136 void
1137 wavelan_cu_start(device *dev)
1138 {
1139 unsigned short ioaddr;
1140 net_local *lp;
1141 int i;
1142 unsigned short txblock;
1143 unsigned short first_nop;
1144 unsigned short scb_cs;
1145
1146 ioaddr = dev->base_addr;
1147 lp = (net_local *)dev->priv;
1148
1149 lp->tx_first_free = OFFSET_CU;
1150 lp->tx_first_in_use = I82586NULL;
1151
1152 for
1153 (
1154 i = 0, txblock = OFFSET_CU;
1155 i < NTXBLOCKS;
1156 i++, txblock += TXBLOCKZ
1157 )
1158 {
1159 ac_tx_t tx;
1160 ac_nop_t nop;
1161 tbd_t tbd;
1162 unsigned short tx_addr;
1163 unsigned short nop_addr;
1164 unsigned short tbd_addr;
1165 unsigned short buf_addr;
1166
1167 tx_addr = txblock;
1168 nop_addr = tx_addr + sizeof(tx);
1169 tbd_addr = nop_addr + sizeof(nop);
1170 buf_addr = tbd_addr + sizeof(tbd);
1171
1172 tx.tx_h.ac_status = 0;
1173 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
1174 tx.tx_h.ac_link = nop_addr;
1175 tx.tx_tbd_offset = tbd_addr;
1176 obram_write(ioaddr, tx_addr, (unsigned char *)&tx, sizeof(tx));
1177
1178 nop.nop_h.ac_status = 0;
1179 nop.nop_h.ac_command = acmd_nop;
1180 nop.nop_h.ac_link = nop_addr;
1181 obram_write(ioaddr, nop_addr, (unsigned char *)&nop, sizeof(nop));
1182
1183 tbd.tbd_status = TBD_STATUS_EOF;
1184 tbd.tbd_next_bd_offset = I82586NULL;
1185 tbd.tbd_bufl = buf_addr;
1186 tbd.tbd_bufh = 0;
1187 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1188 }
1189
1190 first_nop = OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
1191 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), (unsigned char *)&first_nop, sizeof(first_nop));
1192
1193 scb_cs = SCB_CMD_CUC_GO;
1194 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1195
1196 set_chan_attn(ioaddr, lp->hacr);
1197
1198 for (i = 1000; i > 0; i--)
1199 {
1200 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cs, sizeof(scb_cs));
1201 if (scb_cs == 0)
1202 break;
1203
1204 udelay(1000);
1205 }
1206
1207 if (i <= 0)
1208 printk("%s: wavelan_cu_start(): board not accepting command.\n", dev->name);
1209
1210 lp->tx_n_in_use = 0;
1211 dev->tbusy = 0;
1212 }
1213
1214 static
1215 int
1216 wavelan_open(device *dev)
1217 {
1218 unsigned short ioaddr;
1219 net_local *lp;
1220 unsigned long x;
1221 int r;
1222
1223 if (wavelan_debug > 0)
1224 printk("%s: ->wavelan_open(dev=0x%x)\n", dev->name, (unsigned int)dev);
1225
1226 ioaddr = dev->base_addr;
1227 lp = (net_local *)dev->priv;
1228
1229 if (dev->irq == 0)
1230 {
1231 if (wavelan_debug > 0)
1232 printk("%s: <-wavelan_open(): -ENXIO\n", dev->name);
1233 return -ENXIO;
1234 }
1235
1236 if
1237 (
1238 irq2dev_map[dev->irq] != (device *)0
1239
1240 ||
1241 (irq2dev_map[dev->irq] = dev) == (device *)0
1242 ||
1243 request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN") != 0
1244 )
1245 {
1246 irq2dev_map[dev->irq] = (device *)0;
1247 if (wavelan_debug > 0)
1248 printk("%s: <-wavelan_open(): -EAGAIN\n", dev->name);
1249 return -EAGAIN;
1250 }
1251
1252 x = wavelan_splhi();
1253 if ((r = wavelan_hardware_reset(dev)) != -1)
1254 {
1255 dev->interrupt = 0;
1256 dev->start = 1;
1257 }
1258 wavelan_splx(x);
1259
1260 if (r == -1)
1261 {
1262 free_irq(dev->irq);
1263 irq2dev_map[dev->irq] = (device *)0;
1264 if (wavelan_debug > 0)
1265 printk("%s: <-wavelan_open(): -EAGAIN(2)\n", dev->name);
1266 return -EAGAIN;
1267 }
1268
1269 MOD_INC_USE_COUNT;
1270
1271 if (wavelan_debug > 0)
1272 printk("%s: <-wavelan_open(): 0\n", dev->name);
1273
1274 return 0;
1275 }
1276
1277 static
1278 void
1279 hardware_send_packet(device *dev, void *buf, short length)
1280 {
1281 unsigned short ioaddr;
1282 net_local *lp;
1283 unsigned short txblock;
1284 unsigned short txpred;
1285 unsigned short tx_addr;
1286 unsigned short nop_addr;
1287 unsigned short tbd_addr;
1288 unsigned short buf_addr;
1289 ac_tx_t tx;
1290 ac_nop_t nop;
1291 tbd_t tbd;
1292 unsigned long x;
1293
1294 ioaddr = dev->base_addr;
1295 lp = (net_local *)dev->priv;
1296
1297 x = wavelan_splhi();
1298
1299 txblock = lp->tx_first_free;
1300 txpred = txblock - TXBLOCKZ;
1301 if (txpred < OFFSET_CU)
1302 txpred += NTXBLOCKS * TXBLOCKZ;
1303 lp->tx_first_free += TXBLOCKZ;
1304 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1305 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
1306
1307
1308
1309
1310
1311
1312 lp->tx_n_in_use++;
1313
1314 tx_addr = txblock;
1315 nop_addr = tx_addr + sizeof(tx);
1316 tbd_addr = nop_addr + sizeof(nop);
1317 buf_addr = tbd_addr + sizeof(tbd);
1318
1319
1320
1321
1322 tx.tx_h.ac_status = 0;
1323 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), (unsigned char *)&tx.tx_h.ac_status, sizeof(tx.tx_h.ac_status));
1324
1325
1326
1327
1328 nop.nop_h.ac_status = 0;
1329 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1330 nop.nop_h.ac_link = nop_addr;
1331 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1332
1333
1334
1335
1336 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & length);
1337 tbd.tbd_next_bd_offset = I82586NULL;
1338 tbd.tbd_bufl = buf_addr;
1339 tbd.tbd_bufh = 0;
1340 obram_write(ioaddr, tbd_addr, (unsigned char *)&tbd, sizeof(tbd));
1341
1342
1343
1344
1345 obram_write(ioaddr, buf_addr, buf, length);
1346
1347
1348
1349
1350
1351 nop_addr = txpred + sizeof(tx);
1352 nop.nop_h.ac_status = 0;
1353 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), (unsigned char *)&nop.nop_h.ac_status, sizeof(nop.nop_h.ac_status));
1354 nop.nop_h.ac_link = txblock;
1355 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), (unsigned char *)&nop.nop_h.ac_link, sizeof(nop.nop_h.ac_link));
1356
1357 if (lp->tx_first_in_use == I82586NULL)
1358 lp->tx_first_in_use = txblock;
1359
1360 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1361 dev->tbusy = 0;
1362
1363 dev->trans_start = jiffies;
1364
1365 if (lp->watchdog.next == (timer_list *)0)
1366 wavelan_watchdog((unsigned long)dev);
1367
1368 wavelan_splx(x);
1369
1370 if (wavelan_debug > 4)
1371 {
1372 unsigned char *a;
1373
1374 a = (unsigned char *)buf;
1375
1376 printk
1377 (
1378 "%s: tx: dest %02x:%02x:%02x:%02x:%02x:%02x, length %d, tbd.tbd_bufl 0x%x.\n",
1379 dev->name,
1380 a[0], a[1], a[2], a[3], a[4], a[5],
1381 length,
1382 buf_addr
1383 );
1384 }
1385 }
1386
1387 static
1388 int
1389 wavelan_send_packet(struct sk_buff *skb, device *dev)
1390 {
1391 unsigned short ioaddr;
1392
1393 ioaddr = dev->base_addr;
1394
1395 if (dev->tbusy)
1396 {
1397
1398
1399
1400
1401 int tickssofar;
1402
1403 tickssofar = jiffies - dev->trans_start;
1404
1405
1406
1407
1408
1409
1410
1411
1412 return 1;
1413
1414 wavelan_scb_show(ioaddr);
1415 wavelan_ru_show(dev);
1416 wavelan_cu_show(dev);
1417 wavelan_dev_show(dev);
1418 wavelan_local_show(dev);
1419
1420 printk("%s: transmit timed out -- resetting board.\n", dev->name);
1421
1422 (void)wavelan_hardware_reset(dev);
1423 }
1424
1425
1426
1427
1428
1429
1430 if (skb == (struct sk_buff *)0)
1431 {
1432 dev_tint(dev);
1433 return 0;
1434 }
1435
1436
1437
1438
1439 if (set_bit(0, (void *)&dev->tbusy) == 0)
1440 {
1441 short length;
1442 unsigned char *buf;
1443
1444 length = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
1445 buf = skb->data;
1446
1447 hardware_send_packet(dev, buf, length);
1448 }
1449 else
1450 printk("%s: Transmitter access conflict.\n", dev->name);
1451
1452 dev_kfree_skb(skb, FREE_WRITE);
1453
1454 return 0;
1455 }
1456
1457 #if 0
1458 static
1459 int
1460 addrcmp(unsigned char *a0, unsigned char *a1)
1461 {
1462 int i;
1463
1464 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1465 {
1466 if (a0[i] != a1[i])
1467 return a0[i] - a1[i];
1468 }
1469
1470 return 0;
1471 }
1472 #endif
1473
1474
1475
1476
1477
1478
1479 static
1480 void
1481 wavelan_receive(device *dev)
1482 {
1483 unsigned short ioaddr;
1484 net_local *lp;
1485 int nreaped;
1486
1487 ioaddr = dev->base_addr;
1488 lp = (net_local *)dev->priv;
1489 nreaped = 0;
1490
1491 for (;;)
1492 {
1493 fd_t fd;
1494 rbd_t rbd;
1495 ushort pkt_len;
1496 int sksize;
1497 struct sk_buff *skb;
1498
1499 obram_read(ioaddr, lp->rx_head, (unsigned char *)&fd, sizeof(fd));
1500
1501 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
1502 break;
1503
1504 nreaped++;
1505
1506 if
1507 (
1508 (fd.fd_status & (FD_STATUS_B | FD_STATUS_OK))
1509 !=
1510 (FD_STATUS_B | FD_STATUS_OK)
1511 )
1512 {
1513
1514
1515
1516
1517
1518
1519
1520 if ((fd.fd_status & FD_STATUS_OK) != FD_STATUS_OK)
1521 printk("%s: frame not received successfully.\n", dev->name);
1522 }
1523
1524 if ((fd.fd_status & (FD_STATUS_S6 | FD_STATUS_S7 | FD_STATUS_S8 | FD_STATUS_S9 | FD_STATUS_S10 | FD_STATUS_S11)) != 0)
1525 {
1526 lp->stats.rx_errors++;
1527
1528 if ((fd.fd_status & FD_STATUS_S6) != 0)
1529 printk("%s: no EOF flag.\n", dev->name);
1530
1531 if ((fd.fd_status & FD_STATUS_S7) != 0)
1532 {
1533 lp->stats.rx_length_errors++;
1534 printk("%s: frame too short.\n", dev->name);
1535 }
1536
1537 if ((fd.fd_status & FD_STATUS_S8) != 0)
1538 {
1539 lp->stats.rx_over_errors++;
1540 printk("%s: rx DMA overrun.\n", dev->name);
1541 }
1542
1543 if ((fd.fd_status & FD_STATUS_S9) != 0)
1544 {
1545 lp->stats.rx_fifo_errors++;
1546 printk("%s: ran out of resources.\n", dev->name);
1547 }
1548
1549 if ((fd.fd_status & FD_STATUS_S10) != 0)
1550 {
1551 lp->stats.rx_frame_errors++;
1552 printk("%s: alignment error.\n", dev->name);
1553 }
1554
1555 if ((fd.fd_status & FD_STATUS_S11) != 0)
1556 {
1557 lp->stats.rx_crc_errors++;
1558 printk("%s: CRC error.\n", dev->name);
1559 }
1560 }
1561
1562 if (fd.fd_rbd_offset == I82586NULL)
1563 printk("%s: frame has no data.\n", dev->name);
1564 else
1565 {
1566 obram_read(ioaddr, fd.fd_rbd_offset, (unsigned char *)&rbd, sizeof(rbd));
1567
1568 if ((rbd.rbd_status & RBD_STATUS_EOF) != RBD_STATUS_EOF)
1569 printk("%s: missing EOF flag.\n", dev->name);
1570
1571 if ((rbd.rbd_status & RBD_STATUS_F) != RBD_STATUS_F)
1572 printk("%s: missing F flag.\n", dev->name);
1573
1574 pkt_len = rbd.rbd_status & RBD_STATUS_ACNT;
1575
1576 #if 0
1577 {
1578 unsigned char addr[WAVELAN_ADDR_SIZE];
1579 int i;
1580 static unsigned char toweraddr[WAVELAN_ADDR_SIZE] =
1581 {
1582 0x08, 0x00, 0x0e, 0x20, 0x3e, 0xd3,
1583 };
1584
1585 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1586 if
1587 (
1588
1589
1590
1591
1592 addrcmp(&addr[0], toweraddr) != 0
1593 )
1594 {
1595 printk("%s: foreign MAC source addr=", dev->name);
1596 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1597 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1598 printk("\n");
1599 }
1600 }
1601 #endif
1602
1603 if (wavelan_debug > 5)
1604 {
1605 unsigned char addr[WAVELAN_ADDR_SIZE];
1606 unsigned short ltype;
1607 int i;
1608
1609 #if 0
1610 printk("%s: fd_dest=", dev->name);
1611 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1612 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_dest[i]);
1613 printk("\n");
1614
1615 printk("%s: fd_src=", dev->name);
1616 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1617 printk("%s%02x", (i == 0) ? "" : ":", fd.fd_src[i]);
1618 printk("\n");
1619 printk("%s: fd_length=%d\n", dev->name, fd.fd_length);
1620 #endif
1621
1622 obram_read(ioaddr, rbd.rbd_bufl, &addr[0], sizeof(addr));
1623 printk("%s: dest=", dev->name);
1624 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1625 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1626 printk("\n");
1627
1628 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr), &addr[0], sizeof(addr));
1629 printk("%s: src=", dev->name);
1630 for (i = 0; i < WAVELAN_ADDR_SIZE; i++)
1631 printk("%s%02x", (i == 0) ? "" : ":", addr[i]);
1632 printk("\n");
1633
1634 obram_read(ioaddr, rbd.rbd_bufl + sizeof(addr) * 2, (unsigned char *)<ype, sizeof(ltype));
1635 printk("%s: ntohs(length/type)=0x%04x\n", dev->name, ntohs(ltype));
1636 }
1637
1638 sksize = pkt_len;
1639
1640 if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *)0)
1641 {
1642 printk("%s: could not alloc_skb(%d, GFP_ATOMIC).\n", dev->name, sksize);
1643 lp->stats.rx_dropped++;
1644 }
1645 else
1646 {
1647 skb->dev = dev;
1648
1649 obram_read(ioaddr, rbd.rbd_bufl, skb_put(skb,pkt_len), pkt_len);
1650
1651 if (wavelan_debug > 5)
1652 {
1653 int i;
1654 int maxi;
1655
1656 printk("%s: pkt_len=%d, data=\"", dev->name, pkt_len);
1657
1658 if ((maxi = pkt_len) > 16)
1659 maxi = 16;
1660
1661 for (i = 0; i < maxi; i++)
1662 {
1663 unsigned char c;
1664
1665 c = skb->data[i];
1666 if (c >= ' ' && c <= '~')
1667 printk(" %c", skb->data[i]);
1668 else
1669 printk("%02x", skb->data[i]);
1670 }
1671
1672 if (maxi < pkt_len)
1673 printk("..");
1674
1675 printk("\"\n\n");
1676 }
1677
1678 skb->protocol=eth_type_trans(skb,dev);
1679 netif_rx(skb);
1680
1681 lp->stats.rx_packets++;
1682 }
1683 }
1684
1685 fd.fd_status = 0;
1686 obram_write(ioaddr, fdoff(lp->rx_head, fd_status), (unsigned char *)&fd.fd_status, sizeof(fd.fd_status));
1687
1688 fd.fd_command = FD_COMMAND_EL;
1689 obram_write(ioaddr, fdoff(lp->rx_head, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1690
1691 fd.fd_command = 0;
1692 obram_write(ioaddr, fdoff(lp->rx_last, fd_command), (unsigned char *)&fd.fd_command, sizeof(fd.fd_command));
1693
1694 lp->rx_last = lp->rx_head;
1695 lp->rx_head = fd.fd_link_offset;
1696 }
1697
1698
1699
1700
1701
1702 }
1703
1704
1705
1706
1707
1708 static
1709 int
1710 wavelan_complete(device *dev, unsigned short ioaddr, net_local *lp)
1711 {
1712 int nreaped;
1713
1714 nreaped = 0;
1715
1716 for (;;)
1717 {
1718 unsigned short tx_status;
1719
1720 if (lp->tx_first_in_use == I82586NULL)
1721 break;
1722
1723 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), (unsigned char *)&tx_status, sizeof(tx_status));
1724
1725 if ((tx_status & AC_SFLD_C) == 0)
1726 break;
1727
1728 nreaped++;
1729
1730 --lp->tx_n_in_use;
1731
1732
1733
1734
1735
1736
1737 if (lp->tx_n_in_use <= 0)
1738 lp->tx_first_in_use = I82586NULL;
1739 else
1740 {
1741 lp->tx_first_in_use += TXBLOCKZ;
1742 if (lp->tx_first_in_use >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1743 lp->tx_first_in_use -= NTXBLOCKS * TXBLOCKZ;
1744 }
1745
1746 if (tx_status & AC_SFLD_OK)
1747 {
1748 int ncollisions;
1749
1750 lp->stats.tx_packets++;
1751 ncollisions = tx_status & AC_SFLD_MAXCOL;
1752 lp->stats.collisions += ncollisions;
1753
1754
1755
1756
1757 }
1758 else
1759 {
1760 lp->stats.tx_errors++;
1761 if (tx_status & AC_SFLD_S10)
1762 {
1763 lp->stats.tx_carrier_errors++;
1764 if (wavelan_debug > 0)
1765 printk("%s: tx error: no CS.\n", dev->name);
1766 }
1767 if (tx_status & AC_SFLD_S9)
1768 {
1769 lp->stats.tx_carrier_errors++;
1770 printk("%s: tx error: lost CTS.\n", dev->name);
1771 }
1772 if (tx_status & AC_SFLD_S8)
1773 {
1774 lp->stats.tx_fifo_errors++;
1775 printk("%s: tx error: slow DMA.\n", dev->name);
1776 }
1777 if (tx_status & AC_SFLD_S6)
1778 {
1779 lp->stats.tx_heartbeat_errors++;
1780 if (wavelan_debug > 0)
1781 printk("%s: tx error: heart beat.\n", dev->name);
1782 }
1783 if (tx_status & AC_SFLD_S5)
1784 {
1785 lp->stats.tx_aborted_errors++;
1786 if (wavelan_debug > 0)
1787 printk("%s: tx error: too many collisions.\n", dev->name);
1788 }
1789 }
1790
1791 if (wavelan_debug > 5)
1792 printk("%s: tx completed, tx_status 0x%04x.\n", dev->name, tx_status);
1793 }
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803 if (lp->tx_n_in_use < NTXBLOCKS - 1)
1804 {
1805 dev->tbusy = 0;
1806 mark_bh(NET_BH);
1807 }
1808
1809 return nreaped;
1810 }
1811
1812 static
1813 void
1814 wavelan_watchdog(unsigned long a)
1815 {
1816 device *dev;
1817 net_local *lp;
1818 unsigned short ioaddr;
1819 unsigned long x;
1820 unsigned int nreaped;
1821
1822 x = wavelan_splhi();
1823
1824 dev = (device *)a;
1825 ioaddr = dev->base_addr;
1826 lp = (net_local *)dev->priv;
1827
1828 if (lp->tx_n_in_use <= 0)
1829 {
1830 wavelan_splx(x);
1831 return;
1832 }
1833
1834 lp->watchdog.expires = jiffies+WATCHDOG_JIFFIES;
1835 add_timer(&lp->watchdog);
1836
1837 if (jiffies - dev->trans_start < WATCHDOG_JIFFIES)
1838 {
1839 wavelan_splx(x);
1840 return;
1841 }
1842
1843 nreaped = wavelan_complete(dev, ioaddr, lp);
1844
1845 printk("%s: warning: wavelan_watchdog(): %d reaped, %d remain.\n", dev->name, nreaped, lp->tx_n_in_use);
1846
1847
1848
1849
1850
1851
1852
1853
1854 wavelan_splx(x);
1855 }
1856
1857 static
1858 void
1859 wavelan_interrupt(int irq, struct pt_regs *regs)
1860 {
1861 device *dev;
1862 unsigned short ioaddr;
1863 net_local *lp;
1864 unsigned short hasr;
1865 unsigned short status;
1866 unsigned short ack_cmd;
1867
1868 if ((dev = (device *)(irq2dev_map[irq])) == (device *)0)
1869 {
1870 printk("wavelan_interrupt(): irq %d for unknown device.\n", irq);
1871 return;
1872 }
1873
1874 ioaddr = dev->base_addr;
1875 lp = (net_local *)dev->priv;
1876
1877 dev->interrupt = 1;
1878
1879 if ((hasr = hasr_read(ioaddr)) & HASR_MMC_INTR)
1880 {
1881 unsigned char dce_status;
1882
1883
1884
1885
1886
1887 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, sizeof(dce_status));
1888 if (wavelan_debug > 0)
1889 printk("%s: warning: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", dev->name, dce_status);
1890 }
1891
1892 if ((hasr & HASR_82586_INTR) == 0)
1893 {
1894 dev->interrupt = 0;
1895 if (wavelan_debug > 0)
1896 printk("%s: warning: wavelan_interrupt() but (hasr & HASR_82586_INTR) == 0.\n", dev->name);
1897 return;
1898 }
1899
1900 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), (unsigned char *)&status, sizeof(status));
1901
1902
1903
1904
1905 ack_cmd = status & SCB_ST_INT;
1906
1907 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&ack_cmd, sizeof(ack_cmd));
1908
1909 set_chan_attn(ioaddr, lp->hacr);
1910
1911 if (wavelan_debug > 5)
1912 printk("%s: interrupt, status 0x%04x.\n", dev->name, status);
1913
1914 if ((status & SCB_ST_CX) == SCB_ST_CX)
1915 {
1916
1917
1918
1919 if (wavelan_debug > 5)
1920 printk("%s: command completed.\n", dev->name);
1921 (void)wavelan_complete(dev, ioaddr, lp);
1922 }
1923
1924 if ((status & SCB_ST_FR) == SCB_ST_FR)
1925 {
1926
1927
1928
1929 if (wavelan_debug > 5)
1930 printk("%s: received packet.\n", dev->name);
1931 wavelan_receive(dev);
1932 }
1933
1934 if
1935 (
1936 (status & SCB_ST_CNA) == SCB_ST_CNA
1937 ||
1938 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && dev->start)
1939 )
1940 {
1941 printk("%s: warning: CU inactive -- restarting.\n", dev->name);
1942
1943 (void)wavelan_hardware_reset(dev);
1944 }
1945
1946 if
1947 (
1948 (status & SCB_ST_RNR) == SCB_ST_RNR
1949 ||
1950 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && dev->start)
1951 )
1952 {
1953 printk("%s: warning: RU not ready -- restarting.\n", dev->name);
1954
1955 (void)wavelan_hardware_reset(dev);
1956 }
1957
1958 dev->interrupt = 0;
1959 }
1960
1961 static
1962 int
1963 wavelan_close(device *dev)
1964 {
1965 unsigned short ioaddr;
1966 net_local *lp;
1967 unsigned short scb_cmd;
1968
1969 if (wavelan_debug > 0)
1970 printk("%s: ->wavelan_close(dev=0x%x)\n", dev->name, (unsigned int)dev);
1971
1972 ioaddr = dev->base_addr;
1973 lp = (net_local *)dev->priv;
1974
1975 dev->tbusy = 1;
1976 dev->start = 0;
1977
1978
1979
1980
1981 scb_cmd = (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & SCB_CMD_RUC_SUS);
1982 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), (unsigned char *)&scb_cmd, sizeof(scb_cmd));
1983 set_chan_attn(ioaddr, lp->hacr);
1984
1985 wavelan_ints_off(dev);
1986
1987 free_irq(dev->irq);
1988 irq2dev_map[dev->irq] = (device *)0;
1989
1990
1991
1992
1993 release_region(ioaddr, sizeof(ha_t));
1994
1995 MOD_DEC_USE_COUNT;
1996
1997 if (wavelan_debug > 0)
1998 printk("%s: <-wavelan_close(): 0\n", dev->name);
1999
2000 return 0;
2001 }
2002
2003
2004
2005
2006
2007 static
2008 en_stats *
2009 wavelan_get_stats(device *dev)
2010 {
2011 net_local *lp;
2012
2013 lp = (net_local *)dev->priv;
2014
2015 return &lp->stats;
2016 }
2017
2018 static
2019 void
2020 wavelan_set_multicast_list(device *dev)
2021 {
2022 net_local *lp;
2023 unsigned long x;
2024
2025 if (wavelan_debug > 0)
2026 printk("%s: ->wavelan_set_multicast_list(dev=0x%x)", dev->name, dev);
2027
2028 lp = (net_local *)dev->priv;
2029
2030 if(dev->flags&IFF_PROMISC)
2031 {
2032
2033
2034
2035 lp->promiscuous = 1;
2036 x = wavelan_splhi();
2037 (void)wavelan_hardware_reset(dev);
2038 wavelan_splx(x);
2039 }
2040 #if MULTICAST_IS_ADDED
2041 else if((dev->flags&IFF_ALLMULTI)||dev->mc_list)
2042 {
2043
2044
2045 }
2046 #endif
2047 else
2048 {
2049
2050
2051
2052
2053 lp->promiscuous = 0;
2054 x = wavelan_splhi();
2055 (void)wavelan_hardware_reset(dev);
2056 wavelan_splx(x);
2057 }
2058
2059 if (wavelan_debug > 0)
2060 printk("%s: <-wavelan_set_multicast_list()\n", dev->name);
2061 }
2062
2063
2064
2065
2066
2067 static
2068 int
2069 sprintf_stats(char *buffer, device *dev)
2070 {
2071 net_local *lp;
2072 unsigned char v;
2073 mmr_t m;
2074
2075 lp = (net_local *)dev->priv;
2076
2077 if (lp == (net_local *)0)
2078 return sprintf(buffer, "%6s: No statistics available.\n", dev->name);
2079
2080 v = (unsigned char)1;
2081 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2082
2083 mmc_read(dev->base_addr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, sizeof(m.mmr_dce_status));
2084 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_h), &m.mmr_correct_nwid_h, sizeof(m.mmr_correct_nwid_h));
2085 mmc_read(dev->base_addr, mmroff(0, mmr_correct_nwid_l), &m.mmr_correct_nwid_l, sizeof(m.mmr_correct_nwid_l));
2086 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_h), &m.mmr_wrong_nwid_h, sizeof(m.mmr_wrong_nwid_h));
2087 mmc_read(dev->base_addr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, sizeof(m.mmr_wrong_nwid_l));
2088 mmc_read(dev->base_addr, mmroff(0, mmr_signal_lvl), &m.mmr_signal_lvl, sizeof(m.mmr_signal_lvl));
2089 mmc_read(dev->base_addr, mmroff(0, mmr_silence_lvl), &m.mmr_silence_lvl, sizeof(m.mmr_silence_lvl));
2090 mmc_read(dev->base_addr, mmroff(0, mmr_sgnl_qual), &m.mmr_sgnl_qual, sizeof(m.mmr_sgnl_qual));
2091
2092 v = (unsigned char)0;
2093 mmc_write(dev->base_addr, mmwoff(0, mmw_freeze), &v, sizeof(v));
2094
2095 lp->correct_nwid += (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l;
2096 lp->wrong_nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2097
2098 return sprintf
2099 (
2100 buffer,
2101 "%6s: %02x %08x %08x %02x %02x %02x %02x %u\n",
2102 dev->name,
2103 m.mmr_dce_status,
2104 lp->correct_nwid,
2105 lp->wrong_nwid,
2106 m.mmr_signal_lvl,
2107 m.mmr_silence_lvl,
2108 m.mmr_sgnl_qual,
2109 lp->tx_n_in_use,
2110 lp->nresets
2111 );
2112 }
2113
2114 static int
2115 wavelan_get_info(char *buffer, char **start, off_t offset, int length, int dummy)
2116 {
2117 int len;
2118 off_t begin;
2119 off_t pos;
2120 int size;
2121 unsigned long x;
2122
2123 len = 0;
2124 begin = 0;
2125 pos = 0;
2126
2127 size = sprintf(buffer, "%s", "Iface | dce +nwid -nwid lvl slnc qual ntxq nrst\n");
2128
2129 pos += size;
2130 len += size;
2131
2132 x = wavelan_splhi();
2133
2134 if (first_wavelan != (net_local *)0)
2135 {
2136 net_local *lp;
2137
2138 lp = first_wavelan;
2139 do
2140 {
2141 size = sprintf_stats(buffer + len, lp->dev);
2142
2143 len += size;
2144 pos = begin + len;
2145
2146 if (pos < offset)
2147 {
2148 len = 0;
2149 begin = pos;
2150 }
2151
2152 if (pos > offset + length)
2153 break;
2154 }
2155 while ((lp = lp->next) != first_wavelan);
2156 }
2157
2158 wavelan_splx(x);
2159
2160 *start = buffer + (offset - begin);
2161 len -= (offset - begin);
2162 if (len > length)
2163 len = length;
2164
2165 return len;
2166 }
2167
2168 #if defined(MODULE)
2169 static char devicename[9] = { 0, };
2170 static struct device dev_wavelan =
2171 {
2172 devicename,
2173 0, 0, 0, 0,
2174 0, 0,
2175 0, 0, 0, NULL, wavelan_probe
2176 };
2177
2178 static int io = 0x390;
2179 static int irq = 0;
2180
2181 int
2182 init_module(void)
2183 {
2184 dev_wavelan.base_addr = io;
2185 dev_wavelan.irq = irq;
2186 if (register_netdev(&dev_wavelan) != 0)
2187 return -EIO;
2188
2189 return 0;
2190 }
2191
2192 void
2193 cleanup_module(void)
2194 {
2195 proc_net_unregister(PROC_NET_WAVELAN);
2196 unregister_netdev(&dev_wavelan);
2197 kfree_s(dev_wavelan.priv, sizeof(struct net_local));
2198 dev_wavelan.priv = NULL;
2199 }
2200 #endif
2201
2202 static
2203 void
2204 wavelan_cu_show_one(device *dev, net_local *lp, int i, unsigned short p)
2205 {
2206 unsigned short ioaddr;
2207 ac_tx_t actx;
2208
2209 ioaddr = dev->base_addr;
2210
2211 printk("%d: 0x%x:", i, p);
2212
2213 obram_read(ioaddr, p, (unsigned char *)&actx, sizeof(actx));
2214 printk(" status=0x%x,", actx.tx_h.ac_status);
2215 printk(" command=0x%x,", actx.tx_h.ac_command);
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226 printk("|");
2227 }
2228
2229 #if 0
2230 static
2231 void
2232 wavelan_psa_show(psa_t *p)
2233 {
2234 printk("psa:");
2235
2236 printk("psa_io_base_addr_1: 0x%02x,", p->psa_io_base_addr_1);
2237 printk("psa_io_base_addr_2: 0x%02x,", p->psa_io_base_addr_2);
2238 printk("psa_io_base_addr_3: 0x%02x,", p->psa_io_base_addr_3);
2239 printk("psa_io_base_addr_4: 0x%02x,", p->psa_io_base_addr_4);
2240 printk("psa_rem_boot_addr_1: 0x%02x,", p->psa_rem_boot_addr_1);
2241 printk("psa_rem_boot_addr_2: 0x%02x,", p->psa_rem_boot_addr_2);
2242 printk("psa_rem_boot_addr_3: 0x%02x,", p->psa_rem_boot_addr_3);
2243 printk("psa_holi_params: 0x%02x,", p->psa_holi_params);
2244 printk("psa_int_req_no: %d,", p->psa_int_req_no);
2245 printk
2246 (
2247 "psa_univ_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2248 p->psa_univ_mac_addr[0],
2249 p->psa_univ_mac_addr[1],
2250 p->psa_univ_mac_addr[2],
2251 p->psa_univ_mac_addr[3],
2252 p->psa_univ_mac_addr[4],
2253 p->psa_univ_mac_addr[5]
2254 );
2255 printk
2256 (
2257 "psa_local_mac_addr[]: %02x:%02x:%02x:%02x:%02x:%02x,",
2258 p->psa_local_mac_addr[0],
2259 p->psa_local_mac_addr[1],
2260 p->psa_local_mac_addr[2],
2261 p->psa_local_mac_addr[3],
2262 p->psa_local_mac_addr[4],
2263 p->psa_local_mac_addr[5]
2264 );
2265 printk("psa_univ_local_sel: %d,", p->psa_univ_local_sel);
2266 printk("psa_comp_number: %d,", p->psa_comp_number);
2267 printk("psa_thr_pre_set: 0x%02x,", p->psa_thr_pre_set);
2268 printk("psa_feature_select/decay_prm: 0x%02x,", p->psa_feature_select);
2269 printk("psa_subband/decay_update_prm: %d,", p->psa_subband);
2270 printk("psa_quality_thr: 0x%02x,", p->psa_quality_thr);
2271 printk("psa_mod_delay: 0x%02x,", p->psa_mod_delay);
2272 printk("psa_nwid: 0x%02x%02x,", p->psa_nwid[0], p->psa_nwid[1]);
2273 printk("psa_undefined: %d,", p->psa_undefined);
2274 printk("psa_encryption_select: %d,", p->psa_encryption_select);
2275 printk
2276 (
2277 "psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x,",
2278 p->psa_encryption_key[0],
2279 p->psa_encryption_key[1],
2280 p->psa_encryption_key[2],
2281 p->psa_encryption_key[3],
2282 p->psa_encryption_key[4],
2283 p->psa_encryption_key[5],
2284 p->psa_encryption_key[6],
2285 p->psa_encryption_key[7]
2286 );
2287 printk("psa_databus_width: %d,", p->psa_databus_width);
2288 printk("psa_call_code/auto_squelch: 0x%02x,", p->psa_call_code);
2289 printk("psa_no_of_retries: %d,", p->psa_no_of_retries);
2290 printk("psa_acr: %d,", p->psa_acr);
2291 printk("psa_dump_count: %d,", p->psa_dump_count);
2292 printk("psa_nwid_prefix: 0x%02x,", p->psa_nwid_prefix);
2293 printk("psa_conf_status: %d,", p->psa_conf_status);
2294 printk("psa_crc: 0x%02x%02x,", p->psa_crc[0], p->psa_crc[1]);
2295 printk("psa_crc_status: 0x%02x,", p->psa_crc_status);
2296
2297 printk("\n");
2298 }
2299
2300 static
2301 void
2302 wavelan_mmc_show(unsigned short ioaddr)
2303 {
2304 mmr_t m;
2305
2306 mmc_read(ioaddr, 0, (unsigned char *)&m, sizeof(m));
2307
2308 printk("mmr:");
2309 printk(" des_status: 0x%x", m.mmr_des_status);
2310 printk(" des_avail: 0x%x", m.mmr_des_avail);
2311 printk(" des_io_invert: 0x%x", m.mmr_des_io_invert);
2312 printk
2313 (
2314 " dce_status: 0x%x[%s%s%s%s]",
2315 m.mmr_dce_status & 0x0F,
2316 (m.mmr_dce_status & MMR_DCE_STATUS_ENERG_DET) ? "energy detected," : "",
2317 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? "loop test indicated," : "",
2318 (m.mmr_dce_status & MMR_DCE_STATUS_XMTITR_IND) ? "transmitter on," : "",
2319 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? "jabber timer expired," : ""
2320 );
2321 printk(" correct_nwid: %d", m.mmr_correct_nwid_h << 8 | m.mmr_correct_nwid_l);
2322 printk(" wrong_nwid: %d", (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
2323 printk(" thr_pre_set: 0x%x", m.mmr_thr_pre_set);
2324 printk(" signal_lvl: %d", m.mmr_signal_lvl);
2325 printk(" silence_lvl: %d", m.mmr_silence_lvl);
2326 printk(" sgnl_qual: 0x%x", m.mmr_sgnl_qual);
2327 printk(" netw_id_l: %x", m.mmr_netw_id_l);
2328
2329 printk("\n");
2330 }
2331 #endif
2332
2333 static
2334 void
2335 wavelan_scb_show(unsigned short ioaddr)
2336 {
2337 scb_t scb;
2338
2339 obram_read(ioaddr, OFFSET_SCB, (unsigned char *)&scb, sizeof(scb));
2340
2341 printk("scb:");
2342
2343 printk(" status:");
2344 printk
2345 (
2346 " stat 0x%x[%s%s%s%s]",
2347 (scb.scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | SCB_ST_RNR)) >> 12,
2348 (scb.scb_status & SCB_ST_CX) ? "cmd completion interrupt," : "",
2349 (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
2350 (scb.scb_status & SCB_ST_CNA) ? "cmd unit not active," : "",
2351 (scb.scb_status & SCB_ST_RNR) ? "rcv unit not ready," : ""
2352 );
2353 printk
2354 (
2355 " cus 0x%x[%s%s%s]",
2356 (scb.scb_status & SCB_ST_CUS) >> 8,
2357 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_IDLE) ? "idle" : "",
2358 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_SUSP) ? "suspended" : "",
2359 ((scb.scb_status & SCB_ST_CUS) == SCB_ST_CUS_ACTV) ? "active" : ""
2360 );
2361 printk
2362 (
2363 " rus 0x%x[%s%s%s%s]",
2364 (scb.scb_status & SCB_ST_RUS) >> 4,
2365 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_IDLE) ? "idle" : "",
2366 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_SUSP) ? "suspended" : "",
2367 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_NRES) ? "no resources" : "",
2368 ((scb.scb_status & SCB_ST_RUS) == SCB_ST_RUS_RDY) ? "ready" : ""
2369 );
2370
2371 printk(" command:");
2372 printk
2373 (
2374 " ack 0x%x[%s%s%s%s]",
2375 (scb.scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
2376 (scb.scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
2377 (scb.scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
2378 (scb.scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
2379 (scb.scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""
2380 );
2381 printk
2382 (
2383 " cuc 0x%x[%s%s%s%s%s]",
2384 (scb.scb_command & SCB_CMD_CUC) >> 8,
2385 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_NOP) ? "nop" : "",
2386 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
2387 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_RES) ? "resume execution" : "",
2388 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_SUS) ? "suspend execution" : "",
2389 ((scb.scb_command & SCB_CMD_CUC) == SCB_CMD_CUC_ABT) ? "abort execution" : ""
2390 );
2391 printk
2392 (
2393 " ruc 0x%x[%s%s%s%s%s]",
2394 (scb.scb_command & SCB_CMD_RUC) >> 4,
2395 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_NOP) ? "nop" : "",
2396 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
2397 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_RES) ? "resume reception" : "",
2398 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_SUS) ? "suspend reception" : "",
2399 ((scb.scb_command & SCB_CMD_RUC) == SCB_CMD_RUC_ABT) ? "abort reception" : ""
2400 );
2401
2402 printk(" cbl_offset 0x%x", scb.scb_cbl_offset);
2403 printk(" rfa_offset 0x%x", scb.scb_rfa_offset);
2404
2405 printk(" crcerrs %d", scb.scb_crcerrs);
2406 printk(" alnerrs %d", scb.scb_alnerrs);
2407 printk(" rscerrs %d", scb.scb_rscerrs);
2408 printk(" ovrnerrs %d", scb.scb_ovrnerrs);
2409
2410 printk("\n");
2411 }
2412
2413 static
2414 void
2415 wavelan_ru_show(device *dev)
2416 {
2417 net_local *lp;
2418
2419 lp = (net_local *)dev->priv;
2420
2421 printk("ru:");
2422
2423
2424
2425 printk("\n");
2426 }
2427
2428 static
2429 void
2430 wavelan_cu_show(device *dev)
2431 {
2432 net_local *lp;
2433 unsigned int i;
2434 unsigned short p;
2435
2436 lp = (net_local *)dev->priv;
2437
2438 printk("cu:");
2439 printk("\n");
2440
2441 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++)
2442 {
2443 wavelan_cu_show_one(dev, lp, i, p);
2444
2445 p += TXBLOCKZ;
2446 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2447 p -= NTXBLOCKS * TXBLOCKZ;
2448 }
2449 }
2450
2451 static
2452 void
2453 wavelan_dev_show(device *dev)
2454 {
2455 printk("dev:");
2456 printk(" start=%d,", dev->start);
2457 printk(" tbusy=%ld,", dev->tbusy);
2458 printk(" interrupt=%d,", dev->interrupt);
2459 printk(" trans_start=%ld,", dev->trans_start);
2460 printk(" flags=0x%x,", dev->flags);
2461 printk("\n");
2462 }
2463
2464 static
2465 void
2466 wavelan_local_show(device *dev)
2467 {
2468 net_local *lp;
2469
2470 lp = (net_local *)dev->priv;
2471
2472 printk("local:");
2473 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
2474 printk(" hacr=0x%x,", lp->hacr);
2475 printk(" rx_head=0x%x,", lp->rx_head);
2476 printk(" rx_last=0x%x,", lp->rx_last);
2477 printk(" tx_first_free=0x%x,", lp->tx_first_free);
2478 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
2479 printk("\n");
2480 }
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
![[first]](../icons/first.png){kind=icon}
![[previous]](../icons/n_left.png){kind=icon}
![[next]](../icons/n_right.png){kind=icon}
![[last]](../icons/last.png){kind=icon}
![[top]](../icons/n_top.png){kind=icon}
![[bottom]](../icons/bottom.png){kind=icon}
![[index]](../icons/index.png){kind=icon}
![[help]](../icons/help.png){kind=icon}
*/
![[next]](../icons/right.png)
![[first]](../icons/n_first.png)
![[top]](../icons/top.png)
![[previous]](../icons/left.png)
![[last]](../icons/n_last.png)
![[bottom]](../icons/n_bottom.png){kind=icon}