taglinefilesource code
mreg27arch/sparc/mm/mbus.cregister unsigned int mreg, vaddr;
mreg35arch/sparc/mm/mbus.cmreg = srmmu_get_mmureg();
mreg36arch/sparc/mm/mbus.cimpl = (mreg & SRMMU_CTREG_IMPL_MASK) >> SRMMU_CTREG_IMPL_SHIFT;
mreg37arch/sparc/mm/mbus.cvers = (mreg & SRMMU_CTREG_VERS_MASK) >> SRMMU_CTREG_VERS_SHIFT;
mreg38arch/sparc/mm/mbus.csyscntrl = (mreg & SRMMU_CTREG_SYSCNTRL_MASK) >> SRMMU_CTREG_SYSCNTRL_SHIFT;
mreg39arch/sparc/mm/mbus.cpso = (mreg & SRMMU_CTREG_PSO_MASK) >> SRMMU_CTREG_PSO_SHIFT;
mreg40arch/sparc/mm/mbus.cresv = (mreg & SRMMU_CTREG_RESV_MASK) >> SRMMU_CTREG_RESV_SHIFT;
mreg41arch/sparc/mm/mbus.cnofault = (mreg & SRMMU_CTREG_NOFAULT_MASK) >> SRMMU_CTREG_NOFAULT_SHIFT;
mreg42arch/sparc/mm/mbus.cenable = (mreg & SRMMU_CTREG_ENABLE_MASK) >> SRMMU_CTREG_ENABLE_SHIFT;
mreg66arch/sparc/mm/mbus.cmreg &= (~HYPERSPARC_CWENABLE);
mreg67arch/sparc/mm/mbus.cmreg &= (~HYPERSPARC_CMODE);
mreg68arch/sparc/mm/mbus.cmreg &= (~HYPERSPARC_WBENABLE);
mreg69arch/sparc/mm/mbus.cmreg |= (HYPERSPARC_CENABLE);
mreg70arch/sparc/mm/mbus.csrmmu_set_mmureg(mreg);
mreg99arch/sparc/mm/mbus.cmreg &= (~CYPRESS_CMODE);
mreg100arch/sparc/mm/mbus.cmreg |= (CYPRESS_CENABLE);
mreg101arch/sparc/mm/mbus.csrmmu_set_mmureg(mreg);
mreg135arch/sparc/mm/mbus.cmreg |= 0;
mreg136arch/sparc/mm/mbus.csrmmu_set_mmureg(mreg);
mreg164arch/sparc/mm/mbus.cmreg |= (VIKING_DCENABLE | VIKING_ICENABLE | VIKING_SBENABLE |
mreg166arch/sparc/mm/mbus.csrmmu_set_mmureg(mreg);