arch/sparc/mm/mbus.c

/* */
This source file includes following definitions.
probe_mbus
   1 /* $Id: mbus.c,v 1.9 1995/11/25 00:59:26 davem Exp $
   2  * mbus.c: MBUS probing routines, called from kernel/probe.c
   3  *
   4  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6 
   7 #include <linux/kernel.h>
   8 
   9 #include <asm/oplib.h>
  10 #include <asm/cache.h>
  11 #include <asm/page.h>
  12 #include <asm/pgtable.h>
  13 #include <asm/asi.h>
  14 #include <asm/psr.h>
  15 #include <asm/vac-ops.h>
  16 #include <asm/mbus.h>
  17 
  18 /* #define DEBUG_MBUS */
  19 
  20 unsigned int viking_rev, swift_rev, cypress_rev;
  21 enum mbus_module srmmu_modtype;
  22 unsigned int hwbug_bitmask;
  23 
  24 void
  25 probe_mbus(void)
     /*  */
  26 {
  27         register unsigned int mreg, vaddr;
  28         register int impl, vers, syscntrl, pso, resv, nofault, enable;
  29         register int mod_typ, mod_rev;
  30 
  31         srmmu_modtype = SRMMU_INVAL_MOD;
  32         hwbug_bitmask = 0;
  33         vaddr = 0;
  34 
  35         mreg = srmmu_get_mmureg();
  36         impl = (mreg & SRMMU_CTREG_IMPL_MASK) >> SRMMU_CTREG_IMPL_SHIFT;
  37         vers = (mreg & SRMMU_CTREG_VERS_MASK) >> SRMMU_CTREG_VERS_SHIFT;
  38         syscntrl = (mreg & SRMMU_CTREG_SYSCNTRL_MASK) >> SRMMU_CTREG_SYSCNTRL_SHIFT;
  39         pso = (mreg & SRMMU_CTREG_PSO_MASK) >> SRMMU_CTREG_PSO_SHIFT;
  40         resv = (mreg & SRMMU_CTREG_RESV_MASK) >> SRMMU_CTREG_RESV_SHIFT;
  41         nofault = (mreg & SRMMU_CTREG_NOFAULT_MASK) >> SRMMU_CTREG_NOFAULT_SHIFT;
  42         enable = (mreg & SRMMU_CTREG_ENABLE_MASK) >> SRMMU_CTREG_ENABLE_SHIFT;
  43 
  44 #ifdef DEBUG_MBUS
  45         printk("MMU REGISTER\n");
  46         printk("IMPL<%01x> VERS<%01x> SYSCNTRL<%04x> PSO<%d> RESV<%02x> NOFAULT<%d> ENABLE<%d>\n",
  47                impl, vers, syscntrl, (int) pso, resv, (int) nofault, (int) enable);
  48 #endif
  49 
  50         mod_typ = impl; mod_rev = vers;
  51         printk("MBUS: ");
  52 
  53         if(mod_typ == 0x1) /* Ross HyperSparc or Cypress */
  54                 if (mod_rev == 0x7) {
  55                         srmmu_modtype = HyperSparc;
  56                         hwbug_bitmask |= HWBUG_VACFLUSH_BITROT;
  57                         /* Turn off Cache Wrapping and copyback caching, I don't
  58                          * understand them completely yet... */
  59                         printk("Enabling HyperSparc features...\n");
  60                         /* FUCK IT, I wanna see this baby chug! */
  61                         /* First, flush the cache */
  62 #if 0
  63                         for(vaddr = 0; vaddr != vac_size; vaddr+=vac_linesize)
  64                                 flush_ei_ctx(vaddr);
  65 #endif
  66                         mreg &= (~HYPERSPARC_CWENABLE);
  67                         mreg &= (~HYPERSPARC_CMODE);
  68                         mreg &= (~HYPERSPARC_WBENABLE);
  69                         mreg |= (HYPERSPARC_CENABLE);
  70                         srmmu_set_mmureg(mreg);
  71                         /* Clear all the cache tags */
  72 #if 0
  73                         for(vaddr = 0; vaddr != vac_size; vaddr+=vac_linesize)
  74                                 __asm__ __volatile__("sta %%g0, [%0] %1" : :
  75                                                      "r" (vaddr), "i" (0xe));
  76 #endif
  77                         /* Flush the ICACHE */
  78                         flush_whole_icache();
  79 
  80                 } else {
  81                         cypress_rev = mod_rev;
  82                         if(mod_rev == 0xe) {
  83                                 srmmu_modtype = Cypress_vE;
  84                                 hwbug_bitmask |= HWBUG_COPYBACK_BROKEN;
  85                         } else
  86                                 if(mod_rev == 0xd) {
  87                                         srmmu_modtype = Cypress_vD;
  88                                         hwbug_bitmask |= HWBUG_ASIFLUSH_BROKEN;
  89                                 } else
  90                                         srmmu_modtype = Cypress;
  91 
  92                         /* It is a Cypress module */
  93                         printk("ROSS Cypress Module %s\n",
  94                                (srmmu_modtype == Cypress_vE ? "Rev. E" :
  95                                 (srmmu_modtype == Cypress_vD ? "Rev. D" :
  96                                  "")));
  97                                 /* Enable Cypress features */
  98                                 printk("Enabling Cypress features...\n");
  99                                 mreg &= (~CYPRESS_CMODE);
 100                                 mreg |= (CYPRESS_CENABLE);
 101                                 srmmu_set_mmureg(mreg);
 102                                 /* Maybe play with Cypress 604/605 cache stuff here? */
 103                 }
 104 
 105 
 106         if(((get_psr()>>0x18)&0xff)==0x04) {
 107                 __asm__ __volatile__("lda [%1] %2, %0\n\t" 
 108                                      "srl %0, 0x18, %0\n\t" :
 109                                      "=r" (swift_rev) :
 110                                      "r" (0x10003000), "i" (0x20));
 111                 printk("Fujitsu MB86904 or higher Swift module\n");  /* MB86905 etc. */
 112                 switch(swift_rev) {
 113                 case 0x11:
 114                 case 0x20:
 115                 case 0x23:
 116                 case 0x30:
 117                         srmmu_modtype = Swift_lots_o_bugs;
 118                         hwbug_bitmask |= HWBUG_KERN_ACCBROKEN;
 119                         hwbug_bitmask |= HWBUG_KERN_CBITBROKEN;
 120                         printk("Detected Swift with Lots 'o' Bugs\n");
 121                         break;
 122                 case 0x25:
 123                 case 0x31:
 124                         srmmu_modtype = Swift_bad_c;
 125                         hwbug_bitmask |= HWBUG_KERN_CBITBROKEN;
 126                         printk("Detected Swift with kernel pte C bit bug\n");
 127                         break;
 128                 default:
 129                         srmmu_modtype = Swift_ok;
 130                         printk("Detected Swift with no bugs...\n");
 131                         break;
 132                 }
 133                 /* Enable Fujitsu Swift specific features here... */
 134                 printk("Enabling Swift features...\n");
 135                 mreg |= 0;
 136                 srmmu_set_mmureg(mreg);
 137         }
 138 
 139         if((((get_psr()>>0x18)&0xff)==0x40 ||
 140             (((get_psr()>>0x18)&0xff)==0x41 && mod_typ==0 && mod_rev==0))) {
 141                 if(((get_psr()>>0x18)&0xf)==0 && mod_rev==0) {
 142                         srmmu_modtype = Viking_12;
 143                         hwbug_bitmask |= HWBUG_MODIFIED_BITROT;
 144                         hwbug_bitmask |= HWBUG_PC_BADFAULT_ADDR;
 145                 } else {
 146                         if(((get_psr()>>0x18)&0xf)!=0) {
 147                                 srmmu_modtype = Viking_2x;
 148                                 hwbug_bitmask |= HWBUG_PC_BADFAULT_ADDR;
 149                         } else
 150                                 if(mod_rev==1) {
 151                                         srmmu_modtype = Viking_30;
 152                                         hwbug_bitmask |= HWBUG_PACINIT_BITROT;
 153                                 } else  {
 154                                         if (mod_rev<8)
 155                                                 srmmu_modtype = Viking_35;
 156                                         else
 157                                                 srmmu_modtype = Viking_new;
 158                                 }
 159                 }
 160 
 161                 /* SPARCclassic's STP1010 may be produced under other name */
 162                 printk("VIKING Module\n");
 163                 printk("Enabling Viking features...\n");
 164                 mreg |= (VIKING_DCENABLE | VIKING_ICENABLE | VIKING_SBENABLE |
 165                          VIKING_TCENABLE | VIKING_DPENABLE);
 166                 srmmu_set_mmureg(mreg);
 167         }
 168    
 169         if((((get_psr()>>0x18)&0xff)==0x41) && (mod_typ || mod_rev)) {
 170                 srmmu_modtype = Tsunami;
 171                 printk("Tsunami module\n");
 172                 /* Enable Tsunami features */
 173         }
 174 
 175         if(srmmu_modtype == SRMMU_INVAL_MOD) {
 176                 printk("Unknown SRMMU module type!\n");
 177                 printk("MMU_CREG: impl=%x vers=%x\n", mod_typ, mod_rev);
 178                 printk("PSR: impl=%x vers=%x\n", ((get_psr()>>28)&0xf),
 179                        ((get_psr()>>24)&0xf));
 180                 panic("probe_mbus()");
 181         }
 182 
 183         /* AIEEE, should get this from the prom... */
 184         printk("Boot processor ID %d Module ID %d (%s MBUS)\n",
 185                get_cpuid(), get_modid(), (get_modid() == 0x8 ? "Level 1" : "Level 2"));
 186 }
/* */
root/arch/sparc/mm/mbus.c

DEFINITIONS
