1 /* $Id: viking.h,v 1.5 1995/11/25 02:33:21 davem Exp $ 2 * viking.h: Defines specific to the TI Viking MBUS module. 3 * This is SRMMU stuff. 4 * 5 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 6 */ 7 #ifndef _SPARC_VIKING_H 8 #define _SPARC_VIKING_H 9 10 /* Bits in the SRMMU control register for TI Viking modules. 11 * 12 * ------------------------------------------------------------- 13 * |implvers| RSV |DP|RSV|TC|AC|SP|BM|PC|MBM|SB|IC|DC|RSV|NF|ME| 14 * ------------------------------------------------------------- 15 * 31 24 23-20 19 18 17 16 15 14 13 12 11 10 9 8-2 1 0 16 * 17 * DP: Data Prefetcher Enable -- 0 = DP is off, 1 = DP is on 18 * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable 19 * 1 = Twalks are cacheable 20 * AC: Alternate Cacheable -- 0 = Direct physical accesses not cacheable 21 * 1 = Direct physical accesses are cacheable 22 * SP: SnooP Enable -- 0 = bus snooping off, 1 = bus snooping on 23 * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode 24 * MBM: MBus Mode -- 0 = not in MBus mode, 1 = in MBus mode 25 * SB: StoreBuffer enable -- 0 = store buffer off, 1 = store buffer on 26 * IC: Instruction Cache -- 0 = off, 1 = on 27 * DC: Data Cache -- 0 = off, 1 = 0n 28 * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap 29 * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating 30 * 31 */ 32 33 #define VIKING_DCENABLE 0x00000100 /* Enable data cache */ 34 #define VIKING_ICENABLE 0x00000200 /* Enable instruction cache */ 35 #define VIKING_SBENABLE 0x00000400 /* Enable store buffer */ 36 #define VIKING_MMODE 0x00000800 /* MBUS mode */ 37 #define VIKING_PCENABLE 0x00001000 /* Enable parity checking */ 38 39 /* Boot mode, 0 at boot-time, 1 after prom initializes the MMU. */ 40 #define VIKING_BMODE 0x00002000 41 #define VIKING_SPENABLE 0x00004000 /* Enable bus cache snooping */ 42 43 /* The deal with this AC bit is that if you are going to modify the 44 * contents of physical ram using the MMU bypass, you had better set 45 * this bit or things will get unsynchronized. This is only applicable 46 * if an E-cache (ie. a PAC) is around and the Viking is not in MBUS mode. 47 */ 48 #define VIKING_ACENABLE 0x00008000 /* Enable alternate caching */ 49 #define VIKING_TCENABLE 0x00010000 /* Enable table-walks to be cached */ 50 #define VIKING_DPENABLE 0x00040000 /* Enable the data prefetcher */ 51 52 #endif