1 #ifndef _LINUX_FDREG_H 2 #define _LINUX_FDREG_H 3 /* 4 * This file contains some defines for the floppy disk controller. 5 * Various sources. Mostly "IBM Microcomputers: A Programmers 6 * Handbook", Sanches and Canton. 7 */ 8 9 #ifdef FDPATCHES 10 11 #define FD_IOPORT fdc_state[fdc].address 12 13 /* Fd controller regs. S&C, about page 340 */ 14 #define FD_STATUS (4 + FD_IOPORT ) 15 #define FD_DATA (5 + FD_IOPORT ) 16 17 /* Digital Output Register */ 18 #define FD_DOR (2 + FD_IOPORT ) 19 20 /* Digital Input Register (read) */ 21 #define FD_DIR (7 + FD_IOPORT ) 22 23 /* Diskette Control Register (write)*/ 24 #define FD_DCR (7 + FD_IOPORT ) 25 26 #else 27 28 #define FD_STATUS 0x3f4 29 #define FD_DATA 0x3f5 30 #define FD_DOR 0x3f2 /* Digital Output Register */ 31 #define FD_DIR 0x3f7 /* Digital Input Register (read) */ 32 #define FD_DCR 0x3f7 /* Diskette Control Register (write)*/ 33 34 #endif 35 36 /* Bits of main status register */ 37 #define STATUS_BUSYMASK 0x0F /* drive busy mask */ 38 #define STATUS_BUSY 0x10 /* FDC busy */ 39 #define STATUS_DMA 0x20 /* 0- DMA mode */ 40 #define STATUS_DIR 0x40 /* 0- cpu->fdc */ 41 #define STATUS_READY 0x80 /* Data reg ready */ 42 43 /* Bits of FD_ST0 */ 44 #define ST0_DS 0x03 /* drive select mask */ 45 #define ST0_HA 0x04 /* Head (Address) */ 46 #define ST0_NR 0x08 /* Not Ready */ 47 #define ST0_ECE 0x10 /* Equipment check error */ 48 #define ST0_SE 0x20 /* Seek end */ 49 #define ST0_INTR 0xC0 /* Interrupt code mask */ 50 51 /* Bits of FD_ST1 */ 52 #define ST1_MAM 0x01 /* Missing Address Mark */ 53 #define ST1_WP 0x02 /* Write Protect */ 54 #define ST1_ND 0x04 /* No Data - unreadable */ 55 #define ST1_OR 0x10 /* OverRun */ 56 #define ST1_CRC 0x20 /* CRC error in data or addr */ 57 #define ST1_EOC 0x80 /* End Of Cylinder */ 58 59 /* Bits of FD_ST2 */ 60 #define ST2_MAM 0x01 /* Missing Address Mark (again) */ 61 #define ST2_BC 0x02 /* Bad Cylinder */ 62 #define ST2_SNS 0x04 /* Scan Not Satisfied */ 63 #define ST2_SEH 0x08 /* Scan Equal Hit */ 64 #define ST2_WC 0x10 /* Wrong Cylinder */ 65 #define ST2_CRC 0x20 /* CRC error in data field */ 66 #define ST2_CM 0x40 /* Control Mark = deleted */ 67 68 /* Bits of FD_ST3 */ 69 #define ST3_HA 0x04 /* Head (Address) */ 70 #define ST3_DS 0x08 /* drive is double-sided */ 71 #define ST3_TZ 0x10 /* Track Zero signal (1=track 0) */ 72 #define ST3_RY 0x20 /* drive is ready */ 73 #define ST3_WP 0x40 /* Write Protect */ 74 #define ST3_FT 0x80 /* Drive Fault */ 75 76 /* Values for FD_COMMAND */ 77 #define FD_RECALIBRATE 0x07 /* move to track 0 */ 78 #define FD_SEEK 0x0F /* seek track */ 79 #define FD_READ 0xE6 /* read with MT, MFM, SKip deleted */ 80 #define FD_WRITE 0xC5 /* write with MT, MFM */ 81 #define FD_SENSEI 0x08 /* Sense Interrupt Status */ 82 #define FD_SPECIFY 0x03 /* specify HUT etc */ 83 #define FD_FORMAT 0x4D /* format one track */ 84 #define FD_VERSION 0x10 /* get version code */ 85 #define FD_CONFIGURE 0x13 /* configure FIFO operation */ 86 #define FD_PERPENDICULAR 0x12 /* perpendicular r/w mode */ 87 #define FD_GETSTATUS 0x04 /* read ST3 */ 88 #define FD_DUMPREGS 0x0E /* dump the contents of the fdc regs */ 89 #define FD_READID 0xEA /* prints the header of a sector */ 90 #define FD_UNLOCK 0x14 /* Fifo config unlock */ 91 #define FD_LOCK 0x94 /* Fifo config lock */ 92 #define FD_RSEEK_OUT 0x8f /* seek out (i.e. to lower tracks) */ 93 #define FD_RSEEK_IN 0xcf /* seek in (i.e. to higher tracks) */ 94 #define FD_PARTID 0x18 /* part id ("extended" version cmd) */ 95 #define FD_SAVE 0x2e /* save fdc regs for later restore */ 96 97 /* DMA commands */ 98 #define DMA_READ 0x46 99 #define DMA_WRITE 0x4A 100 101 /* FDC version return types */ 102 #define FDC_NONE 0x00 103 #define FDC_UNKNOWN 0x10 /* DO NOT USE THIS TYPE EXCEPT IF IDENTIFICATION 104 FAILS EARLY */ 105 #define FDC_8272A 0x20 /* Intel 8272a, NEC 765 */ 106 #define FDC_765ED 0x30 /* Non-Intel 1MB-compatible FDC, can't detect */ 107 #define FDC_82072 0x40 /* Intel 82072; 8272a + FIFO + DUMPREGS */ 108 #define FDC_82077_ORIG 0x50 /* Original version of 82077AA, sans LOCK */ 109 #define FDC_82077 0x52 /* 82077AA-1 */ 110 #define FDC_82077_UNKN 0x53 /* Unknown 82077 variant */ 111 #define FDC_82078 0x60 /* 44pin 82078 or 64pin 82078SL */ 112 #define FDC_82078_1 0x61 /* 82078-1 (2Mbps fdc) */ 113 #define FDC_87306 0x63 /* National Semiconductor PC 87306 */ 114 115 /* 116 * Beware: the fdc type list is roughly sorted by increasing features. 117 * Presence of features is tested by comparing the FDC version id with the 118 * "oldest" version that has the needed feature. 119 * If during FDC detection, an obscure test fails late in the sequence, don't 120 * assign FDC_UNKNOWN. Else the FDC will be treated as a dumb 8272a, or worse. 121 * This is especially true if the tests are unneeded. 122 */ 123 124 #define FD_RESET_DELAY 20 125 #endif