root/include/asm-i386/pgtable.h

/* */

INCLUDED FROM

DEFINITIONS

1. invalidate_mm
2. invalidate_page
3. invalidate_range
4. invalidate_mm
5. invalidate_page
6. invalidate_range
7. pte_none
8. pte_present
9. pte_inuse
10. pte_clear
11. pte_reuse
12. pmd_none
13. pmd_bad
14. pmd_present
15. pmd_inuse
16. pmd_inuse
17. pmd_clear
18. pmd_reuse
19. pgd_none
20. pgd_bad
21. pgd_present
22. pgd_inuse
23. pgd_clear
24. pte_read
25. pte_write
26. pte_exec
27. pte_dirty
28. pte_young
29. pte_wrprotect
30. pte_rdprotect
31. pte_exprotect
32. pte_mkclean
33. pte_mkold
34. pte_mkwrite
35. pte_mkread
36. pte_mkexec
37. pte_mkdirty
38. pte_mkyoung
39. mk_pte
40. pte_modify
41. pte_page
42. pmd_page
43. pgd_offset
44. pmd_offset
45. pte_offset
46. pte_free_kernel
47. pte_alloc_kernel
48. pmd_free_kernel
49. pmd_alloc_kernel
50. pte_free
51. pte_alloc
52. pmd_free
53. pmd_alloc
54. pgd_free
55. pgd_alloc
56. update_mmu_cache

   1 #ifndef _I386_PGTABLE_H
   2 #define _I386_PGTABLE_H
   3 
   4 #include <linux/config.h>
   5 
   6 /*
   7  * Define USE_PENTIUM_MM if you want the 4MB page table optimizations.
   8  * This works only on a intel Pentium.
   9  */
  10 #define USE_PENTIUM_MM 1
  11 
  12 /*
  13  * The Linux memory management assumes a three-level page table setup. On
  14  * the i386, we use that, but "fold" the mid level into the top-level page
  15  * table, so that we physically have the same two-level page table as the
  16  * i386 mmu expects.
  17  *
  18  * This file contains the functions and defines necessary to modify and use
  19  * the i386 page table tree.
  20  */
  21 
  22 /*
  23  * TLB invalidation:
  24  *
  25  *  - invalidate() invalidates the current mm struct TLBs
  26  *  - invalidate_all() invalidates all processes TLBs
  27  *  - invalidate_mm(mm) invalidates the specified mm context TLB's
  28  *  - invalidate_page(mm, vmaddr) invalidates one page
  29  *  - invalidate_range(mm, start, end) invalidates a range of pages
  30  *
  31  * ..but the i386 has somewhat limited invalidation capabilities,
  32  * and page-granular invalidates are available only on i486 and up.
  33  */
  34 
  35 #define __invalidate() \
  36 __asm__ __volatile__("movl %%cr3,%%eax\n\tmovl %%eax,%%cr3": : :"ax")
  37 
  38 #ifdef CONFIG_M386
  39 #define __invalidate_one(addr) invalidate()
  40 #else
  41 #define __invalidate_one(addr) \
  42 __asm__ __volatile__("invlpg %0": :"m" (*(char *) addr))
  43 #endif
  44  
  45 #ifndef __SMP__
  46 
  47 #define invalidate() __invalidate()
  48 #define invalidate_all() __invalidate()
  49 
  50 static inline void invalidate_mm(struct mm_struct *mm)
     /*  */
  51 {
  52         if (mm == current->mm)
  53                 __invalidate();
  54 }
  55 
  56 static inline void invalidate_page(struct vm_area_struct *vma,
     /*  */
  57         unsigned long addr)
  58 {
  59         if (vma->vm_mm == current->mm)
  60                 __invalidate_one(addr);
  61 }
  62 
  63 static inline void invalidate_range(struct mm_struct *mm,
     /*  */
  64         unsigned long start, unsigned long end)
  65 {
  66         if (mm == current->mm)
  67                 __invalidate();
  68 }
  69 
  70 #else
  71 
  72 /*
  73  * We aren't very clever about this yet -  SMP could certainly
  74  * avoid some global invalidates..
  75  */
  76 
  77 #include <asm/smp.h>
  78 
  79 #define local_invalidate() \
  80         __invalidate()
  81 
  82 #define invalidate() \
  83         smp_invalidate()
  84 
  85 #define invalidate_all() invalidate()
  86 
  87 static inline void invalidate_mm(struct mm_struct *mm)
     /*  */
  88 {
  89         invalidate();
  90 }
  91 
  92 static inline void invalidate_page(struct vm_area_struct *vma,
     /*  */
  93         unsigned long addr)
  94 {
  95         invalidate();
  96 }
  97 
  98 static inline void invalidate_range(struct mm_struct *mm,
     /*  */
  99         unsigned long start, unsigned long end)
 100 {
 101         invalidate();
 102 }
 103 
 104 #endif
 105 
 106 
 107 /* Certain architectures need to do special things when pte's
 108  * within a page table are directly modified.  Thus, the following
 109  * hook is made available.
 110  */
 111 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
 112 
 113 /* PMD_SHIFT determines the size of the area a second-level page table can map */
 114 #define PMD_SHIFT       22
 115 #define PMD_SIZE        (1UL << PMD_SHIFT)
 116 #define PMD_MASK        (~(PMD_SIZE-1))
 117 
 118 /* PGDIR_SHIFT determines what a third-level page table entry can map */
 119 #define PGDIR_SHIFT     22
 120 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
 121 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 122 
 123 /*
 124  * entries per page directory level: the i386 is two-level, so
 125  * we don't really have any PMD directory physically.
 126  */
 127 #define PTRS_PER_PTE    1024
 128 #define PTRS_PER_PMD    1
 129 #define PTRS_PER_PGD    1024
 130 
 131 /* Just any arbitrary offset to the start of the vmalloc VM area: the
 132  * current 8MB value just means that there will be a 8MB "hole" after the
 133  * physical memory until the kernel virtual memory starts.  That means that
 134  * any out-of-bounds memory accesses will hopefully be caught.
 135  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
 136  * area for the same reason. ;)
 137  */
 138 #define VMALLOC_OFFSET  (8*1024*1024)
 139 #define VMALLOC_START ((high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
 140 #define VMALLOC_VMADDR(x) (TASK_SIZE + (unsigned long)(x))
 141 
 142 /*
 143  * The 4MB page is guessing..  Detailed in the infamous "Chapter H"
 144  * of the Pentium details, but assuming intel did the straigtforward
 145  * thing, this bit set in the page directory entry just means that
 146  * the page directory entry points directly to a 4MB-aligned block of
 147  * memory. 
 148  */
 149 #define _PAGE_PRESENT   0x001
 150 #define _PAGE_RW        0x002
 151 #define _PAGE_USER      0x004
 152 #define _PAGE_PCD       0x010
 153 #define _PAGE_ACCESSED  0x020
 154 #define _PAGE_DIRTY     0x040
 155 #define _PAGE_4M        0x080   /* 4 MB page, Pentium+.. */
 156 
 157 #define _PAGE_TABLE     (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
 158 #define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
 159 
 160 #define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
 161 #define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
 162 #define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
 163 #define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
 164 #define PAGE_KERNEL     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
 165 
 166 /*
 167  * The i386 can't do page protection for execute, and considers that the same are read.
 168  * Also, write permissions imply read permissions. This is the closest we can get..
 169  */
 170 #define __P000  PAGE_NONE
 171 #define __P001  PAGE_READONLY
 172 #define __P010  PAGE_COPY
 173 #define __P011  PAGE_COPY
 174 #define __P100  PAGE_READONLY
 175 #define __P101  PAGE_READONLY
 176 #define __P110  PAGE_COPY
 177 #define __P111  PAGE_COPY
 178 
 179 #define __S000  PAGE_NONE
 180 #define __S001  PAGE_READONLY
 181 #define __S010  PAGE_SHARED
 182 #define __S011  PAGE_SHARED
 183 #define __S100  PAGE_READONLY
 184 #define __S101  PAGE_READONLY
 185 #define __S110  PAGE_SHARED
 186 #define __S111  PAGE_SHARED
 187 
 188 /*
 189  * Define this if things work differently on a i386 and a i486:
 190  * it will (on a i486) warn about kernel memory accesses that are
 191  * done without a 'verify_area(VERIFY_WRITE,..)'
 192  */
 193 #undef TEST_VERIFY_AREA
 194 
 195 /* page table for 0-4MB for everybody */
 196 extern unsigned long pg0[1024];
 197 /* zero page used for unitialized stuff */
 198 extern unsigned long empty_zero_page[1024];
 199 
 200 /*
 201  * BAD_PAGETABLE is used when we need a bogus page-table, while
 202  * BAD_PAGE is used for a bogus page.
 203  *
 204  * ZERO_PAGE is a global shared page that is always zero: used
 205  * for zero-mapped memory areas etc..
 206  */
 207 extern pte_t __bad_page(void);
 208 extern pte_t * __bad_pagetable(void);
 209 
 210 #define BAD_PAGETABLE __bad_pagetable()
 211 #define BAD_PAGE __bad_page()
 212 #define ZERO_PAGE ((unsigned long) empty_zero_page)
 213 
 214 /* number of bits that fit into a memory pointer */
 215 #define BITS_PER_PTR                    (8*sizeof(unsigned long))
 216 
 217 /* to align the pointer to a pointer address */
 218 #define PTR_MASK                        (~(sizeof(void*)-1))
 219 
 220 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
 221 /* 64-bit machines, beware!  SRB. */
 222 #define SIZEOF_PTR_LOG2                 2
 223 
 224 /* to find an entry in a page-table */
 225 #define PAGE_PTR(address) \
 226 ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
 227 
 228 /* to set the page-dir */
 229 #define SET_PAGE_DIR(tsk,pgdir) \
 230 do { \
 231         (tsk)->tss.cr3 = (unsigned long) (pgdir); \
 232         if ((tsk) == current) \
 233                 __asm__ __volatile__("movl %0,%%cr3": :"a" ((tsk)->tss.cr3)); \
 234 } while (0)
 235 
 236 extern inline int pte_none(pte_t pte)           { return !pte_val(pte); }
     /*  */
 237 extern inline int pte_present(pte_t pte)        { return pte_val(pte) & _PAGE_PRESENT; }
     /*  */
 238 extern inline int pte_inuse(pte_t *ptep)        { return mem_map[MAP_NR(ptep)].reserved || mem_map[MAP_NR(ptep)].count != 1; }
     /*  */
 239 extern inline void pte_clear(pte_t *ptep)       { pte_val(*ptep) = 0; }
     /*  */
 240 extern inline void pte_reuse(pte_t * ptep)
     /*  */
 241 {
 242         if (!mem_map[MAP_NR(ptep)].reserved)
 243                 mem_map[MAP_NR(ptep)].count++;
 244 }
 245 
 246 extern inline int pmd_none(pmd_t pmd)           { return !pmd_val(pmd); }
     /*  */
 247 extern inline int pmd_bad(pmd_t pmd)            { return (pmd_val(pmd) & ~PAGE_MASK) != _PAGE_TABLE || pmd_val(pmd) > high_memory; }
     /*  */
 248 extern inline int pmd_present(pmd_t pmd)        { return pmd_val(pmd) & _PAGE_PRESENT; }
     /*  */
 249 #ifdef USE_PENTIUM_MM
 250 extern inline int pmd_inuse(pmd_t *pmdp)        { return (pmd_val(*pmdp) & _PAGE_4M) != 0; }
     /*  */
 251 #else
 252 extern inline int pmd_inuse(pmd_t *pmdp)        { return 0; }
     /*  */
 253 #endif
 254 extern inline void pmd_clear(pmd_t * pmdp)      { pmd_val(*pmdp) = 0; }
     /*  */
 255 extern inline void pmd_reuse(pmd_t * pmdp)      { }
     /*  */
 256 
 257 /*
 258  * The "pgd_xxx()" functions here are trivial for a folded two-level
 259  * setup: the pgd is never bad, and a pmd always exists (as it's folded
 260  * into the pgd entry)
 261  */
 262 extern inline int pgd_none(pgd_t pgd)           { return 0; }
     /*  */
 263 extern inline int pgd_bad(pgd_t pgd)            { return 0; }
     /*  */
 264 extern inline int pgd_present(pgd_t pgd)        { return 1; }
     /*  */
 265 extern inline int pgd_inuse(pgd_t * pgdp)       { return mem_map[MAP_NR(pgdp)].reserved; }
     /*  */
 266 extern inline void pgd_clear(pgd_t * pgdp)      { }
     /*  */
 267 
 268 /*
 269  * The following only work if pte_present() is true.
 270  * Undefined behaviour if not..
 271  */
 272 extern inline int pte_read(pte_t pte)           { return pte_val(pte) & _PAGE_USER; }
     /*  */
 273 extern inline int pte_write(pte_t pte)          { return pte_val(pte) & _PAGE_RW; }
     /*  */
 274 extern inline int pte_exec(pte_t pte)           { return pte_val(pte) & _PAGE_USER; }
     /*  */
 275 extern inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_DIRTY; }
     /*  */
 276 extern inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
     /*  */
 277 
 278 extern inline pte_t pte_wrprotect(pte_t pte)    { pte_val(pte) &= ~_PAGE_RW; return pte; }
     /*  */
 279 extern inline pte_t pte_rdprotect(pte_t pte)    { pte_val(pte) &= ~_PAGE_USER; return pte; }
     /*  */
 280 extern inline pte_t pte_exprotect(pte_t pte)    { pte_val(pte) &= ~_PAGE_USER; return pte; }
     /*  */
 281 extern inline pte_t pte_mkclean(pte_t pte)      { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
     /*  */
 282 extern inline pte_t pte_mkold(pte_t pte)        { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
     /*  */
 283 extern inline pte_t pte_mkwrite(pte_t pte)      { pte_val(pte) |= _PAGE_RW; return pte; }
     /*  */
 284 extern inline pte_t pte_mkread(pte_t pte)       { pte_val(pte) |= _PAGE_USER; return pte; }
     /*  */
 285 extern inline pte_t pte_mkexec(pte_t pte)       { pte_val(pte) |= _PAGE_USER; return pte; }
     /*  */
 286 extern inline pte_t pte_mkdirty(pte_t pte)      { pte_val(pte) |= _PAGE_DIRTY; return pte; }
     /*  */
 287 extern inline pte_t pte_mkyoung(pte_t pte)      { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
     /*  */
 288 
 289 /*
 290  * Conversion functions: convert a page and protection to a page entry,
 291  * and a page entry and page directory to the page they refer to.
 292  */
 293 extern inline pte_t mk_pte(unsigned long page, pgprot_t pgprot)
     /*  */
 294 { pte_t pte; pte_val(pte) = page | pgprot_val(pgprot); return pte; }
 295 
 296 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
     /*  */
 297 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
 298 
 299 extern inline unsigned long pte_page(pte_t pte)
     /*  */
 300 { return pte_val(pte) & PAGE_MASK; }
 301 
 302 extern inline unsigned long pmd_page(pmd_t pmd)
     /*  */
 303 { return pmd_val(pmd) & PAGE_MASK; }
 304 
 305 /* to find an entry in a page-table-directory */
 306 extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
     /*  */
 307 {
 308         return mm->pgd + (address >> PGDIR_SHIFT);
 309 }
 310 
 311 /* Find an entry in the second-level page table.. */
 312 extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
     /*  */
 313 {
 314         return (pmd_t *) dir;
 315 }
 316 
 317 /* Find an entry in the third-level page table.. */ 
 318 extern inline pte_t * pte_offset(pmd_t * dir, unsigned long address)
     /*  */
 319 {
 320         return (pte_t *) pmd_page(*dir) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
 321 }
 322 
 323 /*
 324  * Allocate and free page tables. The xxx_kernel() versions are
 325  * used to allocate a kernel page table - this turns on ASN bits
 326  * if any, and marks the page tables reserved.
 327  */
 328 extern inline void pte_free_kernel(pte_t * pte)
     /*  */
 329 {
 330         mem_map[MAP_NR(pte)].reserved = 0;
 331         free_page((unsigned long) pte);
 332 }
 333 
 334 extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
     /*  */
 335 {
 336         address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 337         if (pmd_none(*pmd)) {
 338                 pte_t * page = (pte_t *) get_free_page(GFP_KERNEL);
 339                 if (pmd_none(*pmd)) {
 340                         if (page) {
 341                                 pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) page;
 342                                 mem_map[MAP_NR(page)].reserved = 1;
 343                                 return page + address;
 344                         }
 345                         pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE;
 346                         return NULL;
 347                 }
 348                 free_page((unsigned long) page);
 349         }
 350         if (pmd_bad(*pmd)) {
 351                 printk("Bad pmd in pte_alloc: %08lx\n", pmd_val(*pmd));
 352                 pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE;
 353                 return NULL;
 354         }
 355         return (pte_t *) pmd_page(*pmd) + address;
 356 }
 357 
 358 /*
 359  * allocating and freeing a pmd is trivial: the 1-entry pmd is
 360  * inside the pgd, so has no extra memory associated with it.
 361  */
 362 extern inline void pmd_free_kernel(pmd_t * pmd)
     /*  */
 363 {
 364         pmd_val(*pmd) = 0;
 365 }
 366 
 367 extern inline pmd_t * pmd_alloc_kernel(pgd_t * pgd, unsigned long address)
     /*  */
 368 {
 369         return (pmd_t *) pgd;
 370 }
 371 
 372 extern inline void pte_free(pte_t * pte)
     /*  */
 373 {
 374         free_page((unsigned long) pte);
 375 }
 376 
 377 extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address)
     /*  */
 378 {
 379         address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 380         if (pmd_none(*pmd)) {
 381                 pte_t * page = (pte_t *) get_free_page(GFP_KERNEL);
 382                 if (pmd_none(*pmd)) {
 383                         if (page) {
 384                                 pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) page;
 385                                 return page + address;
 386                         }
 387                         pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE;
 388                         return NULL;
 389                 }
 390                 free_page((unsigned long) page);
 391         }
 392         if (pmd_bad(*pmd)) {
 393                 printk("Bad pmd in pte_alloc: %08lx\n", pmd_val(*pmd));
 394                 pmd_val(*pmd) = _PAGE_TABLE | (unsigned long) BAD_PAGETABLE;
 395                 return NULL;
 396         }
 397         return (pte_t *) pmd_page(*pmd) + address;
 398 }
 399 
 400 /*
 401  * allocating and freeing a pmd is trivial: the 1-entry pmd is
 402  * inside the pgd, so has no extra memory associated with it.
 403  */
 404 extern inline void pmd_free(pmd_t * pmd)
     /*  */
 405 {
 406         pmd_val(*pmd) = 0;
 407 }
 408 
 409 extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address)
     /*  */
 410 {
 411         return (pmd_t *) pgd;
 412 }
 413 
 414 extern inline void pgd_free(pgd_t * pgd)
     /*  */
 415 {
 416         free_page((unsigned long) pgd);
 417 }
 418 
 419 extern inline pgd_t * pgd_alloc(void)
     /*  */
 420 {
 421         return (pgd_t *) get_free_page(GFP_KERNEL);
 422 }
 423 
 424 extern pgd_t swapper_pg_dir[1024];
 425 
 426 /*
 427  * The i386 doesn't have any external MMU info: the kernel page
 428  * tables contain all the necessary information.
 429  */
 430 extern inline void update_mmu_cache(struct vm_area_struct * vma,
     /*  */
 431         unsigned long address, pte_t pte)
 432 {
 433 }
 434 
 435 #define SWP_TYPE(entry) (((entry) >> 1) & 0x7f)
 436 #define SWP_OFFSET(entry) ((entry) >> 8)
 437 #define SWP_ENTRY(type,offset) (((type) << 1) | ((offset) << 8))
 438 
 439 #endif /* _I386_PAGE_H */

/* */