![[bottom]](../icons/bottom.png){kind=icon}
![[previous]](../icons/n_left.png){kind=icon}
![[next]](../icons/n_right.png){kind=icon}
![[first]](../icons/n_first.png){kind=icon}
![[last]](../icons/n_last.png){kind=icon}
![[top]](../icons/n_top.png){kind=icon}
![[index]](../icons/index.png){kind=icon}
![[help]](../icons/help.png){kind=icon}
*/
1 /* $Id: tpqic02.h,v 0.25 1994/07/21 02:16:30 root Exp root $
2 *
3 * Include file for QIC-02 driver for Linux.
4 *
5 * Copyright (c) 1992--1995 by H. H. Bergman. All rights reserved.
6 *
7 * ******* USER CONFIG SECTION BELOW (Near line 70) *******
8 */
9
10 #ifndef _LINUX_TPQIC02_H
11 #define _LINUX_TPQIC02_H
12
13 #include <linux/config.h>
14
15 #if CONFIG_QIC02_TAPE
16
17 /* need to have QIC02_TAPE_DRIVE and QIC02_TAPE_IFC expand to something */
18 #include <linux/mtio.h>
19
20
21 /* Make QIC02_TAPE_IFC expand to something.
22 *
23 * The only difference between WANGTEK and EVEREX is in the
24 * handling of the DMA channel 3.
25 * Note that the driver maps EVEREX to WANGTEK internally for speed
26 * reasons. Externally WANGTEK==1, EVEREX==2, ARCHIVE==3.
27 * These must correspond to the values used in qic02config(1).
28 *
29 * Support for Mountain controllers was added by Erik Jacobson
30 * and severely hacked by me. -- hhb
31 */
32 #define WANGTEK 1 /* don't know about Wangtek QIC-36 */
33 #define EVEREX (WANGTEK+1) /* I heard *some* of these are identical */
34 #define EVEREX_811V EVEREX /* With TEAC MT 2ST 45D */
35 #define EVEREX_831V EVEREX
36 #define ARCHIVE 3
37 #define ARCHIVE_SC400 ARCHIVE /* rumoured to be from the pre-SMD-age */
38 #define ARCHIVE_SC402 ARCHIVE /* don't know much about SC400 */
39 #define ARCHIVE_SC499 ARCHIVE /* SC402 and SC499R should be identical */
40
41 #define MOUNTAIN 5 /* Mountain Computer Interface */
42
43
44 /*********** START OF USER CONFIGURABLE SECTION ************/
45
46 /* Tape configuration: Select DRIVE, IFC, PORT, IRQ and DMA below.
47 * Runtime (re)configuration is not supported yet.
48 *
49 * Tape drive configuration: (MT_IS* constants are defined in mtio.h)
50 *
51 * QIC02_TAPE_DRIVE = MT_ISWT5150
52 * - Wangtek 5150, format: up to QIC-150.
53 * QIC02_TAPE_DRIVE = MT_ISQIC02_ALL_FEATURES
54 * - Enables some optional QIC02 commands that some drives may lack.
55 * It is provided so you can check which are supported by your drive.
56 * Refer to tpqic02.h for others.
57 *
58 * Supported interface cards: QIC02_TAPE_IFC =
59 * WANGTEK,
60 * ARCHIVE_SC402, ARCHIVE_SC499. (both same programming interface)
61 *
62 * Make sure you have the I/O ports/DMA channels
63 * and IRQ stuff configured properly!
64 * NOTE: There may be other device drivers using the same major
65 * number. This must be avoided. Check for timer.h conflicts too.
66 *
67 * If you have an EVEREX EV-831 card and you are using DMA channel 3,
68 * you will probably have to ``#define QIC02_TAPE_DMA3_FIX'' below.
69 */
70
71 /* CONFIG_QIC02_DYNCONF can be defined in autoconf.h, by `make config' */
72
73 /*** #undef CONFIG_QIC02_DYNCONF ***/
74
75 #ifndef CONFIG_QIC02_DYNCONF
76
77 #define QIC02_TAPE_DRIVE MT_ISQIC02_ALL_FEATURES /* drive type */
78 /* #define QIC02_TAPE_DRIVE MT_ISWT5150 */
79 /* #define QIC02_TAPE_DRIVE MT_ISARCHIVE_5945L2 */
80 /* #define QIC02_TAPE_DRIVE MT_ISTEAC_MT2ST */
81 /* #define QIC02_TAPE_DRIVE MT_ISARCHIVE_2150L */
82 /* #define QIC02_TAPE_DRIVE MT_ISARCHIVESC499 */
83
84 /* Either WANGTEK, ARCHIVE or MOUNTAIN. Not EVEREX.
85 * If you have an EVEREX, use WANGTEK and try the DMA3_FIX below.
86 */
87 #define QIC02_TAPE_IFC WANGTEK /* interface card type */
88 /* #define QIC02_TAPE_IFC ARCHIVE */
89 /* #define QIC02_TAPE_IFC MOUNTAIN */
90
91 #define QIC02_TAPE_PORT 0x300 /* controller port address */
92 #define QIC02_TAPE_IRQ 5 /* For IRQ2, use 9 here, others normal. */
93 #define QIC02_TAPE_DMA 1 /* either 1 or 3, because 2 is used by the floppy */
94
95 /* If DMA3 doesn't work, but DMA1 does, and you have a
96 * Wangtek/Everex card, you can try #define-ing the flag
97 * below. Note that you should also change the DACK jumper
98 * for Wangtek/Everex cards when changing the DMA channel.
99 */
100 #undef QIC02_TAPE_DMA3_FIX
101
102 /************ END OF USER CONFIGURABLE SECTION *************/
103
104 /* I put the stuff above in config.in, but a few recompiles, to
105 * verify different configurations, and several days later I decided
106 * to change it back again.
107 */
108
109
110
111 /* NOTE: TP_HAVE_DENS should distinguish between available densities (?)
112 * NOTE: Drive select is not implemented -- I have only one tape streamer,
113 * so I'm unable and unmotivated to test and implement that. ;-) ;-)
114 */
115 #if QIC02_TAPE_DRIVE == MT_ISWT5150
116 #define TP_HAVE_DENS 1
117 #define TP_HAVE_BSF 0 /* nope */
118 #define TP_HAVE_FSR 0 /* nope */
119 #define TP_HAVE_BSR 0 /* nope */
120 #define TP_HAVE_EOD 0 /* most of the time */
121 #define TP_HAVE_SEEK 0
122 #define TP_HAVE_TELL 0
123 #define TP_HAVE_RAS1 1
124 #define TP_HAVE_RAS2 1
125
126 #elif QIC02_TAPE_DRIVE == MT_ISARCHIVESC499 /* Archive SC-499 QIC-36 controller */
127 #define TP_HAVE_DENS 1 /* can do set density (QIC-11 / QIC-24) */
128 #define TP_HAVE_BSF 0
129 #define TP_HAVE_FSR 1 /* can skip one block forwards */
130 #define TP_HAVE_BSR 1 /* can skip one block backwards */
131 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */
132 #define TP_HAVE_SEEK 0
133 #define TP_HAVE_TELL 0
134 #define TP_HAVE_RAS1 1 /* can run selftest 1 */
135 #define TP_HAVE_RAS2 1 /* can run selftest 2 */
136 /* These last two selftests shouldn't be used yet! */
137
138 #elif (QIC02_TAPE_DRIVE == MT_ISARCHIVE_2060L) || (QIC02_TAPE_DRIVE == MT_ISARCHIVE_2150L)
139 #define TP_HAVE_DENS 1 /* can do set density (QIC-24 / QIC-120 / QIC-150) */
140 #define TP_HAVE_BSF 0
141 #define TP_HAVE_FSR 1 /* can skip one block forwards */
142 #define TP_HAVE_BSR 1 /* can skip one block backwards */
143 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */
144 #define TP_HAVE_TELL 1 /* can read current block address */
145 #define TP_HAVE_SEEK 1 /* can seek to block */
146 #define TP_HAVE_RAS1 1 /* can run selftest 1 */
147 #define TP_HAVE_RAS2 1 /* can run selftest 2 */
148 /* These last two selftests shouldn't be used yet! */
149
150 #elif QIC02_TAPE_DRIVE == MT_ISARCHIVE_5945L2
151 /* can anyone verify this entry?? */
152 #define TP_HAVE_DENS 1 /* can do set density?? (QIC-24??) */
153 #define TP_HAVE_BSF 0
154 #define TP_HAVE_FSR 1 /* can skip one block forwards */
155 #define TP_HAVE_BSR 1 /* can skip one block backwards */
156 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */
157 #define TP_HAVE_TELL 1 /* can read current block address */
158 #define TP_HAVE_SEEK 1 /* can seek to block */
159 #define TP_HAVE_RAS1 1 /* can run selftest 1 */
160 #define TP_HAVE_RAS2 1 /* can run selftest 2 */
161 /* These last two selftests shouldn't be used yet! */
162
163 #elif QIC02_TAPE_DRIVE == MT_ISTEAC_MT2ST
164 /* can anyone verify this entry?? */
165 #define TP_HAVE_DENS 0 /* cannot do set density?? (QIC-150?) */
166 #define TP_HAVE_BSF 0
167 #define TP_HAVE_FSR 1 /* can skip one block forwards */
168 #define TP_HAVE_BSR 1 /* can skip one block backwards */
169 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */
170 #define TP_HAVE_SEEK 1 /* can seek to block */
171 #define TP_HAVE_TELL 1 /* can read current block address */
172 #define TP_HAVE_RAS1 1 /* can run selftest 1 */
173 #define TP_HAVE_RAS2 1 /* can run selftest 2 */
174 /* These last two selftests shouldn't be used yet! */
175
176 #elif QIC02_TAPE_DRIVE == MT_ISQIC02_ALL_FEATURES
177 #define TP_HAVE_DENS 1 /* can do set density */
178 #define TP_HAVE_BSF 1 /* can search filemark backwards */
179 #define TP_HAVE_FSR 1 /* can skip one block forwards */
180 #define TP_HAVE_BSR 1 /* can skip one block backwards */
181 #define TP_HAVE_EOD 1 /* can seek to end of recorded data */
182 #define TP_HAVE_SEEK 1 /* seek to block address */
183 #define TP_HAVE_TELL 1 /* tell current block address */
184 #define TP_HAVE_RAS1 1 /* can run selftest 1 */
185 #define TP_HAVE_RAS2 1 /* can run selftest 2 */
186 /* These last two selftests shouldn't be used yet! */
187
188
189 #else
190 #error No QIC-02 tape drive type defined!
191 /* If your drive is not listed above, first try the 'ALL_FEATURES',
192 * to see what commands are supported, then create your own entry in
193 * the list above. You may want to mail it to me, so that I can include
194 * it in the next release.
195 */
196 #endif
197
198 #endif /* !CONFIG_QIC02_DYNCONF */
199
200
201 /* WANGTEK interface card specifics */
202 #define WT_QIC02_STAT_PORT (QIC02_TAPE_PORT)
203 #define WT_QIC02_CTL_PORT (QIC02_TAPE_PORT)
204 #define WT_QIC02_CMD_PORT (QIC02_TAPE_PORT+1)
205 #define WT_QIC02_DATA_PORT (QIC02_TAPE_PORT+1)
206
207 /* status register bits (Active LOW!) */
208 #define WT_QIC02_STAT_READY 0x01
209 #define WT_QIC02_STAT_EXCEPTION 0x02
210 #define WT_QIC02_STAT_MASK (WT_QIC02_STAT_READY|WT_QIC02_STAT_EXCEPTION)
211
212 #define WT_QIC02_STAT_RESETMASK 0x07
213 #define WT_QIC02_STAT_RESETVAL (WT_QIC02_STAT_RESETMASK & ~WT_QIC02_STAT_EXCEPTION)
214
215 /* controller register (QIC02_CTL_PORT) bits */
216 #define WT_QIC02_CTL_RESET 0x02
217 #define WT_QIC02_CTL_REQUEST 0x04
218 #define WT_CTL_ONLINE 0x01
219 #define WT_CTL_CMDOFF 0xC0
220
221 #define WT_CTL_DMA3 0x10 /* enable dma chan3 */
222 #define WT_CTL_DMA1 0x08 /* enable dma chan1 or chan2 */
223
224
225
226
227 /* ARCHIVE interface card specifics */
228 #define AR_QIC02_STAT_PORT (QIC02_TAPE_PORT+1)
229 #define AR_QIC02_CTL_PORT (QIC02_TAPE_PORT+1)
230 #define AR_QIC02_CMD_PORT (QIC02_TAPE_PORT)
231 #define AR_QIC02_DATA_PORT (QIC02_TAPE_PORT)
232
233 #define AR_START_DMA_PORT (QIC02_TAPE_PORT+2)
234 #define AR_RESET_DMA_PORT (QIC02_TAPE_PORT+3)
235
236 /* STAT port bits */
237 #define AR_STAT_IRQF 0x80 /* active high, interrupt request flag */
238 #define AR_QIC02_STAT_READY 0x40 /* active low */
239 #define AR_QIC02_STAT_EXCEPTION 0x20 /* active low */
240 #define AR_QIC02_STAT_MASK (AR_QIC02_STAT_READY|AR_QIC02_STAT_EXCEPTION)
241 #define AR_STAT_DMADONE 0x10 /* active high, DMA done */
242 #define AR_STAT_DIRC 0x08 /* active high, direction */
243
244 #define AR_QIC02_STAT_RESETMASK 0x70 /* check RDY,EXC,DMADONE */
245 #define AR_QIC02_STAT_RESETVAL ((AR_QIC02_STAT_RESETMASK & ~AR_STAT_IRQF & ~AR_QIC02_STAT_EXCEPTION) | AR_STAT_DMADONE)
246
247 /* CTL port bits */
248 #define AR_QIC02_CTL_RESET 0x80 /* drive reset */
249 #define AR_QIC02_CTL_REQUEST 0x40 /* notify of new command */
250 #define AR_CTL_IEN 0x20 /* interrupt enable */
251 #define AR_CTL_DNIEN 0x10 /* done-interrupt enable */
252 /* Note: All of these bits are cleared automatically when writing to
253 * AR_RESET_DMA_PORT. So AR_CTL_IEN and AR_CTL_DNIEN must be
254 * reprogrammed before the write to AR_START_DMA_PORT.
255 */
256
257
258 /* MOUNTAIN interface specifics */
259 #define MTN_QIC02_STAT_PORT (QIC02_TAPE_PORT+1)
260 #define MTN_QIC02_CTL_PORT (QIC02_TAPE_PORT+1)
261 #define MTN_QIC02_CMD_PORT (QIC02_TAPE_PORT)
262 #define MTN_QIC02_DATA_PORT (QIC02_TAPE_PORT)
263
264 #define MTN_W_SELECT_DMA_PORT (QIC02_TAPE_PORT+2)
265 #define MTN_R_DESELECT_DMA_PORT (QIC02_TAPE_PORT+2)
266 #define MTN_W_DMA_WRITE_PORT (QIC02_TAPE_PORT+3)
267
268 /* STAT port bits */
269 #define MTN_QIC02_STAT_READY 0x02 /* active low */
270 #define MTN_QIC02_STAT_EXCEPTION 0x04 /* active low */
271 #define MTN_QIC02_STAT_MASK (MTN_QIC02_STAT_READY|MTN_QIC02_STAT_EXCEPTION)
272 #define MTN_STAT_DMADONE 0x01 /* active high, DMA done */
273
274 #define MTN_QIC02_STAT_RESETMASK 0x07 /* check RDY,EXC,DMADONE */
275 #define MTN_QIC02_STAT_RESETVAL ((MTN_QIC02_STAT_RESETMASK & ~MTN_QIC02_STAT_EXCEPTION) | MTN_STAT_DMADONE)
276
277 /* CTL port bits */
278 #define MTN_QIC02_CTL_RESET_NOT 0x80 /* drive reset, active low */
279 #define MTN_QIC02_CTL_RESET 0x80 /* Fodder #definition to keep gcc happy */
280
281 #define MTN_QIC02_CTL_ONLINE 0x40 /* Put drive on line */
282 #define MTN_QIC02_CTL_REQUEST 0x20 /* notify of new command */
283 #define MTN_QIC02_CTL_IRQ_DRIVER 0x10 /* Enable IRQ tristate driver */
284 #define MTN_QIC02_CTL_DMA_DRIVER 0x08 /* Enable DMA tristate driver */
285 #define MTN_CTL_EXC_IEN 0x04 /* Exception interrupt enable */
286 #define MTN_CTL_RDY_IEN 0x02 /* Ready interrupt enable */
287 #define MTN_CTL_DNIEN 0x01 /* done-interrupt enable */
288
289 #define MTN_CTL_ONLINE (MTN_QIC02_CTL_RESET_NOT | MTN_QIC02_CTL_IRQ_DRIVER | MTN_QIC02_CTL_DMA_DRIVER)
290
291
292 #ifndef CONFIG_QIC02_DYNCONF
293
294 # define QIC02_TAPE_DEBUG (qic02_tape_debug)
295
296 # if QIC02_TAPE_IFC == WANGTEK
297 # define QIC02_STAT_PORT WT_QIC02_STAT_PORT
298 # define QIC02_CTL_PORT WT_QIC02_CTL_PORT
299 # define QIC02_CMD_PORT WT_QIC02_CMD_PORT
300 # define QIC02_DATA_PORT WT_QIC02_DATA_PORT
301
302 # define QIC02_STAT_READY WT_QIC02_STAT_READY
303 # define QIC02_STAT_EXCEPTION WT_QIC02_STAT_EXCEPTION
304 # define QIC02_STAT_MASK WT_QIC02_STAT_MASK
305 # define QIC02_STAT_RESETMASK WT_QIC02_STAT_RESETMASK
306 # define QIC02_STAT_RESETVAL WT_QIC02_STAT_RESETVAL
307
308 # define QIC02_CTL_RESET WT_QIC02_CTL_RESET
309 # define QIC02_CTL_REQUEST WT_QIC02_CTL_REQUEST
310
311 # if QIC02_TAPE_DMA == 3
312 # ifdef QIC02_TAPE_DMA3_FIX
313 # define WT_CTL_DMA WT_CTL_DMA1
314 # else
315 # define WT_CTL_DMA WT_CTL_DMA3
316 # endif
317 # elif QIC02_TAPE_DMA == 1
318 # define WT_CTL_DMA WT_CTL_DMA1
319 # else
320 # error Unsupported or incorrect DMA configuration.
321 # endif
322
323 # elif QIC02_TAPE_IFC == ARCHIVE
324 # define QIC02_STAT_PORT AR_QIC02_STAT_PORT
325 # define QIC02_CTL_PORT AR_QIC02_CTL_PORT
326 # define QIC02_CMD_PORT AR_QIC02_CMD_PORT
327 # define QIC02_DATA_PORT AR_QIC02_DATA_PORT
328
329 # define QIC02_STAT_READY AR_QIC02_STAT_READY
330 # define QIC02_STAT_EXCEPTION AR_QIC02_STAT_EXCEPTION
331 # define QIC02_STAT_MASK AR_QIC02_STAT_MASK
332 # define QIC02_STAT_RESETMASK AR_QIC02_STAT_RESETMASK
333 # define QIC02_STAT_RESETVAL AR_QIC02_STAT_RESETVAL
334
335 # define QIC02_CTL_RESET AR_QIC02_CTL_RESET
336 # define QIC02_CTL_REQUEST AR_QIC02_CTL_REQUEST
337
338 # if QIC02_TAPE_DMA > 3 /* channel 2 is used by the floppy driver */
339 # error DMA channels other than 1 and 3 are not supported.
340 # endif
341
342 # elif QIC02_TAPE_IFC == MOUNTAIN
343 # define QIC02_STAT_PORT MTN_QIC02_STAT_PORT
344 # define QIC02_CTL_PORT MTN_QIC02_CTL_PORT
345 # define QIC02_CMD_PORT MTN_QIC02_CMD_PORT
346 # define QIC02_DATA_PORT MTN_QIC02_DATA_PORT
347
348 # define QIC02_STAT_READY MTN_QIC02_STAT_READY
349 # define QIC02_STAT_EXCEPTION MTN_QIC02_STAT_EXCEPTION
350 # define QIC02_STAT_MASK MTN_QIC02_STAT_MASK
351 # define QIC02_STAT_RESETMASK MTN_QIC02_STAT_RESETMASK
352 # define QIC02_STAT_RESETVAL MTN_QIC02_STAT_RESETVAL
353
354 # define QIC02_CTL_RESET MTN_QIC02_CTL_RESET
355 # define QIC02_CTL_REQUEST MTN_QIC02_CTL_REQUEST
356
357 # if QIC02_TAPE_DMA > 3 /* channel 2 is used by the floppy driver */
358 # error DMA channels other than 1 and 3 are not supported.
359 # endif
360
361 # else
362 # error No valid interface card specified!
363 # endif /* QIC02_TAPE_IFC */
364
365
366 /* An ugly hack to make sure WT_CTL_DMA is defined even for the
367 * static, non-Wangtek case. The alternative was even worse.
368 */
369 # ifndef WT_CTL_DMA
370 # define WT_CTL_DMA WT_CTL_DMA1
371 # endif
372
373 /*******************/
374
375 #else /* !CONFIG_QIC02_DYNCONF */
376
377 /* Now the runtime config version, using variables instead of constants.
378 *
379 * qic02_tape_dynconf is R/O for the kernel, set from userspace.
380 * qic02_tape_ccb is private to the driver, R/W.
381 */
382
383 # define QIC02_TAPE_DRIVE (qic02_tape_dynconf.mt_type)
384 # define QIC02_TAPE_IFC (qic02_tape_ccb.ifc_type)
385 # define QIC02_TAPE_IRQ (qic02_tape_dynconf.irqnr)
386 # define QIC02_TAPE_DMA (qic02_tape_dynconf.dmanr)
387 # define QIC02_TAPE_PORT (qic02_tape_dynconf.port)
388 # define WT_CTL_DMA (qic02_tape_ccb.dma_enable_value)
389 # define QIC02_TAPE_DEBUG (qic02_tape_dynconf.debug)
390
391 # define QIC02_STAT_PORT (qic02_tape_ccb.port_stat)
392 # define QIC02_CTL_PORT (qic02_tape_ccb.port_ctl)
393 # define QIC02_CMD_PORT (qic02_tape_ccb.port_cmd)
394 # define QIC02_DATA_PORT (qic02_tape_ccb.port_data)
395
396 # define QIC02_STAT_READY (qic02_tape_ccb.stat_ready)
397 # define QIC02_STAT_EXCEPTION (qic02_tape_ccb.stat_exception)
398 # define QIC02_STAT_MASK (qic02_tape_ccb.stat_mask)
399
400 # define QIC02_STAT_RESETMASK (qic02_tape_ccb.stat_resetmask)
401 # define QIC02_STAT_RESETVAL (qic02_tape_ccb.stat_resetval)
402
403 # define QIC02_CTL_RESET (qic02_tape_ccb.ctl_reset)
404 # define QIC02_CTL_REQUEST (qic02_tape_ccb.ctl_request)
405
406 # define TP_HAVE_DENS (qic02_tape_dynconf.have_dens)
407 # define TP_HAVE_BSF (qic02_tape_dynconf.have_bsf)
408 # define TP_HAVE_FSR (qic02_tape_dynconf.have_fsr)
409 # define TP_HAVE_BSR (qic02_tape_dynconf.have_bsr)
410 # define TP_HAVE_EOD (qic02_tape_dynconf.have_eod)
411 # define TP_HAVE_SEEK (qic02_tape_dynconf.have_seek)
412 # define TP_HAVE_TELL (qic02_tape_dynconf.have_tell)
413 # define TP_HAVE_RAS1 (qic02_tape_dynconf.have_ras1)
414 # define TP_HAVE_RAS2 (qic02_tape_dynconf.have_ras2)
415
416 #endif /* CONFIG_QIC02_DYNCONF */
417
418
419 /* "Vendor Unique" codes */
420 /* Archive seek & tell stuff */
421 #define AR_QCMDV_TELL_BLK 0xAE /* read current block address */
422 #define AR_QCMDV_SEEK_BLK 0xAD /* seek to specific block */
423 #define AR_SEEK_BUF_SIZE 3 /* address is 3 bytes */
424
425
426
427 /*
428 * Misc common stuff
429 */
430
431 /* Standard QIC-02 commands -- rev F. All QIC-02 drives must support these */
432 #define QCMD_SEL_1 0x01 /* select drive 1 */
433 #define QCMD_SEL_2 0x02 /* select drive 2 */
434 #define QCMD_SEL_3 0x04 /* select drive 3 */
435 #define QCMD_SEL_4 0x08 /* select drive 4 */
436 #define QCMD_REWIND 0x21 /* rewind tape */
437 #define QCMD_ERASE 0x22 /* erase tape */
438 #define QCMD_RETEN 0x24 /* retension tape */
439 #define QCMD_WRT_DATA 0x40 /* write data */
440 #define QCMD_WRT_FM 0x60 /* write file mark */
441 #define QCMD_RD_DATA 0x80 /* read data */
442 #define QCMD_RD_FM 0xA0 /* read file mark (forward direction) */
443 #define QCMD_RD_STAT 0xC0 /* read status */
444
445 /* Other (optional/vendor unique) commands */
446 /* Density commands are only valid when TP_BOM is set! */
447 #define QCMD_DENS_11 0x26 /* QIC-11 */
448 #define QCMD_DENS_24 0x27 /* QIC-24: 9 track 60MB */
449 #define QCMD_DENS_120 0x28 /* QIC-120: 15 track 120MB */
450 #define QCMD_DENS_150 0x29 /* QIC-150: 18 track 150MB */
451 #define QCMD_DENS_300 0x2A /* QIC-300/QIC-2100 */
452 #define QCMD_DENS_600 0x2B /* QIC-600/QIC-2200 */
453 /* don't know about QIC-1000 and QIC-1350 */
454
455 #define QCMD_WRTNU_DATA 0x40 /* write data, no underruns, insert filler. */
456 #define QCMD_SPACE_FWD 0x81 /* skip next block */
457 #define QCMD_SPACE_BCK 0x89 /* move tape head one block back -- very useful! */
458 #define QCMD_RD_FM_BCK 0xA8 /* read filemark (backwards) */
459 #define QCMD_SEEK_EOD 0xA3 /* skip to EOD */
460 #define QCMD_RD_STAT_X1 0xC1 /* read extended status 1 */
461 #define QCMD_RD_STAT_X2 0xC4 /* read extended status 2 */
462 #define QCMD_RD_STAT_X3 0xE0 /* read extended status 3 */
463 #define QCMD_SELF_TST1 0xC2 /* run self test 1 (nondestructive) */
464 #define QCMD_SELF_TST2 0xCA /* run self test 2 (destructive) */
465
466
467
468 /* Optional, QFA (Quick File Access) commands.
469 * Not all drives support this, but those that do could use these commands
470 * to implement semi-non-sequential access. `mt fsf` would benefit from this.
471 * QFA divides the tape into 2 partitions, a data and a directory partition,
472 * causing some incompatibility problems wrt std QIC-02 data exchange.
473 * It would be useful to cache the directory info, but that might be tricky
474 * to do in kernel-space. [Size constraints.]
475 * Refer to the QIC-02 specs, appendix A for more information.
476 * I have no idea how other *nix variants implement QFA.
477 * I have no idea which drives support QFA and which don't.
478 */
479 #define QFA_ENABLE 0x2D /* enter QFA mode, give @ BOT only */
480 #define QFA_DATA 0x20 /* select data partition */
481 #define QFA_DIR 0x23 /* select directory partition */
482 #define QFA_RD_POS 0xCF /* read position+status bytes */
483 #define QFA_SEEK_EOD 0xA1 /* seek EOD within current partition */
484 #define QFA_SEEK_BLK 0xAF /* seek to a block within current partition */
485
486
487
488
489 /*
490 * Debugging flags
491 */
492 #define TPQD_SENSE_TEXT 0x0001
493 #define TPQD_SENSE_CNTS 0x0002
494 #define TPQD_REWIND 0x0004
495 #define TPQD_TERM_CYCLE 0x0008
496 #define TPQD_IOCTLS 0x0010
497 #define TPQD_DMAX 0x0020
498 #define TPQD_BLKSZ 0x0040
499 #define TPQD_MISC 0x0080
500
501 #define TPQD_DEBUG 0x0100
502
503 #define TPQD_DIAGS 0x1000
504
505 #define TPQD_ALWAYS 0x8000
506
507 #define TPQD_DEFAULT_FLAGS 0x00fc
508
509
510 #define TPQDBG(f) ((QIC02_TAPE_DEBUG) & (TPQD_##f))
511
512
513 /* Minor device codes for tapes:
514 * |7|6|5|4|3|2|1|0|
515 * | \ | / \ | / |_____ 1=rewind on close, 0=no rewind on close
516 * | \|/ |_________ Density: 000=none, 001=QIC-11, 010=24, 011=120,
517 * | | 100=QIC-150, 101..111 reserved.
518 * | |_______________ Reserved for unit numbers.
519 * |___________________ Reserved for diagnostics during debugging.
520 */
521
522 #define TP_REWCLOSE(d) ((MINOR(d)&0x01) == 1) /* rewind bit */
523 /* rewind is only done if data has been transfered */
524 #define TP_DENS(dev) ((MINOR(dev) >> 1) & 0x07) /* tape density */
525 #define TP_UNIT(dev) ((MINOR(dev) >> 4) & 0x07) /* unit number */
526
527 /* print excessive diagnostics */
528 #define TP_DIAGS(dev) (QIC02_TAPE_DEBUG & TPQD_DIAGS)
529
530 /* status codes returned by a WTS_RDSTAT call */
531 struct tpstatus { /* sizeof(short)==2), LSB first */
532 unsigned short exs; /* Drive exception flags */
533 unsigned short dec; /* data error count: nr of blocks rewritten/soft read errors */
534 unsigned short urc; /* underrun count: nr of times streaming was interrupted */
535 };
536 #define TPSTATSIZE sizeof(struct tpstatus)
537
538
539 /* defines for tpstatus.exs -- taken from 386BSD wt driver */
540 #define TP_POR 0x100 /* Power on or reset occurred */
541 #define TP_EOR 0x200 /* REServed for end of RECORDED media */
542 #define TP_PAR 0x400 /* REServed for bus parity */
543 #define TP_BOM 0x800 /* Beginning of media */
544 #define TP_MBD 0x1000 /* Marginal block detected */
545 #define TP_NDT 0x2000 /* No data detected */
546 #define TP_ILL 0x4000 /* Illegal command */
547 #define TP_ST1 0x8000 /* Status byte 1 flag */
548 #define TP_FIL 0x01 /* File mark detected */
549 #define TP_BNL 0x02 /* Bad block not located */
550 #define TP_UDA 0x04 /* Unrecoverable data error */
551 #define TP_EOM 0x08 /* End of media */
552 #define TP_WRP 0x10 /* Write protected cartridge */
553 #define TP_USL 0x20 /* Unselected drive */
554 #define TP_CNI 0x40 /* Cartridge not in place */
555 #define TP_ST0 0x80 /* Status byte 0 flag */
556
557 #define REPORT_ERR0 (TP_CNI|TP_USL|TP_WRP|TP_EOM|TP_UDA|TP_BNL|TP_FIL)
558 #define REPORT_ERR1 (TP_ILL|TP_NDT|TP_MBD|TP_PAR)
559
560
561 /* exception numbers */
562 #define EXC_UNKNOWN 0 /* (extra) Unknown exception code */
563 #define EXC_NDRV 1 /* No drive */
564 #define EXC_NCART 2 /* No cartridge */
565 #define EXC_WP 3 /* Write protected */
566 #define EXC_EOM 4 /* EOM */
567 #define EXC_RWA 5 /* read/write abort */
568 #define EXC_XBAD 6 /* read error, bad block transfered */
569 #define EXC_XFILLER 7 /* read error, filler block transfered */
570 #define EXC_NDT 8 /* read error, no data */
571 #define EXC_NDTEOM 9 /* read error, no data & EOM */
572 #define EXC_NDTBOM 10 /* read error, no data & BOM */
573 #define EXC_FM 11 /* Read a filemark */
574 #define EXC_ILL 12 /* Illegal command */
575 #define EXC_POR 13 /* Power on/reset */
576 #define EXC_MARGINAL 14 /* Marginal block detected */
577 #define EXC_EOR 15 /* (extra, for SEEKEOD) End Of Recorded data reached */
578 #define EXC_BOM 16 /* (extra) BOM reached */
579
580
581 #define TAPE_NOTIFY_TIMEOUT 1000000
582
583 /* internal function return codes */
584 #define TE_OK 0 /* everything is fine */
585 #define TE_EX 1 /* exception detected */
586 #define TE_ERR 2 /* some error */
587 #define TE_NS 3 /* can't read status */
588 #define TE_TIM 4 /* timed out */
589 #define TE_DEAD 5 /* tape drive doesn't respond */
590 #define TE_END 6 /******** Archive hack *****/
591
592 /* timeout timer values -- check these! */
593 #define TIM_S (4*HZ) /* 4 seconds (normal cmds) */
594 #define TIM_M (30*HZ) /* 30 seconds (write FM) */
595 #define TIM_R (8*60*HZ) /* 8 minutes (retensioning) */
596 #define TIM_F (2*3600*HZ) /* est. 1.2hr for full tape read/write+2 retens */
597
598 #define TIMERON(t) timer_table[QIC02_TAPE_TIMER].expires = jiffies + (t); \
599 timer_active |= (1<<QIC02_TAPE_TIMER)
600 #define TIMEROFF timer_active &= ~(1<<QIC02_TAPE_TIMER)
601 #define TIMERCONT timer_active |= (1<<QIC02_TAPE_TIMER)
602
603
604 typedef char flag;
605 #define NO 0 /* NO must be 0 */
606 #define YES 1 /* YES must be != 0 */
607
608
609 #ifdef TDEBUG
610 # define TPQDEB(s) s
611 # define TPQPUTS(s) tpqputs(s)
612 #else
613 # define TPQDEB(s)
614 # define TPQPUTS(s)
615 #endif
616
617
618 /* NR_BLK_BUF is a `tuneable parameter'. If you're really low on
619 * kernel space, you could decrease it to 1, or if you got a very
620 * slow machine, you could increase it up to 128 blocks. Less kernel
621 * buffer blocks result in more context-switching.
622 */
623 #define NR_BLK_BUF 20 /* max 128 blocks */
624 #define TAPE_BLKSIZE 512 /* streamer tape block size (fixed) */
625 #define TPQBUF_SIZE (TAPE_BLKSIZE*NR_BLK_BUF) /* buffer size */
626
627
628 #define BLOCKS_BEYOND_EW 2 /* nr of blocks after Early Warning hole */
629 #define BOGUS_IRQ 32009
630
631
632 /* This is internal data, filled in based on the ifc_type field given
633 * by the user. Everex is mapped to Wangtek with a different
634 * `dma_enable_value', if dmanr==3.
635 */
636 struct qic02_ccb {
637 long ifc_type;
638
639 unsigned short port_stat; /* Status port address */
640 unsigned short port_ctl; /* Control port address */
641 unsigned short port_cmd; /* Command port address */
642 unsigned short port_data; /* Data port address */
643
644 /* status register bits */
645 unsigned short stat_ready; /* drive ready */
646 unsigned short stat_exception; /* drive signals exception */
647 unsigned short stat_mask;
648 unsigned short stat_resetmask;
649 unsigned short stat_resetval;
650
651 /* control register bits */
652 unsigned short ctl_reset; /* reset drive */
653 unsigned short ctl_request; /* latch command */
654
655 /* This is used to change the DMA3 behaviour */
656 unsigned short dma_enable_value;
657 };
658
659
660 extern int qic02_tape_init(void); /* for mem.c */
661
662
663 #endif /* CONFIG_QIC02_TAPE */
664
665 #endif /* _LINUX_TPQIC02_H */
666
![[top]](../icons/top.png){kind=icon}
![[bottom]](../icons/n_bottom.png){kind=icon}
*/