root/include/asm-sparc/pgtsun4c.h

/* */

INCLUDED FROM

DEFINITIONS

1. sun4c_get_synchronous_error
2. sun4c_get_synchronous_address

   1 /* $Id: pgtsun4c.h,v 1.16 1995/11/25 02:32:28 davem Exp $
   2  * pgtsun4c.h:  Sun4c specific pgtable.h defines and code.
   3  *
   4  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6 #ifndef _SPARC_PGTSUN4C_H
   7 #define _SPARC_PGTSUN4C_H
   8 
   9 /* PMD_SHIFT determines the size of the area a second-level page table can map */
  10 #define SUN4C_PMD_SHIFT       22
  11 #define SUN4C_PMD_SIZE        (1UL << SUN4C_PMD_SHIFT)
  12 #define SUN4C_PMD_MASK        (~(SUN4C_PMD_SIZE-1))
  13 #define SUN4C_PMD_ALIGN(addr) (((addr)+SUN4C_PMD_SIZE-1)&SUN4C_PMD_MASK)
  14 
  15 /* PGDIR_SHIFT determines what a third-level page table entry can map */
  16 #define SUN4C_PGDIR_SHIFT       22
  17 #define SUN4C_PGDIR_SIZE        (1UL << SUN4C_PGDIR_SHIFT)
  18 #define SUN4C_PGDIR_MASK        (~(SUN4C_PGDIR_SIZE-1))
  19 #define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK)
  20 
  21 /* To represent how the sun4c mmu really lays things out. */
  22 #define SUN4C_REAL_PGDIR_SHIFT  18
  23 #define SUN4C_REAL_PGDIR_SIZE        (1UL << SUN4C_REAL_PGDIR_SHIFT)
  24 #define SUN4C_REAL_PGDIR_MASK        (~(SUN4C_REAL_PGDIR_SIZE-1))
  25 #define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK)
  26 
  27 /*
  28  * To be efficient, and not have to worry about allocating such
  29  * a huge pgd, we make the kernel sun4c tables each hold 1024
  30  * entries and the pgd similarly just like the i386 tables.
  31  */
  32 #define SUN4C_PTRS_PER_PTE    1024
  33 #define SUN4C_PTRS_PER_PMD    1
  34 #define SUN4C_PTRS_PER_PGD    1024
  35 
  36 /* On the sun4c the physical ram limit is 128MB.  We set up our I/O
  37  * translations at KERNBASE + 128MB for 1MB, then we begin the VMALLOC
  38  * area, makes sense.  This works out to the value below.
  39  */
  40 #define SUN4C_VMALLOC_START   (0xfe100000)
  41 
  42 /*
  43  * Sparc SUN4C pte fields.
  44  */
  45 #define _SUN4C_PAGE_VALID     0x80000000   /* valid page */
  46 #define _SUN4C_PAGE_WRITE     0x40000000   /* can be written to */
  47 #define _SUN4C_PAGE_PRIV      0x20000000   /* bit to signify privileged page */
  48 #define _SUN4C_PAGE_USER      0x00000000   /* User page */
  49 #define _SUN4C_PAGE_NOCACHE   0x10000000   /* non-cacheable page */
  50 #define _SUN4C_PAGE_IO        0x04000000   /* I/O page */
  51 #define _SUN4C_PAGE_REF       0x02000000   /* Page has been accessed/referenced */
  52 #define _SUN4C_PAGE_DIRTY     0x01000000   /* Page has been modified, is dirty */
  53 #define _SUN4C_PAGE_COW       0x00800000   /* COW page */
  54 
  55 /* Note that the 'non-cacheable' bit is not set in any of these settings,
  56  * you may want to turn it on for debugging the flushing of the virtual
  57  * cache on the SUN4C MMU.
  58  */
  59 #define _SUN4C_PAGE_CHG_MASK  (0xffff | _SUN4C_PAGE_REF | _SUN4C_PAGE_DIRTY)
  60 
  61 #define SUN4C_PAGE_NONE     __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_PRIV | \
  62                                      _SUN4C_PAGE_REF)
  63 #define SUN4C_PAGE_SHARED   __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_WRITE | \
  64                                      _SUN4C_PAGE_USER | _SUN4C_PAGE_REF)
  65 #define SUN4C_PAGE_COPY     __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_USER | \
  66                                      _SUN4C_PAGE_REF | _SUN4C_PAGE_COW)
  67 #define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_USER | \
  68                                      _SUN4C_PAGE_REF)
  69 #define SUN4C_PAGE_KERNEL   __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_WRITE | \
  70                                      _SUN4C_PAGE_PRIV | _SUN4C_PAGE_DIRTY | \
  71                                      _SUN4C_PAGE_REF)
  72 #define SUN4C_PAGE_INVALID  __pgprot(0)
  73 
  74 struct pseg_list {
  75         struct pseg_list *next;
  76         struct pseg_list *prev;
  77         struct pseg_list *ctx_next;
  78         struct pseg_list *ctx_prev;
  79         unsigned long vaddr;    /* Where the pseg is mapped. */
  80         unsigned char context;  /* The context in which it is mapped. */
  81         unsigned char pseg;     /* The pseg itself. */
  82         unsigned ref_cnt:21,
  83                  hardlock:1;
  84 };
  85 
  86 extern char *sun4c_lockarea(char *vaddr, unsigned long size);
  87 extern void sun4c_unlockarea(char *vaddr, unsigned long size);
  88 
  89 extern __inline__ unsigned long sun4c_get_synchronous_error(void)
     /*  */
  90 {
  91         unsigned long sync_err;
  92 
  93         __asm__ __volatile__("lda [%1] %2, %0\n\t" :
  94                              "=r" (sync_err) :
  95                              "r" (AC_SYNC_ERR), "i" (ASI_CONTROL));
  96         return sync_err;
  97 }
  98 
  99 extern __inline__ unsigned long sun4c_get_synchronous_address(void)
     /*  */
 100 {
 101         unsigned long sync_addr;
 102 
 103         __asm__ __volatile__("lda [%1] %2, %0\n\t" :
 104                              "=r" (sync_addr) :
 105                              "r" (AC_SYNC_VA), "i" (ASI_CONTROL));
 106         return sync_addr;
 107 }
 108 
 109 #endif /* !(_SPARC_PGTSUN4C_H) */

/* */