root/drivers/block/dtc2278.c

/* [previous][next][first][last][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. sub22
  2. tune_dtc2278
  3. init_dtc2278

   1 /*
   2  *  linux/drivers/block/dtc2278.c       Version 0.02  Feb 10, 1996
   3  *
   4  *  Copyright (C) 1996  Linus Torvalds & author (see below)
   5  */
   6 
   7 #undef REALLY_SLOW_IO           /* most systems can safely undef this */
   8 
   9 #include <linux/types.h>
  10 #include <linux/kernel.h>
  11 #include <linux/delay.h>
  12 #include <linux/timer.h>
  13 #include <linux/mm.h>
  14 #include <linux/ioport.h>
  15 #include <linux/blkdev.h>
  16 #include <linux/hdreg.h>
  17 #include <asm/io.h>
  18 #include "ide.h"
  19 #include "ide_modes.h"
  20 
  21 /*
  22  * Changing this #undef to #define may solve start up problems in some systems.
  23  */
  24 #undef ALWAYS_SET_DTC2278_PIO_MODE
  25 
  26 /*
  27  * From: andy@cercle.cts.com (Dyan Wile)
  28  *
  29  * Below is a patch for DTC-2278 - alike software-programmable controllers
  30  * The code enables the secondary IDE controller and the PIO4 (3?) timings on
  31  * the primary (EIDE). You may probably have to enable the 32-bit support to
  32  * get the full speed. You better get the disk interrupts disabled ( hdparm -u0
  33  * /dev/hd.. ) for the drives connected to the EIDE interface. (I get my
  34  * filesystem  corrupted with -u1, but under heavy disk load only :-)
  35  *
  36  * This card is now forced to use the "serialize" feature,
  37  * and irq-unmasking is disallowed.  If io_32bit is enabled,
  38  * it must be done for BOTH drives on each interface.
  39  *
  40  * This code was written for the DTC2278E, but might work with any of these:
  41  *
  42  * DTC2278S has only a single IDE interface.
  43  * DTC2278D has two IDE interfaces and is otherwise identical to the S version.
  44  * DTC2278E has onboard BIOS, while the others do not.
  45  *
  46  * There may be a fourth controller type. The S and D versions use the
  47  * Winbond chip, and I think the E version does also.
  48  *
  49  */
  50 
  51 static void sub22 (char b, char c)
     /* [previous][next][first][last][top][bottom][index][help] */
  52 {
  53         int i;
  54 
  55         for(i = 0; i < 3; ++i) {
  56                 inb(0x3f6);
  57                 outb_p(b,0xb0);
  58                 inb(0x3f6);
  59                 outb_p(c,0xb4);
  60                 inb(0x3f6);
  61                 if(inb(0xb4) == c) {
  62                         outb_p(7,0xb0);
  63                         inb(0x3f6);
  64                         return; /* success */
  65                 }
  66         }
  67 }
  68 
  69 static void tune_dtc2278 (ide_drive_t *drive, byte pio)
     /* [previous][next][first][last][top][bottom][index][help] */
  70 {
  71         unsigned long flags;
  72 
  73         if (pio == 255)
  74                 pio = ide_get_best_pio_mode(drive);
  75 
  76         if (pio >= 3) {
  77                 save_flags(flags);
  78                 cli();
  79                 /*
  80                  * This enables PIO mode4 (3?) on the first interface
  81                  */
  82                 sub22(1,0xc3);
  83                 sub22(0,0xa0);
  84                 restore_flags(flags);
  85         } else {
  86                 /* we don't know how to set it back again.. */
  87         }
  88 
  89         /*
  90          * 32bit I/O has to be enabled for *both* drives at the same time.
  91          */
  92         drive->io_32bit = 1;
  93         HWIF(drive)->drives[!drive->select.b.unit].io_32bit = 1;
  94 }
  95 
  96 void init_dtc2278 (void)
     /* [previous][next][first][last][top][bottom][index][help] */
  97 {
  98         unsigned long flags;
  99 
 100         save_flags(flags);
 101         cli();
 102         /*
 103          * This enables the second interface
 104          */
 105         outb_p(4,0xb0);
 106         inb(0x3f6);
 107         outb_p(0x20,0xb4);
 108         inb(0x3f6);
 109 #ifdef ALWAYS_SET_DTC2278_PIO_MODE
 110         /*
 111          * This enables PIO mode4 (3?) on the first interface
 112          * and may solve start-up problems for some people.
 113          */
 114         sub22(1,0xc3);
 115         sub22(0,0xa0);
 116 #endif
 117         restore_flags(flags);
 118 
 119         ide_hwifs[0].serialized = 1;
 120         ide_hwifs[0].chipset = ide_dtc2278;
 121         ide_hwifs[1].chipset = ide_dtc2278;
 122         ide_hwifs[0].tuneproc = &tune_dtc2278;
 123         ide_hwifs[0].no_unmask = 1;
 124         ide_hwifs[1].no_unmask = 1;
 125 }

/* [previous][next][first][last][top][bottom][index][help] */