include/asm-sparc/traps.h

/* */
This source file includes following definitions.
get_tbr
   1 /* $Id: traps.h,v 1.5 1995/11/25 02:33:05 davem Exp $
   2  * traps.h:  Format of entries for the Sparc trap table.
   3  *
   4  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6 
   7 #ifndef _SPARC_TRAPS_H
   8 #define _SPARC_TRAPS_H
   9 
  10 #define NUM_SPARC_TRAPS  255
  11 
  12 /* This is for V8 and V9 compliant Sparc CPUS */
  13 struct tt_entry {
  14         unsigned long inst_one;
  15         unsigned long inst_two;
  16         unsigned long inst_three;
  17         unsigned long inst_four;
  18 };
  19 
  20 /* We set this to _start in system setup. */
  21 extern struct tt_entry *sparc_ttable;
  22 
  23 /* This for V9 compliant Sparc CPUS */
  24 struct tt_v9_entry {
  25         unsigned long inst_one;
  26         unsigned long inst_two;
  27         unsigned long inst_three;
  28         unsigned long inst_four;
  29         unsigned long inst_five;
  30         unsigned long inst_six;
  31         unsigned long inst_seven;
  32         unsigned long inst_eight;
  33 };
  34 
  35 /* V9 has multiple trap tables, which one is used depends
  36  * upon how deep within multiple traps you are.
  37  * I believe the UltraSparc supports two levels now.
  38  */
  39 extern struct tt_v9_entry *sparc_v9_ttablel0;
  40 extern struct tt_v9_entry *sparc_v9_ttablel1;
  41 
  42 extern __inline__ unsigned long get_tbr(void)
     /*  */
  43 {
  44         unsigned long tbr;
  45 
  46         __asm__ __volatile__("rd %%tbr, %0\n\t" : "=r" (tbr));
  47         return tbr;
  48 }
  49 
  50 /* For patching the trap table at boot time, we need to know how to
  51  * form various common Sparc instructions.  Thus these macros...
  52  */
  53 
  54 #define SPARC_MOV_CONST_L3(const) (0xa6102000 | (const&0xfff))
  55 
  56 /* The following assumes that the branch lies before the place we
  57  * are branching to.  This is the case for a trap vector...
  58  * You have been warned.
  59  */
  60 #define SPARC_BRANCH(dest_addr, inst_addr) \
  61           (0x10800000 | (((dest_addr-inst_addr)>>2)&0x3fffff))
  62 
  63 #define SPARC_RD_PSR_L0  (0xa1480000)
  64 #define SPARC_NOP (0x01000000)
  65 
  66 /* Various interesting trap levels. */
  67 /* First, hardware traps. */
  68 #define SP_TRAP_TFLT    0x1          /* Text fault */
  69 #define SP_TRAP_II      0x2          /* Illegal Instruction */
  70 #define SP_TRAP_PI      0x3          /* Priviledged Instruction */
  71 #define SP_TRAP_FPD     0x4          /* Floating Point Disabled */
  72 #define SP_TRAP_WOVF    0x5          /* Window Overflow */
  73 #define SP_TRAP_WUNF    0x6          /* Window Underflow */
  74 #define SP_TRAP_MNA     0x7          /* Memory Address Unaligned */
  75 #define SP_TRAP_FPE     0x8          /* Floating Point Exception */
  76 #define SP_TRAP_DFLT    0x9          /* Data Fault */
  77 #define SP_TRAP_TOF     0xa          /* Tag Overflow */
  78 #define SP_TRAP_WDOG    0xb          /* Watchpoint Detected */
  79 #define SP_TRAP_IRQ1    0x11         /* IRQ level 1 */
  80 #define SP_TRAP_IRQ2    0x12         /* IRQ level 2 */
  81 #define SP_TRAP_IRQ3    0x13         /* IRQ level 3 */
  82 #define SP_TRAP_IRQ4    0x14         /* IRQ level 4 */
  83 #define SP_TRAP_IRQ5    0x15         /* IRQ level 5 */
  84 #define SP_TRAP_IRQ6    0x16         /* IRQ level 6 */
  85 #define SP_TRAP_IRQ7    0x17         /* IRQ level 7 */
  86 #define SP_TRAP_IRQ8    0x18         /* IRQ level 8 */
  87 #define SP_TRAP_IRQ9    0x19         /* IRQ level 9 */
  88 #define SP_TRAP_IRQ10   0x1a         /* IRQ level 10 */
  89 #define SP_TRAP_IRQ11   0x1b         /* IRQ level 11 */
  90 #define SP_TRAP_IRQ12   0x1c         /* IRQ level 12 */
  91 #define SP_TRAP_IRQ13   0x1d         /* IRQ level 13 */
  92 #define SP_TRAP_IRQ14   0x1e         /* IRQ level 14 */
  93 #define SP_TRAP_IRQ15   0x1f         /* IRQ level 15 Non-maskable */
  94 #define SP_TRAP_RACC    0x20         /* Register Access Error ??? */
  95 #define SP_TRAP_IACC    0x21         /* Instruction Access Error */
  96 #define SP_TRAP_CPDIS   0x24         /* Co-Processor Disabled */
  97 #define SP_TRAP_BADFL   0x25         /* Unimplemented Flush Instruction */
  98 #define SP_TRAP_CPEXP   0x28         /* Co-Processor Exception */
  99 #define SP_TRAP_DACC    0x29         /* Data Access Error */
 100 #define SP_TRAP_DIVZ    0x2a         /* Divide By Zero */
 101 #define SP_TRAP_DSTORE  0x2b         /* Data Store Error ??? */
 102 #define SP_TRAP_DMM     0x2c         /* Data Access MMU Miss ??? */
 103 #define SP_TRAP_IMM     0x3c         /* Instruction Access MMU Miss ??? */
 104 
 105 /* Now the Software Traps... */
 106 #define SP_TRAP_SUNOS   0x80         /* SunOS System Call */
 107 #define SP_TRAP_SBPT    0x81         /* Software Breakpoint */
 108 #define SP_TRAP_SDIVZ   0x82         /* Software Divide-by-Zero trap */
 109 #define SP_TRAP_FWIN    0x83         /* Flush Windows */
 110 #define SP_TRAP_CWIN    0x84         /* Clean Windows */
 111 #define SP_TRAP_RCHK    0x85         /* Range Check */
 112 #define SP_TRAP_FUNA    0x86         /* Fix Unaligned Access */
 113 #define SP_TRAP_IOWFL   0x87         /* Integer Overflow */
 114 #define SP_TRAP_SOLARIS 0x88         /* Solaris System Call */
 115 #define SP_TRAP_NETBSD  0x89         /* NetBSD System Call */
 116 #define SP_TRAP_LINUX   0x90         /* Linux System Call */
 117 
 118 /* Names used for compatibility with SunOS */
 119 #define ST_SYSCALL              0x00
 120 #define ST_BREAKPOINT           0x01
 121 #define ST_DIV0                 0x02
 122 #define ST_FLUSH_WINDOWS        0x03
 123 #define ST_CLEAN_WINDOWS        0x04
 124 #define ST_RANGE_CHECK          0x05
 125 #define ST_FIX_ALIGN            0x06
 126 #define ST_INT_OVERFLOW         0x07
 127 
 128 /* Special traps... */
 129 #define SP_TRAP_KBPT1   0xfe         /* KADB/PROM Breakpoint one */
 130 #define SP_TRAP_KBPT2   0xff         /* KADB/PROM Breakpoint two */
 131 
 132 /* Handy Macros */
 133 /* Is this a trap we never expect to get? */
 134 #define BAD_TRAP_P(level) \
 135         ((level > SP_TRAP_WDOG && level < SP_TRAP_IRQ1) || \
 136          (level > SP_TRAP_IACC && level < SP_TRAP_CPDIS) || \
 137          (level > SP_TRAP_BADFL && level < SP_TRAP_CPEXP) || \
 138          (level > SP_TRAP_DMM && level < SP_TRAP_IMM) || \
 139          (level > SP_TRAP_IMM && level < SP_TRAP_SUNOS) || \
 140          (level > SP_TRAP_LINUX && level < SP_TRAP_KBPT1))
 141 
 142 /* Is this a Hardware trap? */
 143 #define HW_TRAP_P(level) ((level > 0) && (level < SP_TRAP_SUNOS))
 144 
 145 /* Is this a Software trap? */
 146 #define SW_TRAP_P(level) ((level >= SP_TRAP_SUNOS) && (level <= SP_TRAP_KBPT2))
 147 
 148 /* Is this a system call for some OS we know about? */
 149 #define SCALL_TRAP_P(level) ((level == SP_TRAP_SUNOS) || \
 150                              (level == SP_TRAP_SOLARIS) || \
 151                              (level == SP_TRAP_NETBSD) || \
 152                              (level == SP_TRAP_LINUX))
 153 
 154 #endif /* !(_SPARC_TRAPS_H) */
/* */
root/include/asm-sparc/traps.h

INCLUDED FROM

DEFINITIONS
