This source file includes following definitions.
- eata_scsi_done
- eata_fake_int_handler
- eata_release
- eata_int_handler
- eata_send_command
- eata_send_immediate
- eata_queue
- eata_abort
- eata_reset
- get_board_data
- check_blink_state
- get_conf_PIO
- print_config
- register_HBA
- find_EISA
- find_ISA
- find_PCI
- eata_detect
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56 #include <linux/module.h>
57 #include <linux/kernel.h>
58 #include <linux/sched.h>
59 #include <linux/string.h>
60 #include <linux/ioport.h>
61 #include <linux/malloc.h>
62 #include <linux/in.h>
63 #include <linux/bios32.h>
64 #include <linux/pci.h>
65 #include <linux/proc_fs.h>
66 #include <asm/byteorder.h>
67 #include <asm/types.h>
68 #include <asm/io.h>
69 #include <asm/dma.h>
70 #include <linux/blk.h>
71 #include "scsi.h"
72 #include "sd.h"
73 #include "hosts.h"
74 #include <linux/scsicam.h>
75 #include "eata_dma.h"
76 #include "eata_dma_proc.h"
77
78 #include <linux/stat.h>
79 #include <linux/config.h>
80
81 struct proc_dir_entry proc_scsi_eata_dma = {
82 PROC_SCSI_EATA, 8, "eata_dma",
83 S_IFDIR | S_IRUGO | S_IXUGO, 2
84 };
85
86 static u32 ISAbases[] =
87 {0x1F0, 0x170, 0x330, 0x230};
88 static unchar EISAbases[] =
89 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
90 static uint registered_HBAs = 0;
91 static struct Scsi_Host *last_HBA = NULL;
92 static struct Scsi_Host *first_HBA = NULL;
93 static unchar reg_IRQ[] =
94 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
95 static unchar reg_IRQL[] =
96 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
97 static struct eata_sp *status = 0;
98 static void *dma_scratch = 0;
99
100 static struct eata_register *fake_int_base;
101 static int fake_int_result;
102 static int fake_int_happened;
103
104 static ulong int_counter = 0;
105 static ulong queue_counter = 0;
106
107 void eata_scsi_done (Scsi_Cmnd * scmd)
108 {
109 scmd->request.rq_status = RQ_SCSI_DONE;
110
111 if (scmd->request.sem != NULL)
112 up(scmd->request.sem);
113
114 return;
115 }
116
117 void eata_fake_int_handler(s32 irq, void *dev_id, struct pt_regs * regs)
118 {
119 fake_int_result = inb((ulong)fake_int_base + HA_RSTATUS);
120 fake_int_happened = TRUE;
121 DBG(DBG_INTR3, printk("eata_fake_int_handler called irq%d base %p"
122 " res %#x\n", irq, fake_int_base, fake_int_result));
123 return;
124 }
125
126 #include "eata_dma_proc.c"
127
128 #ifdef MODULE
129 int eata_release(struct Scsi_Host *sh)
130 {
131 uint i;
132 if (sh->irq && reg_IRQ[sh->irq] == 1) free_irq(sh->irq, NULL);
133 else reg_IRQ[sh->irq]--;
134
135 scsi_init_free((void *)status, 512);
136 scsi_init_free((void *)dma_scratch, 512);
137 for (i = 0; i < sh->can_queue; i++){
138 if(SD(sh)->ccb[i].sg_list != NULL)
139 scsi_init_free((void *) SD(sh)->ccb[i].sg_list,
140 sh->sg_tablesize * sizeof(struct eata_sg_list));
141 }
142
143 if (SD(sh)->channel == 0) {
144 if (sh->dma_channel != BUSMASTER) free_dma(sh->dma_channel);
145 if (sh->io_port && sh->n_io_port)
146 release_region(sh->io_port, sh->n_io_port);
147 }
148 return(TRUE);
149 }
150 #endif
151
152
153 void eata_int_handler(int irq, void *dev_id, struct pt_regs * regs)
154 {
155 uint i, result = 0;
156 uint hba_stat, scsi_stat, eata_stat;
157 Scsi_Cmnd *cmd;
158 struct eata_ccb *cp;
159 struct eata_sp *sp;
160 uint base;
161 ulong flags;
162 uint x;
163 struct Scsi_Host *sh;
164
165 save_flags(flags);
166 cli();
167
168 for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->next) {
169 if (sh->irq != irq)
170 continue;
171
172 while(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ) {
173
174 int_counter++;
175
176 sp = &SD(sh)->sp;
177 cp = sp->ccb;
178
179 if(cp == NULL) {
180 eata_stat = inb((uint)sh->base + HA_RSTATUS);
181 printk("eata_dma: int_handler, Spurious IRQ %d "
182 "received. CCB pointer not set.\n", irq);
183 break;
184 }
185
186 cmd = cp->cmd;
187 base = (uint) cmd->host->base;
188 hba_stat = sp->hba_stat;
189
190 scsi_stat = (sp->scsi_stat >> 1) & 0x1f;
191
192 if (sp->EOC == FALSE) {
193 eata_stat = inb(base + HA_RSTATUS);
194 printk("eata_dma: int_handler, board: %x cmd %lx returned "
195 "unfinished.\nEATA: %x HBA: %x SCSI: %x spadr %lx "
196 "spadrirq %lx, irq%d\n", base, (long)cp, eata_stat,
197 hba_stat, scsi_stat,(long)&status, (long)&status[irq],
198 irq);
199 DBG(DBG_DELAY, DEL2(800));
200 break;
201 }
202
203 if (cp->status == LOCKED) {
204 cp->status = FREE;
205 eata_stat = inb(base + HA_RSTATUS);
206 printk("eata_dma: int_handler, freeing locked queueslot\n");
207 DBG(DBG_INTR && DBG_DELAY, DEL2(800));
208 break;
209 }
210
211 eata_stat = inb(base + HA_RSTATUS);
212 DBG(DBG_INTR, printk("IRQ %d received, base %#.4x, pid %ld, "
213 "target: %x, lun: %x, ea_s: %#.2x, hba_s: "
214 "%#.2x \n", irq, base, cmd->pid, cmd->target,
215 cmd->lun, eata_stat, hba_stat));
216
217 switch (hba_stat) {
218 case HA_NO_ERROR:
219 if (scsi_stat == CONDITION_GOOD
220 && cmd->device->type == TYPE_DISK
221 && (HD(cmd)->t_state[cp->cp_channel][cp->cp_id] == RESET))
222 result = DID_BUS_BUSY << 16;
223 else if (scsi_stat == GOOD) {
224 HD(cmd)->t_state[cp->cp_channel][cp->cp_id] = OK;
225 if(HD(cmd)->do_latency == TRUE && cp->timestamp) {
226 uint time;
227 time = jiffies - cp->timestamp;
228 if((cp->rw_latency) == TRUE) {
229 if(HD(cmd)->writes_lat[cp->sizeindex][1] > time)
230 HD(cmd)->writes_lat[cp->sizeindex][1] = time;
231 if(HD(cmd)->writes_lat[cp->sizeindex][2] < time)
232 HD(cmd)->writes_lat[cp->sizeindex][2] = time;
233 HD(cmd)->writes_lat[cp->sizeindex][3] += time;
234 HD(cmd)->writes_lat[cp->sizeindex][0]++;
235 } else {
236 if(HD(cmd)->reads_lat[cp->sizeindex][1] > time)
237 HD(cmd)->reads_lat[cp->sizeindex][1] = time;
238 if(HD(cmd)->reads_lat[cp->sizeindex][2] < time)
239 HD(cmd)->reads_lat[cp->sizeindex][2] = time;
240 HD(cmd)->reads_lat[cp->sizeindex][3] += time;
241 HD(cmd)->reads_lat[cp->sizeindex][0]++;
242 }
243 }
244 }
245 else if (scsi_stat == CHECK_CONDITION
246 && cmd->device->type == TYPE_DISK
247 && (cmd->sense_buffer[2] & 0xf) == RECOVERED_ERROR)
248 result = DID_BUS_BUSY << 16;
249 else
250 result = DID_OK << 16;
251 HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id] = OK;
252 break;
253 case HA_ERR_SEL_TO:
254 result = DID_BAD_TARGET << 16;
255 break;
256 case HA_ERR_CMD_TO:
257 if (HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id] > 1)
258 result = DID_ERROR << 16;
259 else {
260 result = DID_TIME_OUT << 16;
261 HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id]++;
262 }
263 break;
264 case HA_ERR_RESET:
265 case HA_INIT_POWERUP:
266 if (cmd->device->type != TYPE_TAPE)
267 result = DID_BUS_BUSY << 16;
268 else
269 result = DID_ERROR << 16;
270
271 for (i = 0; i < MAXTARGET; i++)
272 HD(cmd)->t_state[cp->cp_channel][i] = RESET;
273 break;
274 case HA_UNX_BUSPHASE:
275 case HA_UNX_BUS_FREE:
276 case HA_BUS_PARITY:
277 case HA_SCSI_HUNG:
278 case HA_UNX_MSGRJCT:
279 case HA_RESET_STUCK:
280 case HA_RSENSE_FAIL:
281 case HA_PARITY_ERR:
282 default:
283 result = DID_ERROR << 16;
284 break;
285 }
286 cmd->result = result | (scsi_stat << 1);
287
288 #if DBG_INTR2
289 if (scsi_stat || result || hba_stat || eata_stat != 0x50
290 || cmd->scsi_done == NULL || cmd->device->id == 7)
291 printk("HBA: %d, channel %d, id: %d, lun %d, pid %ld:\n"
292 "eata_stat %#x, hba_stat %#.2x, scsi_stat %#.2x, "
293 "sense_key: %#x, result: %#.8x\n", x,
294 cmd->device->channel, cmd->device->id, cmd->device->lun,
295 cmd->pid, eata_stat, hba_stat, scsi_stat,
296 cmd->sense_buffer[2] & 0xf, cmd->result);
297 DBG(DBG_INTR&&DBG_DELAY,DEL2(800));
298 #endif
299
300 cp->status = FREE;
301 cmd->scsi_done(cmd);
302 }
303 }
304 restore_flags(flags);
305
306 return;
307 }
308
309 inline int eata_send_command(u32 addr, u32 base, u8 command)
310 {
311 long loop = R_LIMIT;
312
313 while (inb(base + HA_RAUXSTAT) & HA_ABUSY)
314 if (--loop == 0)
315 return(FALSE);
316
317
318 outb( addr & 0x000000ff, base + HA_WDMAADDR);
319 outb((addr & 0x0000ff00) >> 8, base + HA_WDMAADDR + 1);
320 outb((addr & 0x00ff0000) >> 16, base + HA_WDMAADDR + 2);
321 outb((addr & 0xff000000) >> 24, base + HA_WDMAADDR + 3);
322 outb(command, base + HA_WCOMMAND);
323 return(TRUE);
324 }
325
326 #if 0
327 inline int eata_send_immediate(u32 addr, u32 base, u8 cmnd, u8 cmnd2, u8 id,
328 u8 lun)
329 {
330 if(addr){
331 outb( addr & 0x000000ff, base + HA_WDMAADDR);
332 outb((addr & 0x0000ff00) >> 8, base + HA_WDMAADDR + 1);
333 outb((addr & 0x00ff0000) >> 16, base + HA_WDMAADDR + 2);
334 outb((addr & 0xff000000) >> 24, base + HA_WDMAADDR + 3);
335 } else {
336 outb(id, base + HA_WSUBCODE);
337 outb(lun, base + HA_WSUBLUN);
338 }
339
340 outb(cmnd2, base + HA_WCOMMAND2);
341 outb(cmnd, base + HA_WCOMMAND);
342 return(TRUE);
343 }
344 #endif
345
346 int eata_queue(Scsi_Cmnd * cmd, void (* done) (Scsi_Cmnd *))
347 {
348 unsigned int i, x, y;
349 u32 flags;
350 hostdata *hd;
351 struct Scsi_Host *sh;
352 struct eata_ccb *cp;
353 struct scatterlist *sl;
354
355 save_flags(flags);
356 cli();
357
358 queue_counter++;
359
360 hd = HD(cmd);
361 sh = cmd->host;
362
363
364 for (y = hd->last_ccb + 1, x = 0; x < sh->can_queue; x++, y++) {
365 if (y >= sh->can_queue)
366 y = 0;
367 if (hd->ccb[y].status == FREE)
368 break;
369 }
370
371 hd->last_ccb = y;
372
373 if (x >= sh->can_queue) {
374 uint z;
375
376 printk(KERN_EMERG "eata_dma: run out of queue slots cmdno:%ld"
377 " intrno: %ld, can_queue: %d, x: %d, y: %d\n",
378 queue_counter, int_counter, sh->can_queue, x, y);
379 printk(KERN_EMERG "Status of queueslots:");
380 for(z = 0; z < sh->can_queue; z +=2) {
381 switch(hd->ccb[z].status) {
382 case FREE:
383 printk(KERN_EMERG "Slot %2d is FREE \t", z);
384 break;
385 case USED:
386 printk(KERN_EMERG "Slot %2d is USED \t", z);
387 break;
388 case LOCKED:
389 printk(KERN_EMERG "Slot %2d is LOCKED\t", z);
390 break;
391 default:
392 printk(KERN_EMERG "Slot %2d is UNKNOWN\t", z);
393 }
394 panic("\nSystem halted.\n");
395 }
396 }
397 cp = &hd->ccb[y];
398
399 memset(cp, 0, sizeof(struct eata_ccb) - sizeof(struct eata_sg_list *));
400
401 cp->status = USED;
402
403 DBG(DBG_QUEUE, printk("eata_queue pid %ld, target: %x, lun: %x, y %d\n",
404 cmd->pid, cmd->target, cmd->lun, y));
405 DBG(DBG_QUEUE && DBG_DELAY, DEL2(250));
406
407 if(hd->do_latency == TRUE) {
408 int x, z;
409 short *sho;
410 long *lon;
411 x = 0;
412 if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 ||
413 cmd->cmnd[0] == WRITE_12 || cmd->cmnd[0] == READ_6 ||
414 cmd->cmnd[0] == READ_10 || cmd->cmnd[0] == READ_12) {
415
416 cp->timestamp = jiffies;
417 switch(cmd->cmnd[0]) {
418 case WRITE_6:
419 case READ_6:
420 x = cmd->cmnd[4]/2;
421 break;
422 case WRITE_10:
423 case READ_10:
424 sho = (short *) &cmd->cmnd[7];
425 x = ntohs(*sho)/2;
426 break;
427 case WRITE_12:
428 case READ_12:
429 lon = (long *) &cmd->cmnd[6];
430 x = ntohl(*lon)/2;
431 break;
432 }
433
434 for(z = 0; (x > (1 << z)) && (z <= 11); z++)
435 ;
436 cp->sizeindex = z;
437 if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 ||
438 cmd->cmnd[0] == WRITE_12){
439 cp->rw_latency = TRUE;
440 }
441 }
442 }
443 cmd->scsi_done = (void *)done;
444
445 switch (cmd->cmnd[0]) {
446 case CHANGE_DEFINITION: case COMPARE: case COPY:
447 case COPY_VERIFY: case LOG_SELECT: case MODE_SELECT:
448 case MODE_SELECT_10: case SEND_DIAGNOSTIC: case WRITE_BUFFER:
449 case FORMAT_UNIT: case REASSIGN_BLOCKS: case RESERVE:
450 case SEARCH_EQUAL: case SEARCH_HIGH: case SEARCH_LOW:
451 case WRITE_6: case WRITE_10: case WRITE_VERIFY:
452 case UPDATE_BLOCK: case WRITE_LONG: case WRITE_SAME:
453 case SEARCH_HIGH_12: case SEARCH_EQUAL_12: case SEARCH_LOW_12:
454 case WRITE_12: case WRITE_VERIFY_12: case SET_WINDOW:
455 case MEDIUM_SCAN: case SEND_VOLUME_TAG:
456 case 0xea:
457 cp->DataOut = TRUE;
458 break;
459 case TEST_UNIT_READY:
460 default:
461 cp->DataIn = TRUE;
462 }
463
464
465
466
467 if (cmd->target == sh->this_id)
468 cp->Interpret = TRUE;
469
470 if (cmd->use_sg) {
471 cp->scatter = TRUE;
472 if (cp->sg_list == NULL) {
473 cp->sg_list = kmalloc(sh->sg_tablesize * sizeof(struct eata_sg_list),
474 GFP_ATOMIC | GFP_DMA);
475 }
476 if (cp->sg_list == NULL)
477 panic("eata_dma: Run out of DMA memory for SG lists !\n");
478 cp->cp_dataDMA = htonl(virt_to_bus(cp->sg_list));
479
480 cp->cp_datalen = htonl(cmd->use_sg * sizeof(struct eata_sg_list));
481 sl=(struct scatterlist *)cmd->request_buffer;
482 for(i = 0; i < cmd->use_sg; i++, sl++){
483 cp->sg_list[i].data = htonl(virt_to_bus(sl->address));
484 cp->sg_list[i].len = htonl((u32) sl->length);
485 }
486 } else {
487 cp->scatter = FALSE;
488 cp->cp_datalen = htonl(cmd->request_bufflen);
489 cp->cp_dataDMA = htonl(virt_to_bus(cmd->request_buffer));
490 }
491
492 cp->Auto_Req_Sen = TRUE;
493 cp->cp_reqDMA = htonl(virt_to_bus(cmd->sense_buffer));
494 cp->reqlen = sizeof(cmd->sense_buffer);
495
496 cp->cp_id = cmd->target;
497 cp->cp_channel = cmd->channel;
498 cp->cp_lun = cmd->lun;
499 cp->cp_dispri = TRUE;
500 cp->cp_identify = TRUE;
501 memcpy(cp->cp_cdb, cmd->cmnd, cmd->cmd_len);
502
503 cp->cp_statDMA = htonl(virt_to_bus(&(hd->sp)));
504
505 cp->cp_viraddr = cp;
506
507 cp->cmd = cmd;
508 cmd->host_scribble = (char *)&hd->ccb[y];
509
510 if(eata_send_command((u32) cp, (u32) sh->base, EATA_CMD_DMA_SEND_CP) == FALSE) {
511 cmd->result = DID_BUS_BUSY << 16;
512 DBG(DBG_QUEUE && DBG_ABNORM,
513 printk("eata_queue target %d, pid %ld, HBA busy, "
514 "returning DID_BUS_BUSY\n",cmd->target, cmd->pid));
515 done(cmd);
516 cp->status = FREE;
517 restore_flags(flags);
518 return(0);
519 }
520 DBG(DBG_QUEUE, printk("Queued base %#.4x pid: %ld target: %x lun: %x "
521 "slot %d irq %d\n", (s32)sh->base, cmd->pid,
522 cmd->target, cmd->lun, y, sh->irq));
523 DBG(DBG_QUEUE && DBG_DELAY, DEL2(200));
524 restore_flags(flags);
525 return(0);
526 }
527
528
529 int eata_abort(Scsi_Cmnd * cmd)
530 {
531 ulong loop = R_LIMIT;
532 ulong flags;
533
534 save_flags(flags);
535 cli();
536
537 DBG(DBG_ABNORM, printk("eata_abort called pid: %ld target: %x lun: %x"
538 " reason %x\n", cmd->pid, cmd->target, cmd->lun,
539 cmd->abort_reason));
540 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
541
542 while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY) {
543 if (--loop == 0) {
544 printk("eata_dma: abort, timeout error.\n");
545 restore_flags(flags);
546 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
547 return (SCSI_ABORT_ERROR);
548 }
549 }
550 if (CD(cmd)->status == RESET) {
551 restore_flags(flags);
552 printk("eata_dma: abort, command reset error.\n");
553 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
554 return (SCSI_ABORT_ERROR);
555 }
556 if (CD(cmd)->status == LOCKED) {
557 restore_flags(flags);
558 DBG(DBG_ABNORM, printk("eata_dma: abort, queue slot locked.\n"));
559 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
560 return (SCSI_ABORT_NOT_RUNNING);
561 }
562 if (CD(cmd)->status == USED) {
563 DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_BUSY\n"));
564 restore_flags(flags);
565 return (SCSI_ABORT_BUSY);
566 }
567 if (CD(cmd)->status == FREE) {
568 DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_NOT_RUNNING\n"));
569 restore_flags(flags);
570 return (SCSI_ABORT_NOT_RUNNING);
571 }
572 restore_flags(flags);
573 panic("eata_dma: abort: invalid slot status\n");
574 }
575
576 int eata_reset(Scsi_Cmnd * cmd)
577 {
578 ushort x, z;
579 ulong time, limit = 0;
580 ulong loop = R_LIMIT;
581 ulong flags;
582 unchar success = FALSE;
583 Scsi_Cmnd *sp;
584
585 save_flags(flags);
586 cli();
587
588 DBG(DBG_ABNORM, printk("eata_reset called pid:%ld target: %x lun: %x"
589 " reason %x\n", cmd->pid, cmd->target, cmd->lun,
590 cmd->abort_reason));
591
592 if (HD(cmd)->state == RESET) {
593 printk("eata_reset: exit, already in reset.\n");
594 restore_flags(flags);
595 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
596 return (SCSI_RESET_ERROR);
597 }
598
599 while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY)
600 if (--loop == 0) {
601 printk("eata_reset: exit, timeout error.\n");
602 restore_flags(flags);
603 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
604 return (SCSI_RESET_ERROR);
605 }
606
607 for (x = 0; x < MAXCHANNEL; x++) {
608 for (z = 0; z < MAXTARGET; z++) {
609 HD(cmd)->t_state[x][z] = RESET;
610 HD(cmd)->t_timeout[x][z] = NO_TIMEOUT;
611 }
612 }
613
614 for (x = 0; x < cmd->host->can_queue; x++) {
615 if (HD(cmd)->ccb[x].status == FREE)
616 continue;
617
618 if (HD(cmd)->ccb[x].status == LOCKED) {
619 HD(cmd)->ccb[x].status = FREE;
620 printk("eata_reset: locked slot %d forced free.\n", x);
621 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
622 continue;
623 }
624 sp = HD(cmd)->ccb[x].cmd;
625 HD(cmd)->ccb[x].status = RESET;
626 printk("eata_reset: slot %d in reset, pid %ld.\n", x, sp->pid);
627 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
628
629 if (sp == NULL)
630 panic("eata_reset: slot %d, sp==NULL.\n", x);
631 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
632
633 if (sp == cmd)
634 success = TRUE;
635 }
636
637
638 inb((u32) (cmd->host->base) + HA_RSTATUS);
639 eata_send_command(0, (u32) cmd->host->base, EATA_CMD_RESET);
640
641 DBG(DBG_ABNORM, printk("eata_reset: board reset done, enabling interrupts.\n"));
642 HD(cmd)->state = RESET;
643
644 restore_flags(flags);
645
646 time = jiffies;
647 while (jiffies < (time + (3 * HZ)) || limit++ < 10000000)
648 ;
649
650 save_flags(flags);
651 cli();
652
653 DBG(DBG_ABNORM, printk("eata_reset: interrupts disabled, loops %ld.\n",
654 limit));
655 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
656
657 for (x = 0; x < cmd->host->can_queue; x++) {
658
659
660 if (HD(cmd)->ccb[x].status != RESET)
661 continue;
662
663 sp = HD(cmd)->ccb[x].cmd;
664 sp->result = DID_RESET << 16;
665
666
667 HD(cmd)->ccb[x].status = LOCKED;
668
669 printk("eata_reset: slot %d locked, DID_RESET, pid %ld done.\n",
670 x, sp->pid);
671 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
672 restore_flags(flags);
673 sp->scsi_done(sp);
674 cli();
675 }
676
677 HD(cmd)->state = FALSE;
678 restore_flags(flags);
679
680 if (success) {
681 DBG(DBG_ABNORM, printk("eata_reset: exit, success.\n"));
682 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
683 return (SCSI_RESET_SUCCESS);
684 } else {
685 DBG(DBG_ABNORM, printk("eata_reset: exit, wakeup.\n"));
686 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
687 return (SCSI_RESET_PUNT);
688 }
689 }
690
691 char * get_board_data(u32 base, u32 irq, u32 id)
692 {
693 struct eata_ccb *cp;
694 struct eata_sp *sp;
695 static char *buff;
696 ulong i;
697 ulong limit = 0;
698
699 cp = (struct eata_ccb *) scsi_init_malloc(sizeof(struct eata_ccb),
700 GFP_ATOMIC | GFP_DMA);
701 sp = (struct eata_sp *) scsi_init_malloc(sizeof(struct eata_sp),
702 GFP_ATOMIC | GFP_DMA);
703
704 buff = dma_scratch;
705
706 memset(cp, 0, sizeof(struct eata_ccb));
707 memset(sp, 0, sizeof(struct eata_sp));
708 memset(buff, 0, 256);
709
710 cp->DataIn = TRUE;
711 cp->Interpret = TRUE;
712 cp->cp_dispri = TRUE;
713 cp->cp_identify = TRUE;
714
715 cp->cp_datalen = htonl(56);
716 cp->cp_dataDMA = htonl(virt_to_bus(buff));
717 cp->cp_statDMA = htonl(virt_to_bus(sp));
718 cp->cp_viraddr = cp;
719
720 cp->cp_id = id;
721 cp->cp_lun = 0;
722
723 cp->cp_cdb[0] = INQUIRY;
724 cp->cp_cdb[1] = 0;
725 cp->cp_cdb[2] = 0;
726 cp->cp_cdb[3] = 0;
727 cp->cp_cdb[4] = 56;
728 cp->cp_cdb[5] = 0;
729
730 fake_int_base = (struct eata_register *) base;
731 fake_int_result = FALSE;
732 fake_int_happened = FALSE;
733
734 eata_send_command((u32) cp, (u32) base, EATA_CMD_DMA_SEND_CP);
735
736 i = jiffies + (3 * HZ);
737 while (fake_int_happened == FALSE && jiffies <= i)
738 barrier();
739
740 DBG(DBG_INTR3, printk("fake_int_result: %#x hbastat %#x scsistat %#x,"
741 " buff %p sp %p\n",
742 fake_int_result, (u32) (sp->hba_stat ),
743 (u32) sp->scsi_stat, buff, sp));
744
745 scsi_init_free((void *)cp, sizeof(struct eata_ccb));
746 scsi_init_free((void *)sp, sizeof(struct eata_sp));
747
748 if ((fake_int_result & HA_SERROR) || jiffies > i){
749
750 inb((u32) (base) + HA_RSTATUS);
751 eata_send_command(0, base, EATA_CMD_RESET);
752 i = jiffies;
753 while (jiffies < (i + (3 * HZ)) && limit++ < 10000000)
754 barrier();
755 return (NULL);
756 } else
757 return (buff);
758 }
759
760 int check_blink_state(long base)
761 {
762 ushort loops = 10;
763 u32 blinkindicator;
764 u32 state = 0x12345678;
765 u32 oldstate = 0;
766
767 blinkindicator = htonl(0x54504442);
768 while ((loops--) && (state != oldstate)) {
769 oldstate = state;
770 state = inl((uint) base + 1);
771 }
772
773 DBG(DBG_BLINK, printk("Did Blink check. Status: %d\n",
774 (state == oldstate) && (state == blinkindicator)));
775
776 if ((state == oldstate) && (state == blinkindicator))
777 return(TRUE);
778 else
779 return (FALSE);
780 }
781
782 int get_conf_PIO(u32 base, struct get_conf *buf)
783 {
784 ulong loop = R_LIMIT;
785 u16 *p;
786
787 if(check_region(base, 9))
788 return (FALSE);
789
790 memset(buf, 0, sizeof(struct get_conf));
791
792 while (inb(base + HA_RSTATUS) & HA_SBUSY)
793 if (--loop == 0)
794 return (FALSE);
795
796 DBG(DBG_PIO && DBG_PROBE,
797 printk("Issuing PIO READ CONFIG to HBA at %#x\n", base));
798 eata_send_command(0, base, EATA_CMD_PIO_READ_CONFIG);
799
800 loop = R_LIMIT;
801 for (p = (u16 *) buf;
802 (long)p <= ((long)buf + (sizeof(struct get_conf) / 2)); p++) {
803 while (!(inb(base + HA_RSTATUS) & HA_SDRQ))
804 if (--loop == 0)
805 return (FALSE);
806
807 loop = R_LIMIT;
808 *p = inw(base + HA_RDATA);
809 }
810
811 if (!(inb(base + HA_RSTATUS) & HA_SERROR)) {
812 if (htonl(EATA_SIGNATURE) == buf->signature) {
813 DBG(DBG_PIO&&DBG_PROBE, printk("EATA Controller found at %x "
814 "EATA Level: %x\n", (uint) base,
815 (uint) (buf->version)));
816
817 while (inb(base + HA_RSTATUS) & HA_SDRQ)
818 inw(base + HA_RDATA);
819 return (TRUE);
820 }
821 } else {
822 DBG(DBG_PROBE, printk("eata_dma: get_conf_PIO, error during transfer "
823 "for HBA at %lx\n", (long)base));
824 }
825 return (FALSE);
826 }
827
828 void print_config(struct get_conf *gc)
829 {
830 printk("LEN: %d ver:%d OCS:%d TAR:%d TRNXFR:%d MORES:%d DMAS:%d\n",
831 (u32) ntohl(gc->len), gc->version,
832 gc->OCS_enabled, gc->TAR_support, gc->TRNXFR, gc->MORE_support,
833 gc->DMA_support);
834 printk("DMAV:%d HAAV:%d SCSIID0:%d ID1:%d ID2:%d QUEUE:%d SG:%d SEC:%d\n",
835 gc->DMA_valid, gc->HAA_valid, gc->scsi_id[3], gc->scsi_id[2],
836 gc->scsi_id[1], ntohs(gc->queuesiz), ntohs(gc->SGsiz), gc->SECOND);
837 printk("IRQ:%d IRQT:%d DMAC:%d FORCADR:%d SG_64K:%d SG_UAE:%d MID:%d "
838 "MCH:%d MLUN:%d\n",
839 gc->IRQ, gc->IRQ_TR, (8 - gc->DMA_channel) & 7, gc->FORCADR,
840 gc->SG_64K, gc->SG_UAE, gc->MAX_ID, gc->MAX_CHAN, gc->MAX_LUN);
841 printk("RIDQ:%d PCI:%d EISA:%d\n",
842 gc->ID_qest, gc->is_PCI, gc->is_EISA);
843 DBG(DPT_DEBUG, DELAY(14));
844 }
845
846 short register_HBA(u32 base, struct get_conf *gc, Scsi_Host_Template * tpnt,
847 u8 bustype)
848 {
849 ulong size = 0;
850 unchar dma_channel = 0;
851 char *buff = 0;
852 unchar bugs = 0;
853 struct Scsi_Host *sh;
854 hostdata *hd;
855 int x;
856
857
858 DBG(DBG_REGISTER, print_config(gc));
859
860 if (gc->DMA_support == FALSE) {
861 printk("The EATA HBA at %#.4x does not support DMA.\n"
862 "Please use the EATA-PIO driver.\n", base);
863 return (FALSE);
864 }
865 if(gc->HAA_valid == FALSE || ntohl(gc->len) < 0x22)
866 gc->MAX_CHAN = 0;
867
868 if (reg_IRQ[gc->IRQ] == FALSE) {
869 if (!request_irq(gc->IRQ, (void *) eata_fake_int_handler, SA_INTERRUPT,
870 "eata_dma", NULL)){
871 reg_IRQ[gc->IRQ]++;
872 if (!gc->IRQ_TR)
873 reg_IRQL[gc->IRQ] = TRUE;
874 } else {
875 printk("Couldn't allocate IRQ %d, Sorry.", gc->IRQ);
876 return (FALSE);
877 }
878 } else {
879 if (reg_IRQL[gc->IRQ] == TRUE) {
880 printk("Can't support more than one HBA on this IRQ,\n"
881 " if the IRQ is edge triggered. Sorry.\n");
882 return (FALSE);
883 } else
884 reg_IRQ[gc->IRQ]++;
885 }
886
887
888 dma_channel = BUSMASTER;
889 if (gc->DMA_valid) {
890 if (request_dma(dma_channel = (8 - gc->DMA_channel) & 7, "eata_dma")) {
891 printk("Unable to allocate DMA channel %d for ISA HBA at %#.4x.\n",
892 dma_channel, base);
893 reg_IRQ[gc->IRQ]--;
894 if (reg_IRQ[gc->IRQ] == 0)
895 free_irq(gc->IRQ, NULL);
896 if (gc->IRQ_TR == FALSE)
897 reg_IRQL[gc->IRQ] = FALSE;
898 return (FALSE);
899 }
900 }
901
902 #if !(NEWSTUFF)
903 if (bustype != IS_EISA && bustype != IS_ISA)
904 #endif
905 buff = get_board_data(base, gc->IRQ, gc->scsi_id[3]);
906
907 if (buff == NULL) {
908 #if !(NEWSTUFF)
909 if (bustype == IS_EISA || bustype == IS_ISA) {
910 bugs = bugs || BROKEN_INQUIRY;
911 } else {
912 #endif
913 if (gc->DMA_support == FALSE)
914 printk("HBA at %#.4x doesn't support DMA. Sorry\n", base);
915 else
916 printk("HBA at %#.4x does not react on INQUIRY. Sorry.\n",
917 base);
918 if (gc->DMA_valid)
919 free_dma(dma_channel);
920 reg_IRQ[gc->IRQ]--;
921 if (reg_IRQ[gc->IRQ] == 0)
922 free_irq(gc->IRQ, NULL);
923 if (gc->IRQ_TR == FALSE)
924 reg_IRQL[gc->IRQ] = FALSE;
925 return (FALSE);
926 #if !(NEWSTUFF)
927 }
928 #endif
929 }
930
931 if (gc->DMA_support == FALSE && buff != NULL)
932 printk("HBA %.12sat %#.4x doesn't set the DMA_support flag correctly.\n",
933 &buff[16], base);
934
935 request_region(base, 9, "eata_dma");
936
937
938
939
940 if(ntohs(gc->queuesiz) == 0) {
941 gc->queuesiz = ntohs(64);
942 printk("Warning: Queue size has to be corrected. Assuming 64 queueslots\n"
943 " This might be a PM2012B with a defective Firmware\n");
944 }
945
946 size = sizeof(hostdata) + ((sizeof(struct eata_ccb) + sizeof(long))
947 * ntohs(gc->queuesiz));
948
949 DBG(DBG_REGISTER, printk("scsi_register size: %ld\n", size));
950
951 sh = scsi_register(tpnt, size);
952
953 if(sh == NULL) {
954 if (gc->DMA_valid)
955 free_dma(dma_channel);
956
957 reg_IRQ[gc->IRQ]--;
958 if (reg_IRQ[gc->IRQ] == 0)
959 free_irq(gc->IRQ, NULL);
960 if (gc->IRQ_TR == FALSE)
961 reg_IRQL[gc->IRQ] = FALSE;
962 return (FALSE);
963 }
964
965 hd = SD(sh);
966
967 memset(hd->ccb, 0, sizeof(struct eata_ccb) * ntohs(gc->queuesiz));
968 memset(hd->reads, 0, sizeof(u32) * 26);
969
970 hd->broken_INQUIRY = (bugs & BROKEN_INQUIRY);
971
972 if(hd->broken_INQUIRY == TRUE) {
973 strcpy(SD(sh)->vendor, "DPT");
974 strcpy(SD(sh)->name, "??????????");
975 strcpy(SD(sh)->revision, "???.?");
976 } else {
977 strncpy(SD(sh)->vendor, &buff[8], 8);
978 SD(sh)->vendor[8] = 0;
979 strncpy(SD(sh)->name, &buff[16], 17);
980 SD(sh)->name[17] = 0;
981 SD(sh)->revision[0] = buff[32];
982 SD(sh)->revision[1] = buff[33];
983 SD(sh)->revision[2] = buff[34];
984 SD(sh)->revision[3] = '.';
985 SD(sh)->revision[4] = buff[35];
986 SD(sh)->revision[5] = 0;
987 }
988
989 switch (ntohl(gc->len)) {
990 case 0x1c:
991 SD(sh)->EATA_revision = 'a';
992 break;
993 case 0x1e:
994 SD(sh)->EATA_revision = 'b';
995 break;
996 case 0x22:
997 SD(sh)->EATA_revision = 'c';
998 break;
999 case 0x24:
1000 SD(sh)->EATA_revision = 'z';
1001 default:
1002 SD(sh)->EATA_revision = '?';
1003 }
1004
1005 if(ntohl(gc->len) >= 0x22) {
1006 if (gc->is_PCI == TRUE)
1007 hd->bustype = IS_PCI;
1008 else if (gc->is_EISA == TRUE)
1009 hd->bustype = IS_EISA;
1010 else
1011 hd->bustype = IS_ISA;
1012 } else if(hd->broken_INQUIRY == FALSE) {
1013 if (buff[21] == '4')
1014 hd->bustype = IS_PCI;
1015 else if (buff[21] == '2')
1016 hd->bustype = IS_EISA;
1017 else
1018 hd->bustype = IS_ISA;
1019 } else
1020 hd->bustype = bustype;
1021
1022 if(ntohl(gc->len) >= 0x22) {
1023 sh->max_id = gc->MAX_ID + 1;
1024 sh->max_lun = gc->MAX_LUN + 1;
1025 } else {
1026 sh->max_id = 8;
1027 sh->max_lun = 8;
1028 }
1029
1030 hd->channel = gc->MAX_CHAN;
1031 sh->max_channel = gc->MAX_CHAN;
1032 sh->unique_id = base;
1033 sh->base = (char *) base;
1034 sh->io_port = base;
1035 sh->n_io_port = 9;
1036 sh->irq = gc->IRQ;
1037 sh->dma_channel = dma_channel;
1038
1039
1040
1041
1042 sh->this_id = gc->scsi_id[3];
1043 sh->can_queue = ntohs(gc->queuesiz);
1044
1045 if (gc->OCS_enabled == TRUE) {
1046 if(hd->bustype != IS_ISA)
1047 sh->cmd_per_lun = sh->can_queue/C_P_L_DIV;
1048 else
1049 sh->cmd_per_lun = 8;
1050
1051
1052 } else
1053 sh->cmd_per_lun = 1;
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063 if (gc->SG_64K == TRUE && ntohs(gc->SGsiz) == 64 && hd->bustype != IS_ISA){
1064 sh->sg_tablesize = SG_SIZE_BIG;
1065 sh->use_clustering = FALSE;
1066 } else {
1067 sh->sg_tablesize = ntohs(gc->SGsiz);
1068 sh->use_clustering = TRUE;
1069 if (sh->sg_tablesize > SG_SIZE || sh->sg_tablesize == 0) {
1070 sh->sg_tablesize = SG_SIZE;
1071 if (ntohs(gc->SGsiz) == 0)
1072 printk("Warning: SG size had to be corrected.\n"
1073 "This might be a PM2012 with a defective Firmware\n");
1074 }
1075 }
1076
1077 if (gc->SECOND)
1078 hd->primary = FALSE;
1079 else
1080 hd->primary = TRUE;
1081
1082 sh->wish_block = FALSE;
1083
1084 if (hd->bustype != IS_ISA) {
1085 sh->unchecked_isa_dma = FALSE;
1086 } else {
1087 sh->unchecked_isa_dma = TRUE;
1088 }
1089
1090 for(x = 0; x <= 11; x++){
1091 hd->writes_lat[x][1] = 0xffffffff;
1092 hd->reads_lat[x][1] = 0xffffffff;
1093 }
1094
1095 hd->next = NULL;
1096 hd->prev = last_HBA;
1097 if(hd->prev != NULL)
1098 SD(hd->prev)->next = sh;
1099 last_HBA = sh;
1100 if (first_HBA == NULL)
1101 first_HBA = sh;
1102 registered_HBAs++;
1103
1104 return (TRUE);
1105 }
1106
1107
1108 void find_EISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
1109 {
1110 u32 base;
1111 int i;
1112
1113 #if CHECKPAL
1114 u8 pal1, pal2, pal3;
1115 #endif
1116
1117 for (i = 0; i < MAXEISA; i++) {
1118 if (EISAbases[i] == TRUE) {
1119
1120 base = 0x1c88 + (i * 0x1000);
1121 #if CHECKPAL
1122 pal1 = inb((u16)base - 8);
1123 pal2 = inb((u16)base - 7);
1124 pal3 = inb((u16)base - 6);
1125
1126 if (((pal1 == DPT_ID1) && (pal2 == DPT_ID2)) ||
1127 ((pal1 == NEC_ID1) && (pal2 == NEC_ID2) && (pal3 == NEC_ID3))||
1128 ((pal1 == ATT_ID1) && (pal2 == ATT_ID2) && (pal3 == ATT_ID3))){
1129 DBG(DBG_PROBE, printk("EISA EATA id tags found: %x %x %x \n",
1130 (int)pal1, (int)pal2, (int)pal3));
1131 #endif
1132 if (get_conf_PIO(base, buf) == TRUE) {
1133 if (buf->IRQ) {
1134 DBG(DBG_EISA, printk("Registering EISA HBA\n"));
1135 register_HBA(base, buf, tpnt, IS_EISA);
1136 } else
1137 printk("eata_dma: No valid IRQ. HBA removed from list\n");
1138 } else {
1139 if (check_blink_state(base))
1140 printk("HBA is in BLINK state. Consult your HBAs "
1141 "Manual to correct this.\n");
1142 }
1143
1144 EISAbases[i] = 0;
1145 #if CHECKPAL
1146 }
1147 #endif
1148 }
1149 }
1150 return;
1151 }
1152
1153 void find_ISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
1154 {
1155 int i;
1156
1157 for (i = 0; i < MAXISA; i++) {
1158 if (ISAbases[i]) {
1159 if (get_conf_PIO(ISAbases[i],buf) == TRUE){
1160 DBG(DBG_ISA, printk("Registering ISA HBA\n"));
1161 register_HBA(ISAbases[i], buf, tpnt, IS_ISA);
1162 } else {
1163 if (check_blink_state(ISAbases[i]))
1164 printk("HBA is in BLINK state. Consult your HBAs "
1165 "Manual to correct this.\n");
1166 }
1167 ISAbases[i] = 0;
1168 }
1169 }
1170 return;
1171 }
1172
1173 void find_PCI(struct get_conf *buf, Scsi_Host_Template * tpnt)
1174 {
1175
1176 #ifndef CONFIG_PCI
1177 printk("eata_dma: kernel PCI support not enabled. Skipping scan for PCI HBAs.\n");
1178 #else
1179
1180 u8 pci_bus, pci_device_fn;
1181 static s16 pci_index = 0;
1182 u32 base = 0;
1183 u16 com_adr;
1184 u16 rev_device;
1185 u32 error, i, x;
1186 u8 pal1, pal2, pal3;
1187
1188 if (pcibios_present()) {
1189 for (i = 0; i <= MAXPCI; ++i, ++pci_index) {
1190 if (pcibios_find_device(PCI_VENDOR_ID_DPT, PCI_DEVICE_ID_DPT,
1191 pci_index, &pci_bus, &pci_device_fn))
1192 break;
1193 DBG(DBG_PROBE && DBG_PCI,
1194 printk("eata_dma: find_PCI, HBA at bus %d, device %d,"
1195 " function %d, index %d\n", (s32)pci_bus,
1196 (s32)((pci_device_fn & 0xf8) >> 3),
1197 (s32)(pci_device_fn & 7), pci_index));
1198
1199 if (!(error = pcibios_read_config_word(pci_bus, pci_device_fn,
1200 PCI_CLASS_DEVICE, &rev_device))) {
1201 if (rev_device == PCI_CLASS_STORAGE_SCSI) {
1202 if (!(error = pcibios_read_config_word(pci_bus,
1203 pci_device_fn, PCI_COMMAND,
1204 (u16 *) & com_adr))) {
1205 if (!((com_adr & PCI_COMMAND_IO) &&
1206 (com_adr & PCI_COMMAND_MASTER))) {
1207 printk("eata_dma: find_PCI, HBA has IO or BUSMASTER mode disabled\n");
1208 continue;
1209 }
1210 } else
1211 printk("eata_dma: find_PCI, error %x while reading "
1212 "PCI_COMMAND\n", error);
1213 } else
1214 printk("eata_dma: find_PCI, DEVICECLASSID %x didn't match\n",
1215 rev_device);
1216 } else {
1217 printk("eata_dma: find_PCI, error %x while reading PCI_CLASS_BASE\n",
1218 error);
1219 continue;
1220 }
1221
1222 if (!(error = pcibios_read_config_dword(pci_bus, pci_device_fn,
1223 PCI_BASE_ADDRESS_0, (int *) &base))){
1224
1225
1226 if (base & 0x01) {
1227 base &= 0xfffffffe;
1228
1229 pal1 = inb(base);
1230 pal2 = inb(base + 1);
1231 pal3 = inb(base + 2);
1232 if (((pal1 == DPT_ID1) && (pal2 == DPT_ID2)) ||
1233 ((pal1 == NEC_ID1) && (pal2 == NEC_ID2) &&
1234 (pal3 == NEC_ID3)) ||
1235 ((pal1 == ATT_ID1) && (pal2 == ATT_ID2) &&
1236 (pal3 == ATT_ID3)))
1237 base += 0x08;
1238 else
1239 base += 0x10;
1240
1241 if (base != 0x1f8) {
1242
1243 if (get_conf_PIO(base, buf) == TRUE) {
1244
1245
1246
1247
1248
1249 DBG(DBG_PCI, printk("Registering PCI HBA\n"));
1250 register_HBA(base, buf, tpnt, IS_PCI);
1251
1252 if (base < 0x1000) {
1253 for (x = 0; x < MAXISA; ++x) {
1254 if (ISAbases[x] == base) {
1255 ISAbases[x] = 0;
1256 break;
1257 }
1258 }
1259 } else if ((base & 0x0fff) == 0x0c88)
1260 EISAbases[(base >> 12) & 0x0f] = 0;
1261 continue;
1262 } else if (check_blink_state(base) == TRUE) {
1263 printk("eata_dma: HBA is in BLINK state.\n"
1264 "Consult your HBAs Manual to correct this.\n");
1265 }
1266 }
1267 }
1268 } else {
1269 printk("eata_dma: error %x while reading "
1270 "PCI_BASE_ADDRESS_0\n", error);
1271 }
1272 }
1273 } else {
1274 printk("eata_dma: No BIOS32 extensions present. This driver release "
1275 "still depends on it.\n"
1276 " Skipping scan for PCI HBAs. \n");
1277 }
1278 #endif
1279 return;
1280 }
1281
1282 int eata_detect(Scsi_Host_Template * tpnt)
1283 {
1284 struct Scsi_Host *HBA_ptr;
1285 struct get_conf gc;
1286 int i;
1287
1288 DBG((DBG_PROBE && DBG_DELAY) || DPT_DEBUG,
1289 printk("Using lots of delays to let you read the debugging output\n"));
1290
1291 tpnt->proc_dir = &proc_scsi_eata_dma;
1292
1293 status = scsi_init_malloc(512, GFP_ATOMIC | GFP_DMA);
1294 dma_scratch = scsi_init_malloc(512, GFP_ATOMIC | GFP_DMA);
1295
1296 if(status == NULL || dma_scratch == NULL) {
1297 printk("eata_dma: can't allocate enough memory to probe for hosts !\n");
1298 return(0);
1299 }
1300
1301 find_PCI(&gc, tpnt);
1302
1303 find_EISA(&gc, tpnt);
1304
1305 find_ISA(&gc, tpnt);
1306
1307 for (i = 0; i <= MAXIRQ; i++) {
1308 if (reg_IRQ[i]){
1309 free_irq(i, NULL);
1310 request_irq(i, (void *)(eata_int_handler), SA_INTERRUPT, "eata_dma", NULL);
1311 }
1312 }
1313 HBA_ptr = first_HBA;
1314
1315 if (registered_HBAs != 0) {
1316 printk("EATA (Extended Attachment) driver version: %d.%d%s\n"
1317 "developed in co-operation with DPT\n"
1318 "(c) 1993-95 Michael Neuffer, neuffer@goofy.zdv.uni-mainz.de\n",
1319 VER_MAJOR, VER_MINOR, VER_SUB);
1320 printk("Registered HBAs:");
1321 printk("\nHBA no. Boardtype: Revis: EATA: Bus: BaseIO: IRQ: DMA: Ch: "
1322 "ID: Pr: QS: SG: CPL:\n");
1323 for (i = 1; i <= registered_HBAs; i++) {
1324 printk("scsi%-2d: %.10s v%s 2.0%c %s %#.4x %2d",
1325 HBA_ptr->host_no, SD(HBA_ptr)->name, SD(HBA_ptr)->revision,
1326 SD(HBA_ptr)->EATA_revision, (SD(HBA_ptr)->bustype == 'P')?
1327 "PCI ":(SD(HBA_ptr)->bustype == 'E')?"EISA":"ISA ",
1328 (u32) HBA_ptr->base, HBA_ptr->irq);
1329 if(HBA_ptr->dma_channel != BUSMASTER)
1330 printk(" %2x ", HBA_ptr->dma_channel);
1331 else
1332 printk(" %s", "BMST");
1333 printk(" %d %d %c %2d %2d %2d\n", SD(HBA_ptr)->channel,
1334 HBA_ptr->this_id, (SD(HBA_ptr)->primary == TRUE)?'Y':'N',
1335 HBA_ptr->can_queue, HBA_ptr->sg_tablesize, HBA_ptr->cmd_per_lun);
1336 HBA_ptr = SD(HBA_ptr)->next;
1337 }
1338 } else {
1339 scsi_init_free((void *)status, 512);
1340 }
1341
1342 scsi_init_free((void *)dma_scratch, 512);
1343
1344 DBG(DPT_DEBUG, DELAY(12));
1345
1346 return(registered_HBAs);
1347 }
1348
1349 #ifdef MODULE
1350
1351 Scsi_Host_Template driver_template = EATA_DMA;
1352 #include "scsi_module.c"
1353 #endif
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