This source file includes following definitions.
- setipl
- getipl
- swpipl
- xchg_u32
- __xchg
1
2 #ifndef __SPARC_SYSTEM_H
3 #define __SPARC_SYSTEM_H
4
5 #include <linux/kernel.h>
6
7 #include <asm/segment.h>
8 #include <asm/page.h>
9 #include <asm/oplib.h>
10 #include <asm/psr.h>
11
12 #define EMPTY_PGT (&empty_bad_page)
13 #define EMPTY_PGE (&empty_bad_page_table)
14
15 #ifndef __ASSEMBLY__
16
17
18
19
20 enum sparc_cpu {
21 sun4 = 0x00,
22 sun4c = 0x01,
23 sun4m = 0x02,
24 sun4d = 0x03,
25 sun4e = 0x04,
26 sun4u = 0x05,
27 sun_unknown = 0x06,
28 };
29
30 extern enum sparc_cpu sparc_cpu_model;
31
32 extern unsigned long empty_bad_page;
33 extern unsigned long empty_bad_page_table;
34 extern unsigned long empty_zero_page;
35
36 extern struct linux_romvec *romvec;
37 #define halt() romvec->pv_halt()
38
39
40
41
42
43
44 extern void flush_user_windows(void);
45 extern void synchronize_user_stack(void);
46 extern void sparc_switch_to(void *new_task);
47 #define switch_to(p) do { \
48 flush_user_windows(); \
49 switch_to_context(p); \
50 current->tss.current_ds = active_ds; \
51 active_ds = p->tss.current_ds; \
52 sparc_switch_to(p); \
53 } while(0)
54
55
56 extern inline void setipl(int __new_ipl)
57 {
58 __asm__ __volatile__("rd %%psr, %%g1\n\t"
59 "andn %%g1, %1, %%g1\n\t"
60 "sll %0, 8, %%g2\n\t"
61 "and %%g2, %1, %%g2\n\t"
62 "or %%g1, %%g2, %%g1\n\t"
63 "wr %%g1, 0x0, %%psr\n\t"
64 "nop; nop; nop\n\t" : :
65 "r" (__new_ipl), "i" (PSR_PIL) :
66 "g1", "g2");
67 }
68
69 extern inline int getipl(void)
70 {
71 int retval;
72
73 __asm__ __volatile__("rd %%psr, %0\n\t"
74 "and %0, %1, %0\n\t"
75 "srl %0, 8, %0\n\t" :
76 "=r" (retval) :
77 "i" (PSR_PIL));
78 return retval;
79 }
80
81 extern inline int swpipl(int __new_ipl)
82 {
83 int retval;
84
85 __asm__ __volatile__("rd %%psr, %%g1\n\t"
86 "srl %%g1, 8, %0\n\t"
87 "and %0, 15, %0\n\t"
88 "andn %%g1, %2, %%g1\n\t"
89 "and %1, 15, %%g2\n\t"
90 "sll %%g2, 8, %%g2\n\t"
91 "or %%g1, %%g2, %%g1\n\t"
92 "wr %%g1, 0x0, %%psr\n\t"
93 "nop; nop; nop\n\t" :
94 "=r" (retval) :
95 "r" (__new_ipl), "i" (PSR_PIL) :
96 "g1", "g2");
97 return retval;
98 }
99
100 extern char spdeb_buf[256];
101
102 #define cli() setipl(15)
103 #define sti() setipl(0)
104 #define save_flags(flags) do { flags = getipl(); } while (0)
105 #define restore_flags(flags) setipl(flags)
106
107 #define nop() __asm__ __volatile__ ("nop");
108
109 extern inline unsigned long xchg_u32(volatile unsigned long *m, unsigned long val)
110 {
111 unsigned long flags, retval;
112
113 save_flags(flags); cli();
114 retval = *m;
115 *m = val;
116 restore_flags(flags);
117 return retval;
118 }
119
120 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
121 #define tas(ptr) (xchg((ptr),1))
122
123 extern void __xchg_called_with_bad_pointer(void);
124
125 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
126 {
127 switch (size) {
128 case 4:
129 return xchg_u32(ptr, x);
130 };
131 __xchg_called_with_bad_pointer();
132 return x;
133 }
134
135 #endif
136
137 #endif