include/asm-sparc/viking.h

/* */
This source file includes following definitions.
viking_flush_icache
viking_flush_dcache
viking_enable_mxcc
viking_mxcc_scrape
   1 /* $Id: viking.h,v 1.6 1996/03/01 07:21:05 davem Exp $
   2  * viking.h:  Defines specific to the TI Viking MBUS module.
   3  *            This is SRMMU stuff.
   4  *
   5  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   6  */
   7 #ifndef _SPARC_VIKING_H
   8 #define _SPARC_VIKING_H
   9 
  10 #include <asm/mxcc.h>
  11 
  12 /* Bits in the SRMMU control register for TI Viking modules.
  13  *
  14  * -------------------------------------------------------------
  15  * |implvers| RSV |DP|RSV|TC|AC|SP|BM|PC|MBM|SB|IC|DC|RSV|NF|ME|
  16  * -------------------------------------------------------------
  17  *  31    24 23-20 19  18 17 16 15 14 13  12 11 10  9 8-2  1  0
  18  *
  19  * DP: Data Prefetcher Enable -- 0 = DP is off, 1 = DP is on
  20  * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable
  21  *                            1 = Twalks are cacheable
  22  * AC: Alternate Cacheable -- 0 = Direct physical accesses not cacheable
  23  *                            1 = Direct physical accesses are cacheable
  24  * SP: SnooP Enable -- 0 = bus snooping off, 1 = bus snooping on
  25  * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode
  26  * MBM: MBus Mode -- 0 = not in MBus mode, 1 = in MBus mode
  27  * SB: StoreBuffer enable -- 0 = store buffer off, 1 = store buffer on
  28  * IC: Instruction Cache -- 0 = off, 1 = on
  29  * DC: Data Cache -- 0 = off, 1 = 0n
  30  * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap
  31  * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating
  32  *
  33  */
  34 
  35 #define VIKING_DCENABLE     0x00000100   /* Enable data cache */
  36 #define VIKING_ICENABLE     0x00000200   /* Enable instruction cache */
  37 #define VIKING_SBENABLE     0x00000400   /* Enable store buffer */
  38 #define VIKING_MMODE        0x00000800   /* MBUS mode */
  39 #define VIKING_PCENABLE     0x00001000   /* Enable parity checking */
  40 
  41 /* Boot mode, 0 at boot-time, 1 after prom initializes the MMU. */
  42 #define VIKING_BMODE        0x00002000   
  43 #define VIKING_SPENABLE     0x00004000   /* Enable bus cache snooping */
  44 
  45 /* The deal with this AC bit is that if you are going to modify the
  46  * contents of physical ram using the MMU bypass, you had better set
  47  * this bit or things will get unsynchronized.  This is only applicable
  48  * if an E-cache (ie. a PAC) is around and the Viking is not in MBUS mode.
  49  */
  50 #define VIKING_ACENABLE     0x00008000   /* Enable alternate caching */
  51 #define VIKING_TCENABLE     0x00010000   /* Enable table-walks to be cached */
  52 #define VIKING_DPENABLE     0x00040000   /* Enable the data prefetcher */
  53 
  54 extern inline void viking_flush_icache(void)
     /*  */
  55 {
  56         __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
  57                              "i" (ASI_M_IC_FLCLEAR));
  58 }
  59 
  60 extern inline void viking_flush_dcache(void)
     /*  */
  61 {
  62         __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
  63                              "i" (ASI_M_DC_FLCLEAR));
  64 }
  65 
  66 /* MXCC stuff... */
  67 extern inline void viking_enable_mxcc(void)
     /*  */
  68 {
  69 }
  70 
  71 extern inline void viking_mxcc_scrape(void)
     /*  */
  72 {
  73         /* David, what did you learn in school today? */
  74 
  75 
  76 }
  77 
  78 #endif /* !(_SPARC_VIKING_H) */
/* */
root/include/asm-sparc/viking.h

INCLUDED FROM

DEFINITIONS
