root/include/asm-mips/pica.h

/* */

INCLUDED FROM

DEFINITIONS

1. pica_set_led

   1 /*
   2  * Hardware info about Acer PICA 61 and similar
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 1995 by Andreas Busse and Ralf Baechle
   9  */
  10 #ifndef __ASM_MIPS_PICA_H 
  11 #define __ASM_MIPS_PICA_H 
  12 
  13 /*
  14  * The addresses below are virtual address. The mappings are
  15  * created on startup via wired entries in the tlb. The Mips
  16  * Magnum R3000 and R4000 machines are similar in many aspects,
  17  * but many hardware register are accessible at 0xb9000000 in
  18  * instead of 0xe0000000.
  19  */
  20 
  21 /*
  22  * Revision numbers in PICA_ASIC_REVISION
  23  *
  24  * 0xf0000000 - Rev1
  25  * 0xf0000001 - Rev2
  26  * 0xf0000002 - Rev3
  27  */
  28 #define PICA_ASIC_REVISION      0xe0000008
  29 
  30 /*
  31  * The segments of the seven segment LED are mapped
  32  * to the control bits as follows:
  33  *
  34  *         (7)
  35  *      ---------
  36  *      |       |
  37  *  (2) |       | (6)
  38  *      |  (1)  |
  39  *      ---------
  40  *      |       |
  41  *  (3) |       | (5)
  42  *      |  (4)  |
  43  *      --------- . (0)
  44  */
  45 #define PICA_LED                0xe000f000
  46 
  47 /*
  48  * Some characters for the LED control registers
  49  * The original Mips machines seem to have a LED display
  50  * with integrated decoder while the Acer machines can
  51  * control each of the seven segments and the dot independently.
  52  * It only a toy, anyway...
  53  */
  54 #define LED_DOT                 0x01
  55 #define LED_SPACE               0x00
  56 #define LED_0                   0xfc
  57 #define LED_1                   0x60
  58 #define LED_2                   0xda
  59 #define LED_3                   0xf2
  60 #define LED_4                   0x66
  61 #define LED_5                   0xb6
  62 #define LED_6                   0xbe
  63 #define LED_7                   0xe0
  64 #define LED_8                   0xfe
  65 #define LED_9                   0xf6
  66 #define LED_A                   0xee
  67 #define LED_b                   0x3e
  68 #define LED_C                   0x9c
  69 #define LED_d                   0x7a
  70 #define LED_E                   0x9e
  71 #define LED_F                   0x8e
  72 
  73 #ifndef __LANGUAGE_ASSEMBLY__
  74 
  75 extern __inline__ void pica_set_led(unsigned int bits)
     /*  */
  76 {
  77         volatile unsigned int *led_register = (unsigned int *) PICA_LED;
  78 
  79         *led_register = bits;
  80 }
  81 
  82 #endif
  83 
  84 /*
  85  * i8042 keyboard controller for PICA chipset.
  86  * This address is just a guess and seems to differ
  87  * from the other mips machines...
  88  */
  89 #define PICA_KEYBOARD_ADDRESS   0xe0005000
  90 #define PICA_KEYBOARD_DATA      0xe0005000
  91 #define PICA_KEYBOARD_COMMAND   0xe0005001
  92 
  93 #ifndef __LANGUAGE_ASSEMBLY__
  94 
  95 typedef struct {
  96         unsigned char data;
  97         unsigned char command;
  98 } pica_keyboard_hardware;
  99 
 100 typedef struct {
 101         unsigned char pad0[3];
 102         unsigned char data;
 103         unsigned char pad1[3];
 104         unsigned char command;
 105 } mips_keyboard_hardware;
 106 
 107 /*
 108  * For now
 109  */
 110 #define keyboard_hardware       pica_keyboard_hardware
 111 
 112 #endif
 113 
 114 /*
 115  * i8042 keyboard controller for most other Mips machines.
 116  */
 117 #define MIPS_KEYBOARD_ADDRESS   0xb9005000
 118 #define MIPS_KEYBOARD_DATA      0xb9005003
 119 #define MIPS_KEYBOARD_COMMAND   0xb9005007
 120 
 121 #ifndef __LANGUAGE_ASSEMBLY__
 122 
 123 #endif
 124 
 125 /*
 126  * PICA timer registers and interrupt no.
 127  * Note that the hardware timer interrupt is actually on
 128  * cpu level 6, but to keep compatibility with PC stuff
 129  * it is remapped to vector 0. See arch/mips/kernel/entry.S.
 130  */
 131 #define PICA_TIMER_INTERVAL     0xe0000228
 132 #define PICA_TIMER_REGISTER     0xe0000230
 133 
 134 /*
 135  * DRAM configuration register
 136  */
 137 #ifndef __LANGUAGE_ASSEMBLY__
 138 #ifdef __MIPSEL__
 139 typedef struct {
 140         unsigned int bank2 : 3;
 141         unsigned int bank1 : 3;
 142         unsigned int mem_bus_width : 1;
 143         unsigned int reserved2 : 1;
 144         unsigned int page_mode : 1;
 145         unsigned int reserved1 : 23;
 146 } dram_configuration;
 147 #else /* defined (__MIPSEB__) */
 148 typedef struct {
 149         unsigned int reserved1 : 23;
 150         unsigned int page_mode : 1;
 151         unsigned int reserved2 : 1;
 152         unsigned int mem_bus_width : 1;
 153         unsigned int bank1 : 3;
 154         unsigned int bank2 : 3;
 155 } dram_configuration;
 156 #endif
 157 #endif /* __LANGUAGE_ASSEMBLY__ */
 158 
 159 #define PICA_DRAM_CONFIG        0xe00fffe0
 160 
 161 /*
 162  * PICA interrupt control registers
 163  */
 164 #define PICA_IO_IRQ_SOURCE      0xe0100000
 165 #define PICA_IO_IRQ_ENABLE      0xe0100002
 166 
 167 /*
 168  * Pica interrupt enable bits
 169  */
 170 #define PIE_PARALLEL            (1<<0)
 171 #define PIE_FLOPPY              (1<<1)
 172 #define PIE_SOUND               (1<<2)
 173 #define PIE_VIDEO               (1<<3)
 174 #define PIE_ETHERNET            (1<<4)
 175 #define PIE_SCSI                (1<<5)
 176 #define PIE_KEYBOARD            (1<<6)
 177 #define PIE_MOUSE               (1<<7)
 178 #define PIE_SERIAL1             (1<<8)
 179 #define PIE_SERIAL2             (1<<9)
 180 
 181 #endif /* __ASM_MIPS_PICA_H */

/* */