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1 /********************************************************
2 * Header file for eata_dma.c and eata_pio.c *
3 * Linux EATA SCSI drivers *
4 * (c) 1993,94,95 Michael Neuffer *
5 *********************************************************
6 * last change: 95/06/20 *
7 ********************************************************/
8
9
10 #ifndef _EATA_GENERIC_H
11 #define _EATA_GENERIC_H
12
13
14
15 /*********************************************
16 * Misc. definitions *
17 *********************************************/
18
19 #ifndef TRUE
20 #define TRUE 1
21 #endif
22 #ifndef FALSE
23 #define FALSE 0
24 #endif
25
26 #define min(a,b) ((a<b)?(a):(b))
27
28 #define R_LIMIT 0x20000
29
30 #define MAXISA 4
31 #define MAXEISA 16
32 #define MAXPCI 16
33 #define MAXIRQ 16
34 #define MAXTARGET 16
35 #define MAXCHANNEL 3
36
37 #define IS_ISA 'I'
38 #define IS_EISA 'E'
39 #define IS_PCI 'P'
40
41 #define BROKEN_INQUIRY 1
42
43 #define EATA_SIGNATURE 0x45415441 /* BIG ENDIAN coded "EATA" sig. */
44 #define EATA_CP_SIZE 44
45
46 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */
47 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */
48 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */
49
50 #define SG_SIZE 64
51 #define SG_SIZE_BIG 509 /* max. 509 */
52
53 #define C_P_L_DIV 2 /* 1 <= C_P_L_DIV <= 8
54 * You can use this parameter to fine-tune
55 * the driver. Depending on the number of
56 * devices and their speed and ability to queue
57 * commands, you will get the best results with a
58 * value
59 * ~= numdevices-(devices_unable_to_queue_commands/2)
60 * The reason for this is that the disk driver
61 * tends to flood the queue, so that other
62 * drivers have problems to queue commands
63 * themselves. This can for example result in
64 * the effect that the tape stops during disk
65 * accesses.
66 */
67
68 #define FREE 0
69 #define OK 0
70 #define NO_TIMEOUT 0
71 #define USED 1
72 #define TIMEOUT 2
73 #define RESET 4
74 #define LOCKED 8
75
76 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata))
77 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
78 #define SD(host) ((hostdata *)&(host->hostdata))
79
80 #define DELAY(x) { __u32 i; i = jiffies + x; while (jiffies < i); }
81 #define DEL2(x) { __u32 i; for (i = 0; i < 0xffff * x; i++); }
82
83 /***********************************************
84 * EATA Command & Register definitions *
85 ***********************************************/
86 #define PCI_REG_DPTconfig 0x40
87 #define PCI_REG_PumpModeAddress 0x44
88 #define PCI_REG_PumpModeData 0x48
89 #define PCI_REG_ConfigParam1 0x50
90 #define PCI_REG_ConfigParam2 0x54
91
92
93 #define EATA_CMD_PIO_SETUPTEST 0xc6
94 #define EATA_CMD_PIO_READ_CONFIG 0xf0
95 #define EATA_CMD_PIO_SET_CONFIG 0xf1
96 #define EATA_CMD_PIO_SEND_CP 0xf2
97 #define EATA_CMD_PIO_RECEIVE_SP 0xf3
98 #define EATA_CMD_PIO_TRUNC 0xf4
99
100 #define EATA_CMD_RESET 0xf9
101 #define EATA_CMD_IMMEDIATE 0xfa
102
103 #define EATA_CMD_DMA_READ_CONFIG 0xfd
104 #define EATA_CMD_DMA_SET_CONFIG 0xfe
105 #define EATA_CMD_DMA_SEND_CP 0xff
106
107 #define ECS_EMULATE_SENSE 0xd4
108
109
110 #define GENERIC_ABORT 0x00
111 #define SPECIFIC_RESET 0x01
112 #define BUS_RESET 0x02
113 #define SPECIFIC_ABORT 0x03
114 #define QUIET_INTR 0x04
115 #define COLD_BOOT_HBA 0x06 /* Only as a last resort */
116 #define FORCE_IO 0x07
117
118
119 #define HA_WCOMMAND 0x07 /* command register offset */
120 #define HA_WCOMMAND2 0x06 /* immediate command offset */
121 #define HA_WSUBCODE 0x05
122 #define HA_WSUBLUN 0x04
123 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */
124 #define HA_RAUXSTAT 0x08 /* aux status register offset*/
125 #define HA_RSTATUS 0x07 /* status register offset */
126 #define HA_RDATA 0x00 /* data register (16bit) */
127
128 #define HA_ABUSY 0x01 /* aux busy bit */
129 #define HA_AIRQ 0x02 /* aux IRQ pending bit */
130 #define HA_SERROR 0x01 /* pr. command ended in error*/
131 #define HA_SMORE 0x02 /* more data soon to come */
132 #define HA_SCORR 0x04 /* data corrected */
133 #define HA_SDRQ 0x08 /* data request active */
134 #define HA_SSC 0x10 /* seek complete */
135 #define HA_SFAULT 0x20 /* write fault */
136 #define HA_SREADY 0x40 /* drive ready */
137 #define HA_SBUSY 0x80 /* drive busy */
138 #define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ
139
140 /**********************************************
141 * Message definitions *
142 **********************************************/
143
144 #define HA_NO_ERROR 0x00 /* No Error */
145 #define HA_ERR_SEL_TO 0x01 /* Selection Timeout */
146 #define HA_ERR_CMD_TO 0x02 /* Command Timeout */
147 #define HA_ERR_RESET 0x03 /* SCSI Bus Reset Received */
148 #define HA_INIT_POWERUP 0x04 /* Initial Controller Power-up */
149 #define HA_UNX_BUSPHASE 0x05 /* Unexpected Bus Phase */
150 #define HA_UNX_BUS_FREE 0x06 /* Unexpected Bus Free */
151 #define HA_BUS_PARITY 0x07 /* Bus Parity Error */
152 #define HA_SCSI_HUNG 0x08 /* SCSI Hung */
153 #define HA_UNX_MSGRJCT 0x09 /* Unexpected Message Rejected */
154 #define HA_RESET_STUCK 0x0a /* SCSI Bus Reset Stuck */
155 #define HA_RSENSE_FAIL 0x0b /* Auto Request-Sense Failed */
156 #define HA_PARITY_ERR 0x0c /* Controller Ram Parity Error */
157 #define HA_CP_ABORT_NA 0x0d /* Abort Message sent to non-active cmd */
158 #define HA_CP_ABORTED 0x0e /* Abort Message sent to active cmd */
159 #define HA_CP_RESET_NA 0x0f /* Reset Message sent to non-active cmd */
160 #define HA_CP_RESET 0x10 /* Reset Message sent to active cmd */
161 #define HA_ECC_ERR 0x11 /* Controller Ram ECC Error */
162 #define HA_PCI_PARITY 0x12 /* PCI Parity Error */
163 #define HA_PCI_MABORT 0x13 /* PCI Master Abort */
164 #define HA_PCI_TABORT 0x14 /* PCI Target Abort */
165 #define HA_PCI_STABORT 0x15 /* PCI Signaled Target Abort */
166
167 /**********************************************
168 * Other definitions *
169 **********************************************/
170
171 struct reg_bit { /* reading this one will clear the interrupt */
172 __u8 error:1; /* previous command ended in an error */
173 __u8 more:1; /* more DATA coming soon, poll BSY & DRQ (PIO) */
174 __u8 corr:1; /* data read was successfully corrected with ECC*/
175 __u8 drq:1; /* data request active */
176 __u8 sc:1; /* seek complete */
177 __u8 fault:1; /* write fault */
178 __u8 ready:1; /* drive ready */
179 __u8 busy:1; /* controller busy */
180 };
181
182 struct reg_abit { /* reading this won't clear the interrupt */
183 __u8 abusy:1; /* auxiliary busy */
184 __u8 irq:1; /* set when drive interrupt is asserted */
185 __u8 dummy:6;
186 };
187
188 struct eata_register { /* EATA register set */
189 __u8 data_reg[2]; /* R, couldn't figure this one out */
190 __u8 cp_addr[4]; /* W, CP address register */
191 union {
192 __u8 command; /* W, command code: [read|set] conf, send CP*/
193 struct reg_bit status; /* R, see register_bit1 */
194 __u8 statusbyte;
195 } ovr;
196 struct reg_abit aux_stat; /* R, see register_bit2 */
197 };
198
199 struct get_conf { /* Read Configuration Array */
200 __u32 len; /* Should return 0x22, 0x24, etc */
201 __u32 signature; /* Signature MUST be "EATA" */
202 __u8 version2:4,
203 version:4; /* EATA Version level */
204 __u8 OCS_enabled:1, /* Overlap Command Support enabled */
205 TAR_support:1, /* SCSI Target Mode supported */
206 TRNXFR:1, /* Truncate Transfer Cmd not necessary */
207 /* Only used in PIO Mode */
208 MORE_support:1, /* MORE supported (only PIO Mode) */
209 DMA_support:1, /* DMA supported Driver uses only */
210 /* this mode */
211 DMA_valid:1, /* DRQ value in Byte 30 is valid */
212 ATA:1, /* ATA device connected (not supported) */
213 HAA_valid:1; /* Hostadapter Address is valid */
214
215 __u16 cppadlen; /* Number of pad bytes send after CD data */
216 /* set to zero for DMA commands */
217 __u8 scsi_id[4]; /* SCSI ID of controller 2-0 Byte 0 res. */
218 /* if not, zero is returned */
219 __u32 cplen; /* CP length: number of valid cp bytes */
220 __u32 splen; /* Number of bytes returned after */
221 /* Receive SP command */
222 __u16 queuesiz; /* max number of queueable CPs */
223 __u16 dummy;
224 __u16 SGsiz; /* max number of SG table entries */
225 __u8 IRQ:4, /* IRQ used this HA */
226 IRQ_TR:1, /* IRQ Trigger: 0=edge, 1=level */
227 SECOND:1, /* This is a secondary controller */
228 DMA_channel:2; /* DRQ index, DRQ is 2comp of DRQX */
229 __u8 sync; /* device at ID 7 tru 0 is running in */
230 /* synchronous mode, this will disappear */
231 __u8 DSBLE:1, /* ISA i/o addressing is disabled */
232 FORCADR:1, /* i/o address has been forced */
233 SG_64K:1,
234 SG_UAE:1,
235 :4;
236 __u8 MAX_ID:5, /* Max number of SCSI target IDs */
237 MAX_CHAN:3; /* Number of SCSI busses on HBA */
238 __u8 MAX_LUN; /* Max number of LUNs */
239 __u8 :3,
240 AUTOTRM:1,
241 M1_inst:1,
242 ID_qest:1, /* Raidnum ID is questionable */
243 is_PCI:1, /* HBA is PCI */
244 is_EISA:1; /* HBA is EISA */
245 __u8 unused[478];
246 };
247
248 struct eata_sg_list
249 {
250 __u32 data;
251 __u32 len;
252 };
253
254 struct eata_ccb { /* Send Command Packet structure */
255
256 __u8 SCSI_Reset:1, /* Cause a SCSI Bus reset on the cmd */
257 HBA_Init:1, /* Cause Controller to reinitialize */
258 Auto_Req_Sen:1, /* Do Auto Request Sense on errors */
259 scatter:1, /* Data Ptr points to a SG Packet */
260 Resrvd:1, /* RFU */
261 Interpret:1, /* Interpret the SCSI cdb of own use */
262 DataOut:1, /* Data Out phase with command */
263 DataIn:1; /* Data In phase with command */
264 __u8 reqlen; /* Request Sense Length */
265 /* Valid if Auto_Req_Sen=1 */
266 __u8 unused[3];
267 __u8 FWNEST:1, /* send cmd to phys RAID component*/
268 unused2:7;
269 __u8 Phsunit:1, /* physical unit on mirrored pair */
270 I_AT:1, /* inhibit address translation */
271 I_HBA_C:1, /* HBA inhibit caching */
272 unused3:5;
273
274 __u8 cp_id:5, /* SCSI Device ID of target */
275 cp_channel:3; /* SCSI Channel # of HBA */
276 __u8 cp_lun:3,
277 :2,
278 cp_luntar:1, /* CP is for target ROUTINE */
279 cp_dispri:1, /* Grant disconnect privilege */
280 cp_identify:1; /* Always TRUE */
281 __u8 cp_msg1; /* Message bytes 0-3 */
282 __u8 cp_msg2;
283 __u8 cp_msg3;
284 __u8 cp_cdb[12]; /* Command Descriptor Block */
285 __u32 cp_datalen; /* Data Transfer Length */
286 /* If scatter=1 len of sg package */
287 void *cp_viraddr; /* address of this ccb */
288 __u32 cp_dataDMA; /* Data Address, if scatter=1 *
289 * address of scatter packet */
290 __u32 cp_statDMA; /* address for Status Packet */
291 __u32 cp_reqDMA; /* Request Sense Address, used if */
292 /* CP command ends with error */
293 /* Additional CP info begins here */
294 __u32 timeout;
295 __u8 retries;
296 __u8 status; /* status of this queueslot */
297
298 Scsi_Cmnd *cmd; /* address of cmd */
299 struct eata_sg_list *sg_list;
300 };
301
302
303 struct eata_sp {
304 __u8 hba_stat:7, /* HBA status */
305 EOC:1; /* True if command finished */
306 __u8 scsi_stat; /* Target SCSI status */
307 __u8 reserved[2];
308 __u32 residue_len; /* Number of bytes not transferred */
309 struct eata_ccb *ccb; /* Address set in COMMAND PACKET */
310 __u8 msg[12];
311 };
312
313 typedef struct hstd {
314 __u8 vendor[9];
315 __u8 name[18];
316 __u8 revision[6];
317 __u8 EATA_revision;
318 __u8 bustype; /* bustype of HBA */
319 __u8 channel; /* # of avail. scsi channels */
320 __u8 state; /* state of HBA */
321 __u8 primary; /* true if primary */
322 __u8 broken_INQUIRY:1; /* This is an EISA HBA with *
323 * broken INQUIRY */
324 __u32 reads[13];
325 __u32 writes[13];
326 /* state of Target (RESET,..) */
327 __u8 t_state[MAXCHANNEL][MAXTARGET];
328 /* timeouts on target */
329 __u32 t_timeout[MAXCHANNEL][MAXTARGET];
330 __u32 last_ccb; /* Last used ccb */
331 __u32 cplen; /* size of CP in words */
332 __u16 cppadlen; /* pad length of cp in words */
333 __u8 hostid; /* SCSI ID of HBA */
334 __u8 devflags; /* bits set for detected devices */
335 __u8 moresupport; /* HBA supports MORE flag */
336 struct Scsi_Host *next;
337 struct Scsi_Host *prev;
338 struct eata_sp sp; /* status packet */
339 struct eata_ccb ccb[0]; /* ccb array begins here */
340 }hostdata;
341
342 /* structure for max. 2 emulated drives */
343 struct drive_geom_emul {
344 __u8 trans; /* translation flag 1=transl */
345 __u8 channel; /* SCSI channel number */
346 __u8 HBA; /* HBA number (prim/sec) */
347 __u8 id; /* drive id */
348 __u8 lun; /* drive lun */
349 __u32 heads; /* number of heads */
350 __u32 sectors; /* number of sectors */
351 __u32 cylinder; /* number of cylinders */
352 };
353
354 struct geom_emul {
355 __u8 bios_drives; /* number of emulated drives */
356 struct drive_geom_emul drv[2]; /* drive structures */
357 };
358
359 #endif /* _EATA_GENERIC_H */
360
361 /*
362 * Overrides for Emacs so that we almost follow Linus's tabbing style.
363 * Emacs will notice this stuff at the end of the file and automatically
364 * adjust the settings for this buffer only. This must remain at the end
365 * of the file.
366 * ---------------------------------------------------------------------------
367 * Local variables:
368 * c-indent-level: 4
369 * c-brace-imaginary-offset: 0
370 * c-brace-offset: -4
371 * c-argdecl-indent: 4
372 * c-label-offset: -4
373 * c-continued-statement-offset: 4
374 * c-continued-brace-offset: 0
375 * indent-tabs-mode: nil
376 * tab-width: 8
377 * End:
378 */
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*/