This source file includes following definitions.
- lance_init
- lance_probe1
- lance_open
- lance_purge_tx_ring
- lance_init_ring
- lance_restart
- lance_start_xmit
- lance_interrupt
- lance_rx
- lance_close
- lance_get_stats
- set_multicast_list
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35 static const char *version = "lance.c:v1.08.02 Mar 17 1996 tsbogend@bigbug.franken.de\n";
36
37 #include <linux/config.h>
38 #include <linux/kernel.h>
39 #include <linux/sched.h>
40 #include <linux/string.h>
41 #include <linux/ptrace.h>
42 #include <linux/errno.h>
43 #include <linux/ioport.h>
44 #include <linux/malloc.h>
45 #include <linux/interrupt.h>
46 #include <linux/pci.h>
47 #include <linux/bios32.h>
48 #include <asm/bitops.h>
49 #include <asm/io.h>
50 #include <asm/dma.h>
51
52 #include <linux/netdevice.h>
53 #include <linux/etherdevice.h>
54 #include <linux/skbuff.h>
55
56 static unsigned int lance_portlist[] = {0x300, 0x320, 0x340, 0x360, 0};
57 void lance_probe1(int ioaddr);
58
59 #ifdef HAVE_DEVLIST
60 struct netdev_entry lance_drv =
61 {"lance", lance_probe1, LANCE_TOTAL_SIZE, lance_portlist};
62 #endif
63
64 #ifdef LANCE_DEBUG
65 int lance_debug = LANCE_DEBUG;
66 #else
67 int lance_debug = 1;
68 #endif
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159 #define LANCE_KMALLOC(x) \
160 ((void *) (((unsigned long)kmalloc((x)+7, GFP_DMA | GFP_KERNEL)+7) & ~7))
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172
173 #ifndef LANCE_LOG_TX_BUFFERS
174 #define LANCE_LOG_TX_BUFFERS 4
175 #define LANCE_LOG_RX_BUFFERS 4
176 #endif
177
178 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
179 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
180 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
181
182 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
183 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
184 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
185
186 #define PKT_BUF_SZ 1544
187
188
189 #define LANCE_DATA 0x10
190 #define LANCE_ADDR 0x12
191 #define LANCE_RESET 0x14
192 #define LANCE_BUS_IF 0x16
193 #define LANCE_TOTAL_SIZE 0x18
194
195
196 struct lance_rx_head {
197 s32 base;
198 s16 buf_length;
199 s16 msg_length;
200 };
201
202 struct lance_tx_head {
203 s32 base;
204 s16 length;
205 s16 misc;
206 };
207
208
209 struct lance_init_block {
210 u16 mode;
211 u8 phys_addr[6];
212 u32 filter[2];
213
214 u32 rx_ring;
215 u32 tx_ring;
216 };
217
218 struct lance_private {
219
220 struct lance_rx_head rx_ring[RX_RING_SIZE];
221 struct lance_tx_head tx_ring[TX_RING_SIZE];
222 struct lance_init_block init_block;
223 const char *name;
224
225 struct sk_buff* tx_skbuff[TX_RING_SIZE];
226 unsigned long rx_buffs;
227
228 char (*tx_bounce_buffs)[PKT_BUF_SZ];
229 int cur_rx, cur_tx;
230 int dirty_rx, dirty_tx;
231 int dma;
232 struct enet_statistics stats;
233 unsigned char chip_version;
234 char tx_full;
235 unsigned long lock;
236 };
237
238 #define LANCE_MUST_PAD 0x00000001
239 #define LANCE_ENABLE_AUTOSELECT 0x00000002
240 #define LANCE_MUST_REINIT_RING 0x00000004
241 #define LANCE_MUST_UNRESET 0x00000008
242 #define LANCE_HAS_MISSED_FRAME 0x00000010
243
244
245
246
247 static struct lance_chip_type {
248 int id_number;
249 const char *name;
250 int flags;
251 } chip_table[] = {
252 {0x0000, "LANCE 7990",
253 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
254 {0x0003, "PCnet/ISA 79C960",
255 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
256 LANCE_HAS_MISSED_FRAME},
257 {0x2260, "PCnet/ISA+ 79C961",
258 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
259 LANCE_HAS_MISSED_FRAME},
260 {0x2420, "PCnet/PCI 79C970",
261 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
262 LANCE_HAS_MISSED_FRAME},
263
264
265 {0x2430, "PCnet32",
266 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
267 LANCE_HAS_MISSED_FRAME},
268 {0x0, "PCnet (unknown)",
269 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
270 LANCE_HAS_MISSED_FRAME},
271 };
272
273 enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, LANCE_UNKNOWN=5};
274
275
276 static unsigned char pci_irq_line = 0;
277
278
279
280 static unsigned char lance_need_isa_bounce_buffers = 1;
281
282 static int lance_open(struct device *dev);
283 static void lance_init_ring(struct device *dev);
284 static int lance_start_xmit(struct sk_buff *skb, struct device *dev);
285 static int lance_rx(struct device *dev);
286 static void lance_interrupt(int irq, void *dev_id, struct pt_regs *regs);
287 static int lance_close(struct device *dev);
288 static struct enet_statistics *lance_get_stats(struct device *dev);
289 static void set_multicast_list(struct device *dev);
290
291
292
293
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295
296
297
298
299 int lance_init(void)
300 {
301 #ifndef __alpha__
302 int *port;
303 #endif
304
305 if (high_memory <= 16*1024*1024)
306 lance_need_isa_bounce_buffers = 0;
307
308 #if defined(CONFIG_PCI)
309 if (pcibios_present()) {
310 int pci_index;
311 printk("lance.c: PCI bios is present, checking for devices...\n");
312 for (pci_index = 0; pci_index < 8; pci_index++) {
313 unsigned char pci_bus, pci_device_fn;
314 unsigned int pci_ioaddr;
315 unsigned short pci_command;
316
317 if (pcibios_find_device (PCI_VENDOR_ID_AMD,
318 PCI_DEVICE_ID_AMD_LANCE, pci_index,
319 &pci_bus, &pci_device_fn) != 0)
320 break;
321 pcibios_read_config_byte(pci_bus, pci_device_fn,
322 PCI_INTERRUPT_LINE, &pci_irq_line);
323 pcibios_read_config_dword(pci_bus, pci_device_fn,
324 PCI_BASE_ADDRESS_0, &pci_ioaddr);
325
326 pci_ioaddr &= ~3;
327
328
329
330
331 pcibios_read_config_word(pci_bus, pci_device_fn,
332 PCI_COMMAND, &pci_command);
333 if ( ! (pci_command & PCI_COMMAND_MASTER)) {
334 printk("PCI Master Bit has not been set. Setting...\n");
335 pci_command |= PCI_COMMAND_MASTER;
336 pcibios_write_config_word(pci_bus, pci_device_fn,
337 PCI_COMMAND, pci_command);
338 }
339 printk("Found PCnet/PCI at %#x, irq %d.\n",
340 pci_ioaddr, pci_irq_line);
341 lance_probe1(pci_ioaddr);
342 pci_irq_line = 0;
343 }
344 }
345 #endif
346
347
348 #ifndef __alpha__
349 for (port = lance_portlist; *port; port++) {
350 int ioaddr = *port;
351
352 if ( check_region(ioaddr, LANCE_TOTAL_SIZE) == 0) {
353
354
355 char offset15, offset14 = inb(ioaddr + 14);
356
357 if ((offset14 == 0x52 || offset14 == 0x57) &&
358 ((offset15 = inb(ioaddr + 15)) == 0x57 || offset15 == 0x44))
359 lance_probe1(ioaddr);
360 }
361 }
362 #endif
363
364 return 0;
365 }
366
367 void lance_probe1(int ioaddr)
368 {
369 struct device *dev;
370 struct lance_private *lp;
371 short dma_channels;
372 int i, reset_val, lance_version;
373 const char *chipname;
374
375 unsigned char hpJ2405A = 0;
376 int hp_builtin = 0;
377 static int did_version = 0;
378
379 #ifndef __alpha__
380
381
382
383
384
385 if ( *((unsigned short *) 0x000f0102) == 0x5048) {
386 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
387 int hp_port = ( *((unsigned char *) 0x000f00f1) & 1) ? 0x499 : 0x99;
388
389 if ((inb(hp_port) & 0xc0) == 0x80
390 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
391 hp_builtin = hp_port;
392 }
393
394 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
395 && inb(ioaddr+2) == 0x09);
396 #endif
397
398
399 reset_val = inw(ioaddr+LANCE_RESET);
400
401
402
403 if (!hpJ2405A)
404 outw(reset_val, ioaddr+LANCE_RESET);
405
406 outw(0x0000, ioaddr+LANCE_ADDR);
407 if (inw(ioaddr+LANCE_DATA) != 0x0004)
408 return;
409
410
411 outw(88, ioaddr+LANCE_ADDR);
412 if (inw(ioaddr+LANCE_ADDR) != 88) {
413 lance_version = 0;
414 } else {
415 int chip_version = inw(ioaddr+LANCE_DATA);
416 outw(89, ioaddr+LANCE_ADDR);
417 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
418 if (lance_debug > 2)
419 printk(" LANCE chip version is %#x.\n", chip_version);
420 if ((chip_version & 0xfff) != 0x003)
421 return;
422 chip_version = (chip_version >> 12) & 0xffff;
423 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
424 if (chip_table[lance_version].id_number == chip_version)
425 break;
426 }
427 }
428
429 dev = init_etherdev(0, 0);
430 chipname = chip_table[lance_version].name;
431 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
432
433
434
435 for (i = 0; i < 6; i++)
436 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
437
438 dev->base_addr = ioaddr;
439 request_region(ioaddr, LANCE_TOTAL_SIZE, chip_table[lance_version].name);
440
441 #ifdef CONFIG_LANCE32
442
443 if (lance_version == PCNET_PCI || lance_version == PCNET_VLB) {
444 extern void lance32_probe1 (struct device *dev, const char *chipname, int pci_irq_line);
445
446 lance32_probe1 (dev, chipname, pci_irq_line);
447 return;
448 }
449 #endif
450
451 lp = (struct lance_private *) LANCE_KMALLOC(sizeof(*lp));
452 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp);
453 memset(lp, 0, sizeof(*lp));
454 dev->priv = lp;
455 lp->name = chipname;
456
457 lp->rx_buffs = (unsigned long) LANCE_KMALLOC(PKT_BUF_SZ*RX_RING_SIZE);
458 lp->tx_bounce_buffs = NULL;
459 if (lance_need_isa_bounce_buffers)
460 lp->tx_bounce_buffs = LANCE_KMALLOC(PKT_BUF_SZ*TX_RING_SIZE);
461
462 lp->chip_version = lance_version;
463
464 lp->init_block.mode = 0x0003;
465 for (i = 0; i < 6; i++)
466 lp->init_block.phys_addr[i] = dev->dev_addr[i];
467 lp->init_block.filter[0] = 0x00000000;
468 lp->init_block.filter[1] = 0x00000000;
469 lp->init_block.rx_ring = ((u32)virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
470 lp->init_block.tx_ring = ((u32)virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
471
472 outw(0x0001, ioaddr+LANCE_ADDR);
473 inw(ioaddr+LANCE_ADDR);
474 outw((short) (u32) virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
475 outw(0x0002, ioaddr+LANCE_ADDR);
476 inw(ioaddr+LANCE_ADDR);
477 outw(((u32)virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
478 outw(0x0000, ioaddr+LANCE_ADDR);
479 inw(ioaddr+LANCE_ADDR);
480
481 if (pci_irq_line) {
482 dev->dma = 4;
483 dev->irq = pci_irq_line;
484 } else if (hp_builtin) {
485 static const char dma_tbl[4] = {3, 5, 6, 0};
486 static const char irq_tbl[4] = {3, 4, 5, 9};
487 unsigned char port_val = inb(hp_builtin);
488 dev->dma = dma_tbl[(port_val >> 4) & 3];
489 dev->irq = irq_tbl[(port_val >> 2) & 3];
490 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
491 } else if (hpJ2405A) {
492 static const char dma_tbl[4] = {3, 5, 6, 7};
493 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
494 short reset_val = inw(ioaddr+LANCE_RESET);
495 dev->dma = dma_tbl[(reset_val >> 2) & 3];
496 dev->irq = irq_tbl[(reset_val >> 4) & 7];
497 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
498 } else if (lance_version == PCNET_ISAP) {
499 short bus_info;
500 outw(8, ioaddr+LANCE_ADDR);
501 bus_info = inw(ioaddr+LANCE_BUS_IF);
502 dev->dma = bus_info & 0x07;
503 dev->irq = (bus_info >> 4) & 0x0F;
504 } else {
505
506 if (dev->mem_start & 0x07)
507 dev->dma = dev->mem_start & 0x07;
508 }
509
510 if (dev->dma == 0) {
511
512
513 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
514 (inb(DMA2_STAT_REG) & 0xf0);
515 }
516 if (dev->irq >= 2)
517 printk(" assigned IRQ %d", dev->irq);
518 else {
519
520
521
522 autoirq_setup(0);
523
524
525 outw(0x0041, ioaddr+LANCE_DATA);
526
527 dev->irq = autoirq_report(1);
528 if (dev->irq)
529 printk(", probed IRQ %d", dev->irq);
530 else {
531 printk(", failed to detect IRQ line.\n");
532 return;
533 }
534
535
536
537 if (inw(ioaddr+LANCE_DATA) & 0x0100)
538 dev->dma = 4;
539 }
540
541 if (dev->dma == 4) {
542 printk(", no DMA needed.\n");
543 } else if (dev->dma) {
544 if (request_dma(dev->dma, chipname)) {
545 printk("DMA %d allocation failed.\n", dev->dma);
546 return;
547 } else
548 printk(", assigned DMA %d.\n", dev->dma);
549 } else {
550 for (i = 0; i < 4; i++) {
551 static const char dmas[] = { 5, 6, 7, 3 };
552 int dma = dmas[i];
553 int boguscnt;
554
555
556
557 if (test_bit(dma, &dma_channels))
558 continue;
559 outw(0x7f04, ioaddr+LANCE_DATA);
560 if (request_dma(dma, chipname))
561 continue;
562 set_dma_mode(dma, DMA_MODE_CASCADE);
563 enable_dma(dma);
564
565
566 outw(0x0001, ioaddr+LANCE_DATA);
567 for (boguscnt = 100; boguscnt > 0; --boguscnt)
568 if (inw(ioaddr+LANCE_DATA) & 0x0900)
569 break;
570 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
571 dev->dma = dma;
572 printk(", DMA %d.\n", dev->dma);
573 break;
574 } else {
575 disable_dma(dma);
576 free_dma(dma);
577 }
578 }
579 if (i == 4) {
580 printk("DMA detection failed.\n");
581 return;
582 }
583 }
584
585 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
586
587
588 outw(0x0002, ioaddr+LANCE_ADDR);
589 outw(0x0002, ioaddr+LANCE_BUS_IF);
590 }
591
592 if (lance_debug > 0 && did_version++ == 0)
593 printk(version);
594
595
596 dev->open = &lance_open;
597 dev->hard_start_xmit = &lance_start_xmit;
598 dev->stop = &lance_close;
599 dev->get_stats = &lance_get_stats;
600 dev->set_multicast_list = &set_multicast_list;
601
602 return;
603 }
604
605
606 static int
607 lance_open(struct device *dev)
608 {
609 struct lance_private *lp = (struct lance_private *)dev->priv;
610 int ioaddr = dev->base_addr;
611 int i;
612
613 if (dev->irq == 0 ||
614 request_irq(dev->irq, &lance_interrupt, 0, lp->name, NULL)) {
615 return -EAGAIN;
616 }
617
618
619
620
621 irq2dev_map[dev->irq] = dev;
622
623
624 inw(ioaddr+LANCE_RESET);
625
626
627 if (dev->dma != 4) {
628 enable_dma(dev->dma);
629 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
630 }
631
632
633 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
634 outw(0, ioaddr+LANCE_RESET);
635
636 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
637
638 outw(0x0002, ioaddr+LANCE_ADDR);
639 outw(0x0002, ioaddr+LANCE_BUS_IF);
640 }
641
642 if (lance_debug > 1)
643 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
644 dev->name, dev->irq, dev->dma,
645 (u32) virt_to_bus(lp->tx_ring),
646 (u32) virt_to_bus(lp->rx_ring),
647 (u32) virt_to_bus(&lp->init_block));
648
649 lance_init_ring(dev);
650
651 outw(0x0001, ioaddr+LANCE_ADDR);
652 outw((short) (u32) virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
653 outw(0x0002, ioaddr+LANCE_ADDR);
654 outw(((u32)virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
655
656 outw(0x0004, ioaddr+LANCE_ADDR);
657 outw(0x0915, ioaddr+LANCE_DATA);
658
659 outw(0x0000, ioaddr+LANCE_ADDR);
660 outw(0x0001, ioaddr+LANCE_DATA);
661
662 dev->tbusy = 0;
663 dev->interrupt = 0;
664 dev->start = 1;
665 i = 0;
666 while (i++ < 100)
667 if (inw(ioaddr+LANCE_DATA) & 0x0100)
668 break;
669
670
671
672
673 outw(0x0042, ioaddr+LANCE_DATA);
674
675 if (lance_debug > 2)
676 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
677 dev->name, i, (u32) virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA));
678
679 return 0;
680 }
681
682
683
684
685
686
687
688
689
690
691
692
693
694 static void
695 lance_purge_tx_ring(struct device *dev)
696 {
697 struct lance_private *lp = (struct lance_private *)dev->priv;
698 int i;
699
700 for (i = 0; i < TX_RING_SIZE; i++) {
701 if (lp->tx_skbuff[i]) {
702 dev_kfree_skb(lp->tx_skbuff[i],FREE_WRITE);
703 lp->tx_skbuff[i] = NULL;
704 }
705 }
706 }
707
708
709
710 static void
711 lance_init_ring(struct device *dev)
712 {
713 struct lance_private *lp = (struct lance_private *)dev->priv;
714 int i;
715
716 lp->lock = 0, lp->tx_full = 0;
717 lp->cur_rx = lp->cur_tx = 0;
718 lp->dirty_rx = lp->dirty_tx = 0;
719
720 for (i = 0; i < RX_RING_SIZE; i++) {
721 lp->rx_ring[i].base = (u32)virt_to_bus((char *)lp->rx_buffs + i*PKT_BUF_SZ) | 0x80000000;
722 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
723 }
724
725
726 for (i = 0; i < TX_RING_SIZE; i++) {
727 lp->tx_ring[i].base = 0;
728 }
729
730 lp->init_block.mode = 0x0000;
731 for (i = 0; i < 6; i++)
732 lp->init_block.phys_addr[i] = dev->dev_addr[i];
733 lp->init_block.filter[0] = 0x00000000;
734 lp->init_block.filter[1] = 0x00000000;
735 lp->init_block.rx_ring = ((u32)virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
736 lp->init_block.tx_ring = ((u32)virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
737 }
738
739 static void
740 lance_restart(struct device *dev, unsigned int csr0_bits, int must_reinit)
741 {
742 struct lance_private *lp = (struct lance_private *)dev->priv;
743
744 if (must_reinit ||
745 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
746 lance_purge_tx_ring(dev);
747 lance_init_ring(dev);
748 }
749 outw(0x0000, dev->base_addr + LANCE_ADDR);
750 outw(csr0_bits, dev->base_addr + LANCE_DATA);
751 }
752
753 static int
754 lance_start_xmit(struct sk_buff *skb, struct device *dev)
755 {
756 struct lance_private *lp = (struct lance_private *)dev->priv;
757 int ioaddr = dev->base_addr;
758 int entry;
759 unsigned long flags;
760
761
762 if (dev->tbusy) {
763 int tickssofar = jiffies - dev->trans_start;
764 if (tickssofar < 20)
765 return 1;
766 outw(0, ioaddr+LANCE_ADDR);
767 printk("%s: transmit timed out, status %4.4x, resetting.\n",
768 dev->name, inw(ioaddr+LANCE_DATA));
769 outw(0x0004, ioaddr+LANCE_DATA);
770 lp->stats.tx_errors++;
771 #ifndef final_version
772 {
773 int i;
774 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
775 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
776 lp->cur_rx);
777 for (i = 0 ; i < RX_RING_SIZE; i++)
778 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
779 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
780 lp->rx_ring[i].msg_length);
781 for (i = 0 ; i < TX_RING_SIZE; i++)
782 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
783 lp->tx_ring[i].base, -lp->tx_ring[i].length,
784 lp->tx_ring[i].misc);
785 printk("\n");
786 }
787 #endif
788 lance_restart(dev, 0x0043, 1);
789
790 dev->tbusy=0;
791 dev->trans_start = jiffies;
792
793 return 0;
794 }
795
796 if (skb == NULL) {
797 dev_tint(dev);
798 return 0;
799 }
800
801 if (skb->len <= 0)
802 return 0;
803
804 if (lance_debug > 3) {
805 outw(0x0000, ioaddr+LANCE_ADDR);
806 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
807 inw(ioaddr+LANCE_DATA));
808 outw(0x0000, ioaddr+LANCE_DATA);
809 }
810
811
812
813 if (set_bit(0, (void*)&dev->tbusy) != 0) {
814 printk("%s: Transmitter access conflict.\n", dev->name);
815 return 1;
816 }
817
818 if (set_bit(0, (void*)&lp->lock) != 0) {
819 if (lance_debug > 0)
820 printk("%s: tx queue lock!.\n", dev->name);
821
822 return 1;
823 }
824
825
826
827
828 entry = lp->cur_tx & TX_RING_MOD_MASK;
829
830
831
832
833
834 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
835 lp->tx_ring[entry].length =
836 -(ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN);
837 } else
838 lp->tx_ring[entry].length = -skb->len;
839
840 lp->tx_ring[entry].misc = 0x0000;
841
842
843
844 if ((u32)virt_to_bus(skb->data) + skb->len > 0x01000000) {
845 if (lance_debug > 5)
846 printk("%s: bouncing a high-memory packet (%#x).\n",
847 dev->name, (u32)virt_to_bus(skb->data));
848 memcpy(&lp->tx_bounce_buffs[entry], skb->data, skb->len);
849 lp->tx_ring[entry].base =
850 ((u32)virt_to_bus((lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000;
851 dev_kfree_skb (skb, FREE_WRITE);
852 } else {
853 lp->tx_skbuff[entry] = skb;
854 lp->tx_ring[entry].base = ((u32)virt_to_bus(skb->data) & 0xffffff) | 0x83000000;
855 }
856 lp->cur_tx++;
857
858
859 outw(0x0000, ioaddr+LANCE_ADDR);
860 outw(0x0048, ioaddr+LANCE_DATA);
861
862 dev->trans_start = jiffies;
863
864 save_flags(flags);
865 cli();
866 lp->lock = 0;
867 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
868 dev->tbusy=0;
869 else
870 lp->tx_full = 1;
871 restore_flags(flags);
872
873 return 0;
874 }
875
876
877 static void
878 lance_interrupt(int irq, void *dev_id, struct pt_regs * regs)
879 {
880 struct device *dev = (struct device *)(irq2dev_map[irq]);
881 struct lance_private *lp;
882 int csr0, ioaddr, boguscnt=10;
883 int must_restart;
884
885 if (dev == NULL) {
886 printk ("lance_interrupt(): irq %d for unknown device.\n", irq);
887 return;
888 }
889
890 ioaddr = dev->base_addr;
891 lp = (struct lance_private *)dev->priv;
892 if (dev->interrupt)
893 printk("%s: Re-entering the interrupt handler.\n", dev->name);
894
895 dev->interrupt = 1;
896
897 outw(0x00, dev->base_addr + LANCE_ADDR);
898 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
899 && --boguscnt >= 0) {
900
901 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
902
903 must_restart = 0;
904
905 if (lance_debug > 5)
906 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
907 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
908
909 if (csr0 & 0x0400)
910 lance_rx(dev);
911
912 if (csr0 & 0x0200) {
913 int dirty_tx = lp->dirty_tx;
914
915 while (dirty_tx < lp->cur_tx) {
916 int entry = dirty_tx & TX_RING_MOD_MASK;
917 int status = lp->tx_ring[entry].base;
918
919 if (status < 0)
920 break;
921
922 lp->tx_ring[entry].base = 0;
923
924 if (status & 0x40000000) {
925
926 int err_status = lp->tx_ring[entry].misc;
927 lp->stats.tx_errors++;
928 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
929 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
930 if (err_status & 0x1000) lp->stats.tx_window_errors++;
931 if (err_status & 0x4000) {
932
933 lp->stats.tx_fifo_errors++;
934
935 printk("%s: Tx FIFO error! Status %4.4x.\n",
936 dev->name, csr0);
937
938 must_restart = 1;
939 }
940 } else {
941 if (status & 0x18000000)
942 lp->stats.collisions++;
943 lp->stats.tx_packets++;
944 }
945
946
947
948 if (lp->tx_skbuff[entry]) {
949 dev_kfree_skb(lp->tx_skbuff[entry],FREE_WRITE);
950 lp->tx_skbuff[entry] = 0;
951 }
952 dirty_tx++;
953 }
954
955 #ifndef final_version
956 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
957 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
958 dirty_tx, lp->cur_tx, lp->tx_full);
959 dirty_tx += TX_RING_SIZE;
960 }
961 #endif
962
963 if (lp->tx_full && dev->tbusy
964 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
965
966 lp->tx_full = 0;
967 dev->tbusy = 0;
968 mark_bh(NET_BH);
969 }
970
971 lp->dirty_tx = dirty_tx;
972 }
973
974
975 if (csr0 & 0x4000) lp->stats.tx_errors++;
976 if (csr0 & 0x1000) lp->stats.rx_errors++;
977 if (csr0 & 0x0800) {
978 printk("%s: Bus master arbitration failure, status %4.4x.\n",
979 dev->name, csr0);
980
981 must_restart = 1;
982 }
983
984 if (must_restart) {
985
986 outw(0x0000, dev->base_addr + LANCE_ADDR);
987 outw(0x0004, dev->base_addr + LANCE_DATA);
988 lance_restart(dev, 0x0002, 0);
989 }
990 }
991
992
993 outw(0x0000, dev->base_addr + LANCE_ADDR);
994 outw(0x7940, dev->base_addr + LANCE_DATA);
995
996 if (lance_debug > 4)
997 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
998 dev->name, inw(ioaddr + LANCE_ADDR),
999 inw(dev->base_addr + LANCE_DATA));
1000
1001 dev->interrupt = 0;
1002 return;
1003 }
1004
1005 static int
1006 lance_rx(struct device *dev)
1007 {
1008 struct lance_private *lp = (struct lance_private *)dev->priv;
1009 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1010 int i;
1011
1012
1013 while (lp->rx_ring[entry].base >= 0) {
1014 int status = lp->rx_ring[entry].base >> 24;
1015
1016 if (status != 0x03) {
1017
1018
1019
1020
1021 if (status & 0x01)
1022 lp->stats.rx_errors++;
1023 if (status & 0x20) lp->stats.rx_frame_errors++;
1024 if (status & 0x10) lp->stats.rx_over_errors++;
1025 if (status & 0x08) lp->stats.rx_crc_errors++;
1026 if (status & 0x04) lp->stats.rx_fifo_errors++;
1027 lp->rx_ring[entry].base &= 0x03ffffff;
1028 }
1029 else
1030 {
1031
1032 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
1033 struct sk_buff *skb;
1034
1035 if(pkt_len<60)
1036 {
1037 printk("%s: Runt packet!\n",dev->name);
1038 lp->stats.rx_errors++;
1039 }
1040 else
1041 {
1042 skb = dev_alloc_skb(pkt_len+2);
1043 if (skb == NULL)
1044 {
1045 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1046 for (i=0; i < RX_RING_SIZE; i++)
1047 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
1048 break;
1049
1050 if (i > RX_RING_SIZE -2)
1051 {
1052 lp->stats.rx_dropped++;
1053 lp->rx_ring[entry].base |= 0x80000000;
1054 lp->cur_rx++;
1055 }
1056 break;
1057 }
1058 skb->dev = dev;
1059 skb_reserve(skb,2);
1060 skb_put(skb,pkt_len);
1061 eth_copy_and_sum(skb,
1062 (unsigned char *)bus_to_virt((lp->rx_ring[entry].base & 0x00ffffff)),
1063 pkt_len,0);
1064 skb->protocol=eth_type_trans(skb,dev);
1065 netif_rx(skb);
1066 lp->stats.rx_packets++;
1067 }
1068 }
1069
1070
1071 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1072 lp->rx_ring[entry].base |= 0x80000000;
1073 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1074 }
1075
1076
1077
1078
1079 return 0;
1080 }
1081
1082 static int
1083 lance_close(struct device *dev)
1084 {
1085 int ioaddr = dev->base_addr;
1086 struct lance_private *lp = (struct lance_private *)dev->priv;
1087
1088 dev->start = 0;
1089 dev->tbusy = 1;
1090
1091 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1092 outw(112, ioaddr+LANCE_ADDR);
1093 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1094 }
1095 outw(0, ioaddr+LANCE_ADDR);
1096
1097 if (lance_debug > 1)
1098 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1099 dev->name, inw(ioaddr+LANCE_DATA));
1100
1101
1102
1103 outw(0x0004, ioaddr+LANCE_DATA);
1104
1105 if (dev->dma != 4)
1106 disable_dma(dev->dma);
1107
1108 free_irq(dev->irq, NULL);
1109
1110 irq2dev_map[dev->irq] = 0;
1111
1112 return 0;
1113 }
1114
1115 static struct enet_statistics *
1116 lance_get_stats(struct device *dev)
1117 {
1118 struct lance_private *lp = (struct lance_private *)dev->priv;
1119 short ioaddr = dev->base_addr;
1120 short saved_addr;
1121 unsigned long flags;
1122
1123 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1124 save_flags(flags);
1125 cli();
1126 saved_addr = inw(ioaddr+LANCE_ADDR);
1127 outw(112, ioaddr+LANCE_ADDR);
1128 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1129 outw(saved_addr, ioaddr+LANCE_ADDR);
1130 restore_flags(flags);
1131 }
1132
1133 return &lp->stats;
1134 }
1135
1136
1137
1138
1139 static void set_multicast_list(struct device *dev)
1140 {
1141 short ioaddr = dev->base_addr;
1142
1143 outw(0, ioaddr+LANCE_ADDR);
1144 outw(0x0004, ioaddr+LANCE_DATA);
1145
1146 if (dev->flags&IFF_PROMISC) {
1147
1148 printk("%s: Promiscuous mode enabled.\n", dev->name);
1149 outw(15, ioaddr+LANCE_ADDR);
1150 outw(0x8000, ioaddr+LANCE_DATA);
1151 } else {
1152 short multicast_table[4];
1153 int i;
1154 int num_addrs=dev->mc_count;
1155 if(dev->flags&IFF_ALLMULTI)
1156 num_addrs=1;
1157
1158 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1159 for (i = 0; i < 4; i++) {
1160 outw(8 + i, ioaddr+LANCE_ADDR);
1161 outw(multicast_table[i], ioaddr+LANCE_DATA);
1162 }
1163 outw(15, ioaddr+LANCE_ADDR);
1164 outw(0x0000, ioaddr+LANCE_DATA);
1165 }
1166
1167 lance_restart(dev, 0x0142, 0);
1168
1169 }
1170
1171
1172
1173
1174
1175
1176
1177
1178