This source file includes following definitions.
- lance32_probe1
- lance32_open
- lance32_purge_tx_ring
- lance32_init_ring
- lance32_restart
- lance32_start_xmit
- lance32_interrupt
- lance32_rx
- lance32_close
- lance32_get_stats
- lance32_set_multicast_list
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16 static const char *version = "lance32.c:v0.02 17.3.96 tsbogend@bigbug.franken.de\n";
17
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/string.h>
21 #include <linux/ptrace.h>
22 #include <linux/errno.h>
23 #include <linux/ioport.h>
24 #include <linux/malloc.h>
25 #include <linux/interrupt.h>
26 #include <linux/pci.h>
27 #include <linux/bios32.h>
28 #include <asm/bitops.h>
29 #include <asm/io.h>
30 #include <asm/dma.h>
31
32 #include <linux/netdevice.h>
33 #include <linux/etherdevice.h>
34 #include <linux/skbuff.h>
35
36 #ifdef LANCE32_DEBUG
37 int lance32_debug = LANCE32_DEBUG;
38 #else
39 int lance32_debug = 1;
40 #endif
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66 #ifndef LANCE_LOG_TX_BUFFERS
67 #define LANCE_LOG_TX_BUFFERS 4
68 #define LANCE_LOG_RX_BUFFERS 4
69 #endif
70
71 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
72 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
73 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 12)
74
75 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
76 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
77 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 4)
78
79 #define PKT_BUF_SZ 1544
80
81
82 #define LANCE_DATA 0x10
83 #define LANCE_ADDR 0x12
84 #define LANCE_RESET 0x14
85 #define LANCE_BUS_IF 0x16
86 #define LANCE_TOTAL_SIZE 0x18
87
88
89 struct lance32_rx_head {
90 u32 base;
91 s16 buf_length;
92 s16 status;
93 u32 msg_length;
94 u32 reserved;
95 };
96
97 struct lance32_tx_head {
98 u32 base;
99 s16 length;
100 s16 status;
101 u32 misc;
102 u32 reserved;
103 };
104
105
106
107 struct lance32_init_block {
108 u16 mode;
109 u16 tlen_rlen;
110 u8 phys_addr[6];
111 u16 reserved;
112 u32 filter[2];
113
114 u32 rx_ring;
115 u32 tx_ring;
116 };
117
118 struct lance32_private {
119
120 struct lance32_rx_head rx_ring[RX_RING_SIZE];
121 struct lance32_tx_head tx_ring[TX_RING_SIZE];
122 struct lance32_init_block init_block;
123 const char *name;
124
125 struct sk_buff* tx_skbuff[TX_RING_SIZE];
126 unsigned long rx_buffs;
127 int cur_rx, cur_tx;
128 int dirty_rx, dirty_tx;
129 int dma;
130 struct enet_statistics stats;
131 char tx_full;
132 unsigned long lock;
133 };
134
135 static int lance32_open(struct device *dev);
136 static void lance32_init_ring(struct device *dev);
137 static int lance32_start_xmit(struct sk_buff *skb, struct device *dev);
138 static int lance32_rx(struct device *dev);
139 static void lance32_interrupt(int irq, void *dev_id, struct pt_regs *regs);
140 static int lance32_close(struct device *dev);
141 static struct enet_statistics *lance32_get_stats(struct device *dev);
142 static void lance32_set_multicast_list(struct device *dev);
143
144
145
146
147 void lance32_probe1(struct device *dev, char *chipname, int pci_irq_line)
148 {
149 struct lance32_private *lp;
150 int ioaddr = dev->base_addr;
151 short dma_channels;
152 int i;
153
154
155 lp = (struct lance32_private *) (((unsigned long)kmalloc(sizeof(*lp)+15, GFP_DMA | GFP_KERNEL)+15) & ~15);
156
157 memset(lp, 0, sizeof(*lp));
158 dev->priv = lp;
159 lp->name = chipname;
160 lp->rx_buffs = (unsigned long) kmalloc(PKT_BUF_SZ*RX_RING_SIZE, GFP_DMA | GFP_KERNEL);
161
162 lp->init_block.mode = 0x0003;
163 lp->init_block.tlen_rlen = TX_RING_LEN_BITS | RX_RING_LEN_BITS;
164 for (i = 0; i < 6; i++)
165 lp->init_block.phys_addr[i] = dev->dev_addr[i];
166 lp->init_block.filter[0] = 0x00000000;
167 lp->init_block.filter[1] = 0x00000000;
168 lp->init_block.rx_ring = (u32)virt_to_bus(lp->rx_ring);
169 lp->init_block.tx_ring = (u32)virt_to_bus(lp->tx_ring);
170
171
172 outw(0x0014, ioaddr+LANCE_ADDR);
173 outw(0x0002, ioaddr+LANCE_BUS_IF);
174
175 outw(0x0001, ioaddr+LANCE_ADDR);
176 inw(ioaddr+LANCE_ADDR);
177 outw((short) (u32) virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
178 outw(0x0002, ioaddr+LANCE_ADDR);
179 inw(ioaddr+LANCE_ADDR);
180 outw(((u32)virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
181 outw(0x0000, ioaddr+LANCE_ADDR);
182 inw(ioaddr+LANCE_ADDR);
183
184 if (pci_irq_line) {
185 dev->dma = 4;
186 dev->irq = pci_irq_line;
187 } else {
188
189 if (dev->mem_start & 0x07)
190 dev->dma = dev->mem_start & 0x07;
191 }
192
193 if (dev->dma == 0) {
194
195
196 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
197 (inb(DMA2_STAT_REG) & 0xf0);
198 }
199 if (dev->irq >= 2)
200 printk(" assigned IRQ %d", dev->irq);
201 else {
202
203
204
205 autoirq_setup(0);
206
207
208 outw(0x0041, ioaddr+LANCE_DATA);
209
210 dev->irq = autoirq_report(1);
211 if (dev->irq)
212 printk(", probed IRQ %d", dev->irq);
213 else {
214 printk(", failed to detect IRQ line.\n");
215 return;
216 }
217
218
219
220 if (inw(ioaddr+LANCE_DATA) & 0x0100)
221 dev->dma = 4;
222 }
223
224 if (dev->dma == 4) {
225 printk(", no DMA needed.\n");
226 } else if (dev->dma) {
227 if (request_dma(dev->dma, chipname)) {
228 printk("DMA %d allocation failed.\n", dev->dma);
229 return;
230 } else
231 printk(", assigned DMA %d.\n", dev->dma);
232 } else {
233 for (i = 0; i < 4; i++) {
234 static const char dmas[] = { 5, 6, 7, 3 };
235 int dma = dmas[i];
236 int boguscnt;
237
238
239
240 if (test_bit(dma, &dma_channels))
241 continue;
242 outw(0x7f04, ioaddr+LANCE_DATA);
243 if (request_dma(dma, chipname))
244 continue;
245 set_dma_mode(dma, DMA_MODE_CASCADE);
246 enable_dma(dma);
247
248
249 outw(0x0001, ioaddr+LANCE_DATA);
250 for (boguscnt = 100; boguscnt > 0; --boguscnt)
251 if (inw(ioaddr+LANCE_DATA) & 0x0900)
252 break;
253 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
254 dev->dma = dma;
255 printk(", DMA %d.\n", dev->dma);
256 break;
257 } else {
258 disable_dma(dma);
259 free_dma(dma);
260 }
261 }
262 if (i == 4) {
263 printk("DMA detection failed.\n");
264 return;
265 }
266 }
267
268 outw(0x0002, ioaddr+LANCE_ADDR);
269 outw(0x0002, ioaddr+LANCE_BUS_IF);
270
271 if (lance32_debug > 0)
272 printk(version);
273
274
275 dev->open = &lance32_open;
276 dev->hard_start_xmit = &lance32_start_xmit;
277 dev->stop = &lance32_close;
278 dev->get_stats = &lance32_get_stats;
279 dev->set_multicast_list = &lance32_set_multicast_list;
280
281 return;
282 }
283
284
285 static int
286 lance32_open(struct device *dev)
287 {
288 struct lance32_private *lp = (struct lance32_private *)dev->priv;
289 int ioaddr = dev->base_addr;
290 int i;
291
292 if (dev->irq == 0 ||
293 request_irq(dev->irq, &lance32_interrupt, 0, lp->name, (void *)dev)) {
294 return -EAGAIN;
295 }
296
297 irq2dev_map[dev->irq] = dev;
298
299
300 inw(ioaddr+LANCE_RESET);
301
302
303 outw(0x0014, ioaddr+LANCE_ADDR);
304 outw(0x0002, ioaddr+LANCE_BUS_IF);
305
306
307 if (dev->dma != 4) {
308 enable_dma(dev->dma);
309 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
310 }
311
312
313 outw(0x0002, ioaddr+LANCE_ADDR);
314 outw(0x0002, ioaddr+LANCE_BUS_IF);
315
316 if (lance32_debug > 1)
317 printk("%s: lance32_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
318 dev->name, dev->irq, dev->dma,
319 (u32) virt_to_bus(lp->tx_ring),
320 (u32) virt_to_bus(lp->rx_ring),
321 (u32) virt_to_bus(&lp->init_block));
322
323 lance32_init_ring(dev);
324
325 outw(0x0001, ioaddr+LANCE_ADDR);
326 outw((short) (u32) virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
327 outw(0x0002, ioaddr+LANCE_ADDR);
328 outw(((u32)virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
329
330 outw(0x0004, ioaddr+LANCE_ADDR);
331 outw(0x0915, ioaddr+LANCE_DATA);
332
333 outw(0x0000, ioaddr+LANCE_ADDR);
334 outw(0x0001, ioaddr+LANCE_DATA);
335
336 dev->tbusy = 0;
337 dev->interrupt = 0;
338 dev->start = 1;
339 i = 0;
340 while (i++ < 100)
341 if (inw(ioaddr+LANCE_DATA) & 0x0100)
342 break;
343
344
345
346
347 outw(0x0042, ioaddr+LANCE_DATA);
348
349 if (lance32_debug > 2)
350 printk("%s: LANCE32 open after %d ticks, init block %#x csr0 %4.4x.\n",
351 dev->name, i, (u32) virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA));
352
353 return 0;
354 }
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365
366
367
368
369 static void
370 lance32_purge_tx_ring(struct device *dev)
371 {
372 struct lance32_private *lp = (struct lance32_private *)dev->priv;
373 int i;
374
375 for (i = 0; i < TX_RING_SIZE; i++) {
376 if (lp->tx_skbuff[i]) {
377 dev_kfree_skb(lp->tx_skbuff[i],FREE_WRITE);
378 lp->tx_skbuff[i] = NULL;
379 }
380 }
381 }
382
383
384
385 static void
386 lance32_init_ring(struct device *dev)
387 {
388 struct lance32_private *lp = (struct lance32_private *)dev->priv;
389 int i;
390
391 lp->lock = 0, lp->tx_full = 0;
392 lp->cur_rx = lp->cur_tx = 0;
393 lp->dirty_rx = lp->dirty_tx = 0;
394
395 for (i = 0; i < RX_RING_SIZE; i++) {
396 lp->rx_ring[i].base = (u32)virt_to_bus((char *)lp->rx_buffs + i*PKT_BUF_SZ);
397 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
398 lp->rx_ring[i].status = 0x8000;
399 }
400
401
402 for (i = 0; i < TX_RING_SIZE; i++) {
403 lp->tx_ring[i].base = 0;
404 lp->tx_ring[i].status = 0;
405 }
406
407 lp->init_block.mode = 0x0000;
408 lp->init_block.tlen_rlen = TX_RING_LEN_BITS | RX_RING_LEN_BITS;
409 for (i = 0; i < 6; i++)
410 lp->init_block.phys_addr[i] = dev->dev_addr[i];
411 lp->init_block.filter[0] = 0x00000000;
412 lp->init_block.filter[1] = 0x00000000;
413 lp->init_block.rx_ring = (u32)virt_to_bus(lp->rx_ring);
414 lp->init_block.tx_ring = (u32)virt_to_bus(lp->tx_ring);
415 }
416
417 static void
418 lance32_restart(struct device *dev, unsigned int csr0_bits, int must_reinit)
419 {
420 lance32_purge_tx_ring(dev);
421 lance32_init_ring(dev);
422
423 outw(0x0000, dev->base_addr + LANCE_ADDR);
424 outw(csr0_bits, dev->base_addr + LANCE_DATA);
425 }
426
427 static int
428 lance32_start_xmit(struct sk_buff *skb, struct device *dev)
429 {
430 struct lance32_private *lp = (struct lance32_private *)dev->priv;
431 int ioaddr = dev->base_addr;
432 int entry;
433 unsigned long flags;
434
435
436 if (dev->tbusy) {
437 int tickssofar = jiffies - dev->trans_start;
438 if (tickssofar < 20)
439 return 1;
440 outw(0, ioaddr+LANCE_ADDR);
441 printk("%s: transmit timed out, status %4.4x, resetting.\n",
442 dev->name, inw(ioaddr+LANCE_DATA));
443 outw(0x0004, ioaddr+LANCE_DATA);
444 lp->stats.tx_errors++;
445 #ifndef final_version
446 {
447 int i;
448 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
449 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
450 lp->cur_rx);
451 for (i = 0 ; i < RX_RING_SIZE; i++)
452 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
453 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
454 lp->rx_ring[i].msg_length);
455 for (i = 0 ; i < TX_RING_SIZE; i++)
456 printk("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
457 lp->tx_ring[i].base, -lp->tx_ring[i].length,
458 lp->tx_ring[i].misc);
459 printk("\n");
460 }
461 #endif
462 lance32_restart(dev, 0x0043, 1);
463
464 dev->tbusy=0;
465 dev->trans_start = jiffies;
466
467 return 0;
468 }
469
470 if (skb == NULL) {
471 dev_tint(dev);
472 return 0;
473 }
474
475 if (skb->len <= 0)
476 return 0;
477
478 if (lance32_debug > 3) {
479 outw(0x0000, ioaddr+LANCE_ADDR);
480 printk("%s: lance32_start_xmit() called, csr0 %4.4x.\n", dev->name,
481 inw(ioaddr+LANCE_DATA));
482 outw(0x0000, ioaddr+LANCE_DATA);
483 }
484
485
486
487 if (set_bit(0, (void*)&dev->tbusy) != 0) {
488 printk("%s: Transmitter access conflict.\n", dev->name);
489 return 1;
490 }
491
492 if (set_bit(0, (void*)&lp->lock) != 0) {
493 if (lance32_debug > 0)
494 printk("%s: tx queue lock!.\n", dev->name);
495
496 return 1;
497 }
498
499
500
501
502 entry = lp->cur_tx & TX_RING_MOD_MASK;
503
504
505
506
507 lp->tx_ring[entry].length = -skb->len;
508
509 lp->tx_ring[entry].misc = 0x00000000;
510
511 lp->tx_skbuff[entry] = skb;
512 lp->tx_ring[entry].base = (u32)virt_to_bus(skb->data);
513 lp->tx_ring[entry].status = 0x8300;
514
515 lp->cur_tx++;
516
517
518 outw(0x0000, ioaddr+LANCE_ADDR);
519 outw(0x0048, ioaddr+LANCE_DATA);
520
521 dev->trans_start = jiffies;
522
523 save_flags(flags);
524 cli();
525 lp->lock = 0;
526 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
527 dev->tbusy=0;
528 else
529 lp->tx_full = 1;
530 restore_flags(flags);
531
532 return 0;
533 }
534
535
536 static void
537 lance32_interrupt(int irq, void *dev_id, struct pt_regs * regs)
538 {
539 struct device *dev = (struct device *)dev_id;
540 struct lance32_private *lp;
541 int csr0, ioaddr, boguscnt=10;
542 int must_restart;
543
544 if (dev == NULL) {
545 printk ("lance32_interrupt(): irq %d for unknown device.\n", irq);
546 return;
547 }
548
549 ioaddr = dev->base_addr;
550 lp = (struct lance32_private *)dev->priv;
551 if (dev->interrupt)
552 printk("%s: Re-entering the interrupt handler.\n", dev->name);
553
554 dev->interrupt = 1;
555
556 outw(0x00, dev->base_addr + LANCE_ADDR);
557 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
558 && --boguscnt >= 0) {
559
560 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
561
562 must_restart = 0;
563
564 if (lance32_debug > 5)
565 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
566 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
567
568 if (csr0 & 0x0400)
569 lance32_rx(dev);
570
571 if (csr0 & 0x0200) {
572 int dirty_tx = lp->dirty_tx;
573
574 while (dirty_tx < lp->cur_tx) {
575 int entry = dirty_tx & TX_RING_MOD_MASK;
576 int status = lp->tx_ring[entry].status;
577
578 if (status < 0)
579 break;
580
581 lp->tx_ring[entry].base = 0;
582
583 if (status & 0x4000) {
584
585 int err_status = lp->tx_ring[entry].misc;
586 lp->stats.tx_errors++;
587 if (err_status & 0x04000000) lp->stats.tx_aborted_errors++;
588 if (err_status & 0x08000000) lp->stats.tx_carrier_errors++;
589 if (err_status & 0x10000000) lp->stats.tx_window_errors++;
590 if (err_status & 0x40000000) {
591
592 lp->stats.tx_fifo_errors++;
593
594 printk("%s: Tx FIFO error! Status %4.4x.\n",
595 dev->name, csr0);
596
597 must_restart = 1;
598 }
599 } else {
600 if (status & 0x1800)
601 lp->stats.collisions++;
602 lp->stats.tx_packets++;
603 }
604
605
606 if (lp->tx_skbuff[entry]) {
607 dev_kfree_skb(lp->tx_skbuff[entry],FREE_WRITE);
608 lp->tx_skbuff[entry] = 0;
609 }
610 dirty_tx++;
611 }
612
613 #ifndef final_version
614 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
615 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
616 dirty_tx, lp->cur_tx, lp->tx_full);
617 dirty_tx += TX_RING_SIZE;
618 }
619 #endif
620
621 if (lp->tx_full && dev->tbusy
622 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
623
624 lp->tx_full = 0;
625 dev->tbusy = 0;
626 mark_bh(NET_BH);
627 }
628
629 lp->dirty_tx = dirty_tx;
630 }
631
632
633 if (csr0 & 0x4000) lp->stats.tx_errors++;
634 if (csr0 & 0x1000) lp->stats.rx_errors++;
635 if (csr0 & 0x0800) {
636 printk("%s: Bus master arbitration failure, status %4.4x.\n",
637 dev->name, csr0);
638
639 must_restart = 1;
640 }
641
642 if (must_restart) {
643
644 outw(0x0000, dev->base_addr + LANCE_ADDR);
645 outw(0x0004, dev->base_addr + LANCE_DATA);
646 lance32_restart(dev, 0x0002, 0);
647 }
648 }
649
650
651 outw(0x0000, dev->base_addr + LANCE_ADDR);
652 outw(0x7940, dev->base_addr + LANCE_DATA);
653
654 if (lance32_debug > 4)
655 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
656 dev->name, inw(ioaddr + LANCE_ADDR),
657 inw(dev->base_addr + LANCE_DATA));
658
659 dev->interrupt = 0;
660 return;
661 }
662
663 static int
664 lance32_rx(struct device *dev)
665 {
666 struct lance32_private *lp = (struct lance32_private *)dev->priv;
667 int entry = lp->cur_rx & RX_RING_MOD_MASK;
668 int i;
669
670
671 while (lp->rx_ring[entry].status >= 0) {
672 int status = lp->rx_ring[entry].status >> 8;
673
674 if (status != 0x03) {
675
676
677
678
679 if (status & 0x01)
680 lp->stats.rx_errors++;
681 if (status & 0x20) lp->stats.rx_frame_errors++;
682 if (status & 0x10) lp->stats.rx_over_errors++;
683 if (status & 0x08) lp->stats.rx_crc_errors++;
684 if (status & 0x04) lp->stats.rx_fifo_errors++;
685 lp->rx_ring[entry].status &= 0x03ff;
686 }
687 else
688 {
689
690 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
691 struct sk_buff *skb;
692
693 if(pkt_len<60)
694 {
695 printk("%s: Runt packet!\n",dev->name);
696 lp->stats.rx_errors++;
697 }
698 else
699 {
700 skb = dev_alloc_skb(pkt_len+2);
701 if (skb == NULL)
702 {
703 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
704 for (i=0; i < RX_RING_SIZE; i++)
705 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].status < 0)
706 break;
707
708 if (i > RX_RING_SIZE -2)
709 {
710 lp->stats.rx_dropped++;
711 lp->rx_ring[entry].status |= 0x8000;
712 lp->cur_rx++;
713 }
714 break;
715 }
716 skb->dev = dev;
717 skb_reserve(skb,2);
718 skb_put(skb,pkt_len);
719 eth_copy_and_sum(skb,
720 (unsigned char *)bus_to_virt(lp->rx_ring[entry].base),
721 pkt_len,0);
722 skb->protocol=eth_type_trans(skb,dev);
723 netif_rx(skb);
724 lp->stats.rx_packets++;
725 }
726 }
727
728
729 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
730 lp->rx_ring[entry].status |= 0x8000;
731 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
732 }
733
734
735
736
737 return 0;
738 }
739
740 static int
741 lance32_close(struct device *dev)
742 {
743 int ioaddr = dev->base_addr;
744 struct lance32_private *lp = (struct lance32_private *)dev->priv;
745
746 dev->start = 0;
747 dev->tbusy = 1;
748
749 outw(112, ioaddr+LANCE_ADDR);
750 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
751
752 outw(0, ioaddr+LANCE_ADDR);
753
754 if (lance32_debug > 1)
755 printk("%s: Shutting down ethercard, status was %2.2x.\n",
756 dev->name, inw(ioaddr+LANCE_DATA));
757
758
759
760 outw(0x0004, ioaddr+LANCE_DATA);
761
762 if (dev->dma != 4)
763 disable_dma(dev->dma);
764
765 free_irq(dev->irq, dev);
766
767 irq2dev_map[dev->irq] = 0;
768
769 return 0;
770 }
771
772 static struct enet_statistics *
773 lance32_get_stats(struct device *dev)
774 {
775 struct lance32_private *lp = (struct lance32_private *)dev->priv;
776 short ioaddr = dev->base_addr;
777 short saved_addr;
778 unsigned long flags;
779
780 save_flags(flags);
781 cli();
782 saved_addr = inw(ioaddr+LANCE_ADDR);
783 outw(112, ioaddr+LANCE_ADDR);
784 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
785 outw(saved_addr, ioaddr+LANCE_ADDR);
786 restore_flags(flags);
787
788 return &lp->stats;
789 }
790
791
792
793
794 static void lance32_set_multicast_list(struct device *dev)
795 {
796 short ioaddr = dev->base_addr;
797
798 outw(0, ioaddr+LANCE_ADDR);
799 outw(0x0004, ioaddr+LANCE_DATA);
800
801 if (dev->flags&IFF_PROMISC) {
802
803 printk("%s: Promiscuous mode enabled.\n", dev->name);
804 outw(15, ioaddr+LANCE_ADDR);
805 outw(0x8000, ioaddr+LANCE_DATA);
806 } else {
807 short multicast_table[4];
808 int i;
809 int num_addrs=dev->mc_count;
810 if(dev->flags&IFF_ALLMULTI)
811 num_addrs=1;
812
813 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
814 for (i = 0; i < 4; i++) {
815 outw(8 + i, ioaddr+LANCE_ADDR);
816 outw(multicast_table[i], ioaddr+LANCE_DATA);
817 }
818 outw(15, ioaddr+LANCE_ADDR);
819 outw(0x0000, ioaddr+LANCE_DATA);
820 }
821
822 lance32_restart(dev, 0x0142, 0);
823
824 }
825
826
827
828
829
830
831
832
833