arch/sparc/kernel/cpu.c

/* */
This source file includes following definitions.
cpu_probe
   1 /* cpu.c: Dinky routines to look for the kind of Sparc cpu
   2  *        we are on.
   3  *
   4  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6 
   7 #include <linux/kernel.h>
   8 
   9 #include <asm/oplib.h>
  10 #include <asm/page.h>
  11 #include <asm/head.h>
  12 #include <asm/psr.h>
  13 #include <asm/mbus.h>
  14 
  15 struct cpu_iu_info {
  16   int psr_impl;
  17   int psr_vers;
  18   char* cpu_name;   /* should be enough I hope... */
  19 };
  20 
  21 struct cpu_fp_info {
  22   int psr_impl;
  23   int fp_vers;
  24   char* fp_name;
  25 };
  26 
  27 /* In order to get the fpu type correct, you need to take the IDPROM's
  28  * machine type value into consideration too.  I will fix this.
  29  */
  30 struct cpu_fp_info linux_sparc_fpu[] = {
  31   { 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"},
  32   { 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"},
  33   { 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"},
  34   /* SparcStation SLC, SparcStation1 */
  35   { 0, 3, "Weitek WTL3170/2"},
  36   /* SPARCstation-5 */
  37   { 0, 4, "Lsi Logic/Meiko L64804 or compatible"},
  38   { 0, 5, "reserved"},
  39   { 0, 6, "reserved"},
  40   { 0, 7, "No FPU"},
  41   { 1, 0, "ROSS HyperSparc combined IU/FPU"},
  42   { 1, 1, "Lsi Logic L64814"},
  43   { 1, 2, "Texas Instruments TMS390-C602A"},
  44   { 1, 3, "Cypress CY7C602 FPU"},
  45   { 1, 4, "reserved"},
  46   { 1, 5, "reserved"},
  47   { 1, 6, "reserved"},
  48   { 1, 7, "No FPU"},
  49   { 2, 0, "BIT B5010 or B5110/20 or B5210"},
  50   { 2, 1, "reserved"},
  51   { 2, 2, "reserved"},
  52   { 2, 3, "reserved"},
  53   { 2, 4, "reserved"},
  54   { 2, 5, "reserved"},
  55   { 2, 6, "reserved"},
  56   { 2, 7, "No FPU"},
  57   /* SuperSparc 50 module */
  58   { 4, 0, "SuperSparc on-chip FPU"},
  59   /* SparcClassic */
  60   { 4, 4, "TI MicroSparc on chip FPU"},
  61   { 5, 0, "Matsushita MN10501"},
  62   { 5, 1, "reserved"},
  63   { 5, 2, "reserved"},
  64   { 5, 3, "reserved"},
  65   { 5, 4, "reserved"},
  66   { 5, 5, "reserved"},
  67   { 5, 6, "reserved"},
  68   { 5, 7, "No FPU"},
  69 };
  70 
  71 #define NSPARCFPU  (sizeof(linux_sparc_fpu)/sizeof(struct cpu_fp_info))
  72 
  73 struct cpu_iu_info linux_sparc_chips[] = {
  74   /* Sun4/100, 4/200, SLC */
  75   { 0, 0, "Fujitsu  MB86900/1A or LSI L64831 SparcKIT-40"},
  76   /* borned STP1012PGA */
  77   { 0, 4, "Fujitsu  MB86904"},
  78   /* SparcStation2, SparcServer 490 & 690 */
  79   { 1, 0, "LSI Logic Corporation - L64811"},
  80   /* SparcStation2 */
  81   { 1, 1, "Cypress/ROSS CY7C601"},
  82   /* Embedded controller */
  83   { 1, 3, "Cypress/ROSS CY7C611"},
  84   /* Ross Technologies HyperSparc */
  85   { 1, 0xf, "ROSS HyperSparc RT620"},
  86   { 1, 0xe, "ROSS HyperSparc RT625"},
  87   /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */
  88   /* Someone please write the code to support this beast! ;) */
  89   { 2, 0, "Bipolar Integrated Technology - B5010"},
  90   { 3, 0, "LSI Logic Corporation - unknown-type"},
  91   { 4, 0, "Texas Instruments, Inc. - SuperSparc 50"},
  92   /* SparcClassic  --  borned STP1010TAB-50*/
  93   { 4, 1, "Texas Instruments, Inc. - MicroSparc"},
  94   { 4, 2, "Texas Instruments, Inc. - MicroSparc II"},
  95   { 4, 3, "Texas Instruments, Inc. - SuperSparc 51"},
  96   { 4, 4, "Texas Instruments, Inc. - SuperSparc 61"},
  97   { 4, 5, "Texas Instruments, Inc. - unknown"},
  98   { 5, 0, "Matsushita - MN10501"},
  99   { 6, 0, "Philips Corporation - unknown"},
 100   { 7, 0, "Harvest VLSI Design Center, Inc. - unknown"},
 101   /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */
 102   { 8, 0, "Systems and Processes Engineering Corporation (SPEC)"},
 103   { 9, 0, "Fujitsu #3"},
 104   { 0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 105   { 0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 106   { 0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 107   { 0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 108   { 0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 109   { 0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"},
 110 };
 111 
 112 #define NSPARCCHIPS  (sizeof(linux_sparc_chips)/sizeof(struct cpu_iu_info))
 113 
 114 char *sparc_cpu_type[NCPUS] = { "cpu-oops", "cpu-oops1", "cpu-oops2", "cpu-oops3" };
 115 char *sparc_fpu_type[NCPUS] = { "fpu-oops", "fpu-oops1", "fpu-oops2", "fpu-oops3" };
 116 
 117 unsigned int fsr_storage;
 118 
 119 void
 120 cpu_probe(void)
     /*  */
 121 {
 122         int psr_impl, psr_vers, fpu_vers;
 123         int i, cpuid;
 124 
 125         cpuid = get_cpuid();
 126 
 127         psr_impl = ((get_psr()>>28)&0xf);
 128         psr_vers = ((get_psr()>>24)&0xf);
 129 
 130         fpu_vers = ((get_fsr()>>17)&0x7);
 131 
 132         for(i = 0; i<NSPARCCHIPS; i++) {
 133                 if(linux_sparc_chips[i].psr_impl == psr_impl)
 134                         if(linux_sparc_chips[i].psr_vers == psr_vers) {
 135                                 sparc_cpu_type[cpuid] = linux_sparc_chips[i].cpu_name;
 136                                 break;
 137                         }
 138         }
 139 
 140         if(i==NSPARCCHIPS)
 141                 printk("DEBUG: psr.impl = 0x%x   psr.vers = 0x%x\n", psr_impl, 
 142                             psr_vers);
 143 
 144         for(i = 0; i<NSPARCFPU; i++) {
 145                 if(linux_sparc_fpu[i].psr_impl == psr_impl)
 146                         if(linux_sparc_fpu[i].fp_vers == fpu_vers) {
 147                                 sparc_fpu_type[cpuid] = linux_sparc_fpu[i].fp_name;
 148                                 break;
 149                         }
 150         }
 151 
 152         if(i == NSPARCFPU) {
 153                 printk("DEBUG: psr.impl = 0x%x  fsr.vers = 0x%x\n", psr_impl,
 154                             fpu_vers);
 155                 sparc_fpu_type[cpuid] = linux_sparc_fpu[31].fp_name;
 156         }
 157 }
/* */
root/arch/sparc/kernel/cpu.c

DEFINITIONS
