tag	line	file	source code
lval	3778	drivers/net/de4x5.c	u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];
lval	3923	drivers/net/de4x5.c	tmp.lval[0] = inl(DE4X5_STS); j+=4;
lval	3924	drivers/net/de4x5.c	tmp.lval[1] = inl(DE4X5_BMR); j+=4;
lval	3925	drivers/net/de4x5.c	tmp.lval[2] = inl(DE4X5_IMR); j+=4;
lval	3926	drivers/net/de4x5.c	tmp.lval[3] = inl(DE4X5_OMR); j+=4;
lval	3927	drivers/net/de4x5.c	tmp.lval[4] = inl(DE4X5_SISR); j+=4;
lval	3928	drivers/net/de4x5.c	tmp.lval[5] = inl(DE4X5_SICR); j+=4;
lval	3929	drivers/net/de4x5.c	tmp.lval[6] = inl(DE4X5_STRR); j+=4;
lval	3930	drivers/net/de4x5.c	tmp.lval[7] = inl(DE4X5_SIGR); j+=4;
lval	3946	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)lp->rx_ring; j+=4;
lval	3947	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)lp->tx_ring; j+=4;
lval	3951	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4;
lval	3954	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4;
lval	3957	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4;
lval	3960	drivers/net/de4x5.c	tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4;
lval	3964	drivers/net/de4x5.c	tmp.lval[j>>2] = (s32)lp->rx_ring[i].buf; j+=4;
lval	3967	drivers/net/de4x5.c	tmp.lval[j>>2] = (s32)lp->rx_ring[i].buf; j+=4;
lval	3970	drivers/net/de4x5.c	tmp.lval[j>>2] = (s32)lp->tx_ring[i].buf; j+=4;
lval	3973	drivers/net/de4x5.c	tmp.lval[j>>2] = (s32)lp->tx_ring[i].buf; j+=4;
lval	3976	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->rx_ring[i].status; j+=4;
lval	3979	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->tx_ring[i].status; j+=4;
lval	3982	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_BMR);  j+=4;
lval	3983	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_TPD);  j+=4;
lval	3984	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_RPD);  j+=4;
lval	3985	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_RRBA); j+=4;
lval	3986	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_TRBA); j+=4;
lval	3987	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_STS);  j+=4;
lval	3988	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_OMR);  j+=4;
lval	3989	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_IMR);  j+=4;
lval	3990	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->chipset; j+=4;
lval	3992	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_GEP);  j+=4;
lval	3994	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_SISR); j+=4;
lval	3995	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_SICR); j+=4;
lval	3996	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_STRR); j+=4;
lval	3997	drivers/net/de4x5.c	tmp.lval[j>>2] = inl(DE4X5_SIGR); j+=4;
lval	3999	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->phy[lp->active].id; j+=4;
lval	4001	drivers/net/de4x5.c	tmp.lval[j>>2] = lp->active; j+=4;
lval	4002	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_CR,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	4003	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_SR,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	4004	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ID0,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	4005	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ID1,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	4007	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ANA,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	4008	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(MII_ANLPA,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	4010	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x10,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	4012	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x11,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	4013	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x12,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	4015	drivers/net/de4x5.c	tmp.lval[j>>2]=mii_rd(0x14,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
lval	1709	drivers/net/depca.c	u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];