root/drivers/isdn/pcbit/pcbit.h

/* */

INCLUDED FROM

   1 /*
   2  * Copyright (C) 1996 Universidade de Lisboa
   3  * 
   4  * Written by Pedro Roque Marques (roque@di.fc.ul.pt)
   5  *
   6  * This software may be used and distributed according to the terms of 
   7  * the GNU Public License, incorporated herein by reference.
   8  */
   9 
  10 /*        
  11  *        PCBIT-D device driver definitions
  12  */
  13 
  14 #ifndef PCBIT_H
  15 #define PCBIT_H
  16 
  17 #define MAX_PCBIT_CARDS 4
  18 
  19 
  20 #define BLOCK_TIMER
  21 
  22 #ifdef __KERNEL__
  23 
  24 struct pcbit_chan {
  25         unsigned short id;
  26         unsigned short callref;                   /* Call Reference */
  27         unsigned char  proto;                     /* layer2protocol  */
  28         unsigned char  queued;                    /* unacked data messages */
  29         unsigned char  layer2link;                /* used in TData */
  30         unsigned char  snum;                      /* used in TData */
  31         unsigned short s_refnum;
  32         unsigned short r_refnum;
  33         unsigned short fsm_state;
  34         struct timer_list fsm_timer;
  35 #ifdef  BLOCK_TIMER
  36         struct timer_list block_timer;
  37 #endif
  38 };
  39 
  40 struct msn_entry {
  41         char *msn;
  42         struct msn_entry * next;
  43 };
  44 
  45 struct pcbit_dev {
  46         /* board */
  47 
  48         volatile unsigned char* sh_mem;         /* RDP address  */
  49         unsigned int irq;
  50         unsigned int id;
  51         unsigned int interrupt;                 /* set during interrupt 
  52                                                    processing */
  53         
  54         /* isdn4linux */
  55 
  56         struct msn_entry * msn_list;            /* ISDN address list */
  57         
  58         isdn_if * dev_if;
  59         
  60         ushort ll_hdrlen;
  61         ushort hl_hdrlen;
  62 
  63         /* link layer */
  64         unsigned char l2_state;
  65 
  66         struct frame_buf *read_queue;
  67         struct frame_buf *read_frame;
  68         struct frame_buf *write_queue;
  69 
  70         /* Protocol start */
  71         struct wait_queue *set_running_wq;
  72         struct timer_list set_running_timer;
  73 
  74         struct timer_list error_recover_timer;
  75 
  76         struct tq_struct qdelivery;
  77 
  78         u_char w_busy;
  79         u_char r_busy;
  80 
  81         volatile unsigned char *readptr;
  82         volatile unsigned char *writeptr;
  83 
  84         ushort loadptr;
  85 
  86         unsigned short fsize[8];                /* sent layer2 frames size */
  87 
  88         unsigned char send_seq;
  89         unsigned char rcv_seq;
  90         unsigned char unack_seq;
  91   
  92         unsigned short free;
  93 
  94         /* channels */
  95 
  96         struct pcbit_chan *b1;
  97         struct pcbit_chan *b2;  
  98 };
  99 
 100 #define STATS_TIMER (10*HZ)
 101 #define ERRTIME     (0.1*HZ)
 102 
 103 /* MRU */
 104 #define MAXBUFSIZE  1534
 105 #define MRU   MAXBUFSIZE
 106 
 107 #define STATBUF_LEN 2048
 108 /*
 109  * 
 110  */
 111 
 112 #endif /* __KERNEL__ */
 113 
 114 /* isdn_ctrl only allows a long sized argument */
 115 
 116 struct pcbit_ioctl {
 117         union {
 118                 struct byte_op {
 119                         ushort addr;
 120                         ushort value;
 121                 } rdp_byte;
 122                 unsigned long l2_status;
 123         } info;
 124 };
 125 
 126 
 127 
 128 #define PCBIT_IOCTL_GETSTAT  0x01    /* layer2 status */
 129 #define PCBIT_IOCTL_LWMODE   0x02    /* linear write mode */
 130 #define PCBIT_IOCTL_STRLOAD  0x03    /* start load mode */
 131 #define PCBIT_IOCTL_ENDLOAD  0x04    /* end load mode */
 132 #define PCBIT_IOCTL_SETBYTE  0x05    /* set byte */
 133 #define PCBIT_IOCTL_GETBYTE  0x06    /* get byte */
 134 #define PCBIT_IOCTL_RUNNING  0x07    /* set protocol running */
 135 #define PCBIT_IOCTL_WATCH188 0x08    /* set watch 188 */
 136 #define PCBIT_IOCTL_PING188  0x09    /* ping 188 */
 137 #define PCBIT_IOCTL_FWMODE   0x0A    /* firmware write mode */
 138 #define PCBIT_IOCTL_STOP     0x0B    /* stop protocol */
 139 #define PCBIT_IOCTL_APION    0x0C    /* issue API_ON  */
 140 
 141 #ifndef __KERNEL__
 142 
 143 #define PCBIT_GETSTAT  (PCBIT_IOCTL_GETSTAT  + IIOCDRVCTL)
 144 #define PCBIT_LWMODE   (PCBIT_IOCTL_LWMODE   + IIOCDRVCTL)
 145 #define PCBIT_STRLOAD  (PCBIT_IOCTL_STRLOAD  + IIOCDRVCTL)
 146 #define PCBIT_ENDLOAD  (PCBIT_IOCTL_ENDLOAD  + IIOCDRVCTL)
 147 #define PCBIT_SETBYTE  (PCBIT_IOCTL_SETBYTE  + IIOCDRVCTL)
 148 #define PCBIT_GETBYTE  (PCBIT_IOCTL_GETBYTE  + IIOCDRVCTL)
 149 #define PCBIT_RUNNING  (PCBIT_IOCTL_RUNNING  + IIOCDRVCTL)
 150 #define PCBIT_WATCH188 (PCBIT_IOCTL_WATCH188 + IIOCDRVCTL)
 151 #define PCBIT_PING188  (PCBIT_IOCTL_PING188  + IIOCDRVCTL)
 152 #define PCBIT_FWMODE   (PCBIT_IOCTL_FWMODE   + IIOCDRVCTL)
 153 #define PCBIT_STOP     (PCBIT_IOCTL_STOP     + IIOCDRVCTL)
 154 #define PCBIT_APION    (PCBIT_IOCTL_APION    + IIOCDRVCTL)
 155 
 156 #define MAXSUPERLINE 3000
 157 
 158 #endif
 159 
 160 #define L2_DOWN     0
 161 #define L2_LOADING  1
 162 #define L2_LWMODE   2
 163 #define L2_FWMODE   3
 164 #define L2_STARTING 4
 165 #define L2_RUNNING  5
 166 #define L2_ERROR    6
 167 
 168 #endif
 169 
 170 
 171 
 172 
 173 
 174 
 175 

/* */