1 /* 2 * linux/drivers/block/dtc2278.c Version 0.02 Feb 10, 1996 3 * 4 * Copyright (C) 1996 Linus Torvalds & author (see below) 5 */ 6
7 #undefREALLY_SLOW_IO/* most systems can safely undef this */ 8
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/delay.h>
12 #include <linux/timer.h>
13 #include <linux/mm.h>
14 #include <linux/ioport.h>
15 #include <linux/blkdev.h>
16 #include <linux/hdreg.h>
17 #include <asm/io.h>
18 #include "ide.h"
19 #include "ide_modes.h"
20
21 /* 22 * Changing this #undef to #define may solve start up problems in some systems. 23 */ 24 #undefALWAYS_SET_DTC2278_PIO_MODE 25
26 /* 27 * From: andy@cercle.cts.com (Dyan Wile) 28 * 29 * Below is a patch for DTC-2278 - alike software-programmable controllers 30 * The code enables the secondary IDE controller and the PIO4 (3?) timings on 31 * the primary (EIDE). You may probably have to enable the 32-bit support to 32 * get the full speed. You better get the disk interrupts disabled ( hdparm -u0 33 * /dev/hd.. ) for the drives connected to the EIDE interface. (I get my 34 * filesystem corrupted with -u1, but under heavy disk load only :-) 35 * 36 * This card is now forced to use the "serialize" feature, 37 * and irq-unmasking is disallowed. If io_32bit is enabled, 38 * it must be done for BOTH drives on each interface. 39 * 40 * This code was written for the DTC2278E, but might work with any of these: 41 * 42 * DTC2278S has only a single IDE interface. 43 * DTC2278D has two IDE interfaces and is otherwise identical to the S version. 44 * DTC2278E has onboard BIOS, while the others do not. 45 * DTC2278EB: "works like a charm" -- Kent Bradford <kent@theory.caltech.edu> 46 * 47 * There may be a fourth controller type. The S and D versions use the 48 * Winbond chip, and I think the E version does also. 49 * 50 */ 51
52 staticvoidsub22 (charb, charc)
/* */ 53 { 54 inti;
55
56 for(i = 0; i < 3; ++i) { 57 inb(0x3f6);
58 outb_p(b,0xb0);
59 inb(0x3f6);
60 outb_p(c,0xb4);
61 inb(0x3f6);
62 if(inb(0xb4) == c) { 63 outb_p(7,0xb0);
64 inb(0x3f6);
65 return; /* success */ 66 } 67 } 68 } 69
70 staticvoidtune_dtc2278 (ide_drive_t *drive, bytepio)
/* */ 71 { 72 unsignedlongflags;
73
74 if (pio == 255)
75 pio = ide_get_best_pio_mode(drive);
76
77 if (pio >= 3) { 78 save_flags(flags);
79 cli();
80 /* 81 * This enables PIO mode4 (3?) on the first interface 82 */ 83 sub22(1,0xc3);
84 sub22(0,0xa0);
85 restore_flags(flags);
86 }else{ 87 /* we don't know how to set it back again.. */ 88 } 89
90 /* 91 * 32bit I/O has to be enabled for *both* drives at the same time. 92 */ 93 drive->io_32bit = 1;
94 HWIF(drive)->drives[!drive->select.b.unit].io_32bit = 1;
95 } 96
97 voidinit_dtc2278 (void)
/* */ 98 { 99 unsignedlongflags;
100
101 save_flags(flags);
102 cli();
103 /* 104 * This enables the second interface 105 */ 106 outb_p(4,0xb0);
107 inb(0x3f6);
108 outb_p(0x20,0xb4);
109 inb(0x3f6);
110 #ifdefALWAYS_SET_DTC2278_PIO_MODE 111 /* 112 * This enables PIO mode4 (3?) on the first interface 113 * and may solve start-up problems for some people. 114 */ 115 sub22(1,0xc3);
116 sub22(0,0xa0);
117 #endif 118 restore_flags(flags);
119
120 ide_hwifs[0].serialized = 1;
121 ide_hwifs[1].serialized = 1;
122 ide_hwifs[0].chipset = ide_dtc2278;
123 ide_hwifs[1].chipset = ide_dtc2278;
124 ide_hwifs[0].tuneproc = &tune_dtc2278;
125 ide_hwifs[0].no_unmask = 1;
126 ide_hwifs[1].no_unmask = 1;
127 }