drivers/scsi/aic7xxx.c

/* */
This source file includes following definitions.
debug
debug_config
debug_scb
aic7xxx_setup
aic7xxx_loadseq
aic7xxx_delay
rcs_version
aic7xxx_info
aic7xxx_length
aic7xxx_scsirate
aic7xxx_putscb
aic7xxx_getscb
aic7xxx_match_scb
aic7xxx_busy_target
aic7xxx_unbusy_target
aic7xxx_done
aic7xxx_done_aborted_scbs
aic7xxx_add_waiting_scb
aic7xxx_abort_waiting_scb
aic7xxx_reset_device
aic7xxx_reset_current_bus
aic7xxx_reset_channel
aic7xxx_isr
aic7xxx_probe
read_2840_seeprom
read_seeprom
detect_maxscb
aic7xxx_register
aic7xxx_detect
aic7xxx_buildscb
aic7xxx_queue
aic7xxx_abort_reset
aic7xxx_abort
aic7xxx_reset
aic7xxx_biosparam
   1 /*+M*************************************************************************
   2  * Adaptec AIC7xxx device driver for Linux.
   3  *
   4  * Copyright (c) 1994 John Aycock
   5  *   The University of Calgary Department of Computer Science.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2, or (at your option)
  10  * any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; see the file COPYING.  If not, write to
  19  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  20  *
  21  * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F
  22  * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA
  23  * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide,
  24  * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux,
  25  * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file
  26  * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual,
  27  * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the
  28  * ANSI SCSI-2 specification (draft 10c), ...
  29  *
  30  * ----------------------------------------------------------------
  31  *  Modified to include support for wide and twin bus adapters,
  32  *  DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes,
  33  *  and other rework of the code.
  34  *
  35  *  Parts of this driver are based on the FreeBSD driver by Justin
  36  *  T. Gibbs.
  37  *
  38  *  A Boot time option was also added for not resetting the scsi bus.
  39  *
  40  *    Form:  aic7xxx=extended,no_reset
  41  *
  42  *    -- Daniel M. Eischen, deischen@iworks.InterWorks.org, 04/03/95
  43  *
  44  *  $Id: aic7xxx.c,v 3.0 1996/04/16 09:11:53 deang Exp $
  45  *-M*************************************************************************/
  46 
  47 #ifdef MODULE
  48 #include <linux/module.h>
  49 #endif
  50 
  51 #include <stdarg.h>
  52 #include <asm/io.h>
  53 #include <linux/string.h>
  54 #include <linux/errno.h>
  55 #include <linux/kernel.h>
  56 #include <linux/ioport.h>
  57 #include <linux/bios32.h>
  58 #include <linux/delay.h>
  59 #include <linux/sched.h>
  60 #include <linux/pci.h>
  61 #include <linux/proc_fs.h>
  62 #include <linux/blk.h>
  63 #include "sd.h"
  64 #include "scsi.h"
  65 #include "hosts.h"
  66 #include "aic7xxx.h"
  67 #include "aic7xxx_reg.h"
  68 #include <linux/stat.h>
  69 
  70 #include <linux/config.h>       /* for CONFIG_PCI */
  71 
  72 struct proc_dir_entry proc_scsi_aic7xxx = {
  73     PROC_SCSI_AIC7XXX, 7, "aic7xxx",
  74     S_IFDIR | S_IRUGO | S_IXUGO, 2
  75 };
  76 
  77 #define AIC7XXX_C_VERSION  "$Revision: 3.0 $"
  78 
  79 #define NUMBER(arr)     (sizeof(arr) / sizeof(arr[0]))
  80 #define MIN(a,b)        ((a < b) ? a : b)
  81 #define ALL_TARGETS -1
  82 #ifndef TRUE
  83 #  define TRUE 1
  84 #endif
  85 #ifndef FALSE
  86 #  define FALSE 0
  87 #endif
  88 
  89 /*
  90  * Defines for PCI bus support, testing twin bus support, DMAing of
  91  * SCBs, tagged queueing, commands (SCBs) per lun, and SCSI bus reset
  92  * delay time.
  93  *
  94  *   o PCI bus support - this has been implemented and working since
  95  *     the December 1, 1994 release of this driver. If you don't have
  96  *     a PCI bus, then you can configure your kernel without PCI
  97  *     support because all PCI dependent code is bracketed with
  98  *     "#ifdef CONFIG_PCI ... #endif CONFIG_PCI".
  99  *
 100  *   o Twin bus support - this has been tested and does work.
 101  *
 102  *   o DMAing of SCBs - thanks to Kai Makisara, this now works.
 103  *     This define is now taken out and DMAing of SCBs is always
 104  *     performed (8/12/95 - DE).
 105  *
 106  *   o Tagged queueing - this driver is capable of tagged queueing
 107  *     but I am unsure as to how well the higher level driver implements
 108  *     tagged queueing. Therefore, the maximum commands per lun is
 109  *     set to 2. If you want to implement tagged queueing, ensure
 110  *     this define is not commented out.
 111  *
 112  *   o Sharing IRQs - allowed for sharing of IRQs. This will allow
 113  *     for multiple aic7xxx host adapters sharing the same IRQ, but
 114  *     not for sharing IRQs with other devices. The higher level
 115  *     PCI code and interrupt handling needs to be modified to
 116  *     support this.
 117  *
 118  *   o Commands per lun - If tagged queueing is enabled, then you
 119  *     may want to try increasing AIC7XXX_CMDS_PER_LUN to more
 120  *     than 2.  By default, we limit the SCBs per lun to 2 with
 121  *     or without tagged queueing enabled.  If tagged queueing is
 122  *     disabled, the sequencer will keep the 2nd SCB in the input
 123  *     queue until the first one completes - so it is OK to to have
 124  *     more than 1 SCB queued.  If tagged queueing is enabled, then
 125  *     the sequencer will attempt to send the 2nd SCB to the device
 126  *     while the first SCB is executing and the device is disconnected.
 127  *     For adapters limited to 4 SCBs, you may want to actually
 128  *     decrease the commands per lun to 1, if you often have more
 129  *     than 2 devices active at the same time.  This will allocate
 130  *     1 SCB for each device and ensure that there will always be
 131  *     a free SCB for up to 4 devices active at the same time.
 132  *
 133  *   o 3985 support - The 3985 adapter is much like the 3940, but
 134  *     has three 7870 controllers as opposed to two for the 3940.
 135  *     It will get probed and recognized as three different adapters,
 136  *     but all three controllers share the same bank of 255 SCBs
 137  *     instead of each controller having their own bank (like the
 138  *     controllers on the 3940).  For this reason, it is important
 139  *     that all devices be resident on just one channel of the 3985.
 140  *     In the near future, we'll modify the driver to reserve 1/3
 141  *     of the SCBs for each controller.
 142  *
 143  *  Daniel M. Eischen, deischen@iworks.InterWorks.org, 01/11/96
 144  */
 145 
 146 /* Uncomment this for testing twin bus support. */
 147 #define AIC7XXX_TWIN_SUPPORT
 148 
 149 /* Uncomment this for tagged queueing. */
 150 /* #define AIC7XXX_TAGGED_QUEUEING */
 151 
 152 /* Uncomment this for allowing sharing of IRQs. */
 153 #define AIC7XXX_SHARE_IRQS
 154 
 155 /*
 156  * You can try raising me if tagged queueing is enabled, or lowering
 157  * me if you only have 4 SCBs.
 158  */
 159 #define AIC7XXX_CMDS_PER_LUN 2
 160 
 161 /* Set this to the delay in seconds after SCSI bus reset. */
 162 #define AIC7XXX_RESET_DELAY 15
 163 
 164 /*
 165  * Uncomment the following define for collection of SCSI transfer statistics
 166  * for the /proc filesystem.
 167  *
 168  * NOTE: This does affect performance since it has to maintain statistics.
 169  */
 170 /* #define AIC7XXX_PROC_STATS */
 171 
 172 /*
 173  * For debugging the abort/reset code.
 174  */
 175 /* #define AIC7XXX_DEBUG_ABORT */
 176 
 177 /*
 178  * For general debug messages
 179  */
 180 #define AIC7XXX_DEBUG
 181 
 182 /*
 183  * Controller type and options
 184  */
 185 typedef enum {
 186   AIC_NONE,
 187   AIC_7770,     /* EISA aic7770 on motherboard */
 188   AIC_7771,     /* EISA aic7771 on 274x */
 189   AIC_284x,     /* VLB  aic7770 on 284x, BIOS disabled */
 190   AIC_7850,     /* PCI  aic7850 */
 191   AIC_7855,     /* PCI  aic7855 */
 192   AIC_7870,     /* PCI  aic7870 on motherboard */
 193   AIC_7871,     /* PCI  aic7871 on 294x */
 194   AIC_7872,     /* PCI  aic7872 on 3940 */
 195   AIC_7873,     /* PCI  aic7873 on 3985 */
 196   AIC_7874,     /* PCI  aic7874 on 294x Differential */
 197   AIC_7880,     /* PCI  aic7880 on motherboard */
 198   AIC_7881,     /* PCI  aic7881 on 294x Ultra */
 199   AIC_7882,     /* PCI  aic7882 on 3940 Ultra */
 200   AIC_7883,     /* PCI  aic7883 on 3985 Ultra */
 201   AIC_7884      /* PCI  aic7884 on 294x Ultra Differential */
 202 } aha_type;
 203 
 204 typedef enum {
 205   AIC_777x,     /* AIC-7770 based */
 206   AIC_785x,     /* AIC-7850 based */
 207   AIC_787x,     /* AIC-7870 based */
 208   AIC_788x      /* AIC-7880 based */
 209 } aha_chip_type;
 210 
 211 typedef enum {
 212   AIC_SINGLE,  /* Single Channel */
 213   AIC_TWIN,    /* Twin Channel */
 214   AIC_WIDE     /* Wide Channel */
 215 } aha_bus_type;
 216 
 217 typedef enum {
 218   AIC_UNKNOWN,
 219   AIC_ENABLED,
 220   AIC_DISABLED
 221 } aha_status_type;
 222 
 223 typedef enum {
 224   LIST_HEAD,
 225   LIST_SECOND
 226 } insert_type;
 227 
 228 typedef enum {
 229   ABORT_RESET_INACTIVE,
 230   ABORT_RESET_PENDING,
 231   ABORT_RESET_SUCCESS
 232 } aha_abort_reset_type;
 233 
 234 /*
 235  * Define an array of board names that can be indexed by aha_type.
 236  * Don't forget to change this when changing the types!
 237  */
 238 static const char * board_names[] = {
 239   "<AIC-7xxx Unknown>",         /* AIC_NONE */
 240   "AIC-7770",                   /* AIC_7770 */
 241   "AHA-2740",                   /* AIC_7771 */
 242   "AHA-2840",                   /* AIC_284x */
 243   "AIC-7850",                   /* AIC_7850 */
 244   "AIC-7855",                   /* AIC_7855 */
 245   "AIC-7870",                   /* AIC_7870 */
 246   "AHA-2940",                   /* AIC_7871 */
 247   "AHA-3940",                   /* AIC_7872 */
 248   "AHA-3985",                   /* AIC_7873 */
 249   "AHA-2940 Differential",      /* AIC_7874 */
 250   "AIC-7880 Ultra",             /* AIC_7880 */
 251   "AHA-2940 Ultra",             /* AIC_7881 */
 252   "AHA-3940 Ultra",             /* AIC_7882 */
 253   "AHA-3985 Ultra",             /* AIC_7883 */
 254   "AHA-2940 Ultra Differential" /* AIC_7884 */
 255 };
 256 
 257 /*
 258  * There should be a specific return value for this in scsi.h, but
 259  * it seems that most drivers ignore it.
 260  */
 261 #define DID_UNDERFLOW   DID_ERROR
 262 
 263 /*
 264  *  What we want to do is have the higher level scsi driver requeue
 265  *  the command to us. There is no specific driver status for this
 266  *  condition, but the higher level scsi driver will requeue the
 267  *  command on a DID_BUS_BUSY error.
 268  */
 269 #define DID_RETRY_COMMAND DID_BUS_BUSY
 270 
 271 /*
 272  * EISA/VL-bus stuff
 273  */
 274 #define MINSLOT         1
 275 #define MAXSLOT         15
 276 #define SLOTBASE(x)     ((x) << 12)
 277 #define MAXIRQ          15
 278 
 279 /*
 280  * Standard EISA Host ID regs  (Offset from slot base)
 281  */
 282 #define HID0            0x80   /* 0,1: msb of ID2, 2-7: ID1      */
 283 #define HID1            0x81   /* 0-4: ID3, 5-7: LSB ID2         */
 284 #define HID2            0x82   /* product                        */
 285 #define HID3            0x83   /* firmware revision              */
 286 
 287 /*
 288  * AIC-7770 I/O range to reserve for a card
 289  */
 290 #define MINREG          0xC00
 291 #define MAXREG          0xCBF
 292 
 293 #define INTDEF          0x5C            /* Interrupt Definition Register */
 294 
 295 /*
 296  * Some defines for the HCNTRL register.
 297  */
 298 #define REQ_PAUSE       IRQMS | INTEN | PAUSE
 299 #define UNPAUSE_274X    IRQMS | INTEN
 300 #define UNPAUSE_284X    INTEN
 301 #define UNPAUSE_294X    IRQMS | INTEN
 302 
 303 /*
 304  * AIC-78X0 PCI registers
 305  */
 306 #define CLASS_PROGIF_REVID      0x08
 307 #define         DEVREVID        0x000000FFul
 308 #define         PROGINFC        0x0000FF00ul
 309 #define         SUBCLASS        0x00FF0000ul
 310 #define         BASECLASS       0xFF000000ul
 311 
 312 #define CSIZE_LATTIME           0x0C
 313 #define         CACHESIZE       0x0000003Ful    /* only 5 bits */
 314 #define         LATTIME         0x0000FF00ul
 315 
 316 #define DEVCONFIG               0x40
 317 #define         MPORTMODE       0x00000400ul    /* aic7870 only */
 318 #define         RAMPSM          0x00000200ul    /* aic7870 only */
 319 #define         VOLSENSE        0x00000100ul
 320 #define         SCBRAMSEL       0x00000080ul
 321 #define         MRDCEN          0x00000040ul
 322 #define         EXTSCBTIME      0x00000020ul    /* aic7870 only */
 323 #define         EXTSCBPEN       0x00000010ul    /* aic7870 only */
 324 #define         BERREN          0x00000008ul
 325 #define         DACEN           0x00000004ul
 326 #define         STPWLEVEL       0x00000002ul
 327 #define         DIFACTNEGEN     0x00000001ul    /* aic7870 only */
 328 
 329 /*
 330  *
 331  * Define the format of the SEEPROM registers (16 bits).
 332  *
 333  */
 334 struct seeprom_config {
 335 
 336 /*
 337  * SCSI ID Configuration Flags
 338  */
 339 #define CFXFER          0x0007          /* synchronous transfer rate */
 340 #define CFSYNCH         0x0008          /* enable synchronous transfer */
 341 #define CFDISC          0x0010          /* enable disconnection */
 342 #define CFWIDEB         0x0020          /* wide bus device (wide card) */
 343 /* UNUSED               0x00C0 */
 344 #define CFSTART         0x0100          /* send start unit SCSI command */
 345 #define CFINCBIOS       0x0200          /* include in BIOS scan */
 346 #define CFRNFOUND       0x0400          /* report even if not found */
 347 /* UNUSED               0xF800 */
 348   unsigned short device_flags[16];      /* words 0-15 */
 349 
 350 /*
 351  * BIOS Control Bits
 352  */
 353 #define CFSUPREM        0x0001          /* support all removable drives */
 354 #define CFSUPREMB       0x0002          /* support removable drives for boot only */
 355 #define CFBIOSEN        0x0004          /* BIOS enabled */
 356 /* UNUSED               0x0008 */
 357 #define CFSM2DRV        0x0010          /* support more than two drives */
 358 #define CF284XEXTEND    0x0020          /* extended translation (284x cards) */
 359 /* UNUSED               0x0040 */
 360 #define CFEXTEND        0x0080          /* extended translation enabled */
 361 /* UNUSED               0xFF00 */
 362   unsigned short bios_control;          /* word 16 */
 363 
 364 /*
 365  * Host Adapter Control Bits
 366  */
 367 /* UNUSED               0x0001 */
 368 #define CFULTRAEN       0x0002          /* Ultra SCSI speed enable (Ultra cards) */
 369 #define CF284XSELTO     0x0003          /* Selection timeout (284x cards) */
 370 #define CF284XFIFO      0x000C          /* FIFO Threshold (284x cards) */
 371 #define CFSTERM         0x0004          /* SCSI low byte termination (non-wide cards) */
 372 #define CFWSTERM        0x0008          /* SCSI high byte termination (wide card) */
 373 #define CFSPARITY       0x0010          /* SCSI parity */
 374 #define CF284XSTERM     0x0020          /* SCSI low byte termination (284x cards) */
 375 #define CFRESETB        0x0040          /* reset SCSI bus at IC initialization */
 376 /* UNUSED               0xFF80 */
 377   unsigned short adapter_control;       /* word 17 */
 378 
 379 /*
 380  * Bus Release, Host Adapter ID
 381  */
 382 #define CFSCSIID        0x000F          /* host adapter SCSI ID */
 383 /* UNUSED               0x00F0 */
 384 #define CFBRTIME        0xFF00          /* bus release time */
 385   unsigned short brtime_id;             /* word 18 */
 386 
 387 /*
 388  * Maximum targets
 389  */
 390 #define CFMAXTARG       0x00FF  /* maximum targets */
 391 /* UNUSED               0xFF00 */
 392   unsigned short max_targets;           /* word 19 */
 393 
 394   unsigned short res_1[11];             /* words 20-30 */
 395   unsigned short checksum;              /* word 31 */
 396 };
 397 
 398 /*
 399  * Pause the sequencer and wait for it to actually stop - this
 400  * is important since the sequencer can disable pausing for critical
 401  * sections.
 402  */
 403 #define PAUSE_SEQUENCER(p) \
 404   outb(p->pause, HCNTRL + p->base);                     \
 405   while ((inb(HCNTRL + p->base) & PAUSE) == 0)          \
 406     ;                                                   \
 407 
 408 /*
 409  * Unpause the sequencer. Unremarkable, yet done often enough to
 410  * warrant an easy way to do it.
 411  */
 412 #define UNPAUSE_SEQUENCER(p) \
 413   outb(p->unpause, HCNTRL + p->base)
 414 
 415 /*
 416  * Restart the sequencer program from address zero
 417  */
 418 #define RESTART_SEQUENCER(p) \
 419   do {                                                  \
 420     outb(SEQRESET | FASTMODE, SEQCTL + p->base);        \
 421   } while (inb(SEQADDR0 + p->base) != 0 &&              \
 422            inb(SEQADDR1 + p->base) != 0);               \
 423   UNPAUSE_SEQUENCER(p);
 424 
 425 /*
 426  * If an error occurs during a data transfer phase, run the command
 427  * to completion - it's easier that way - making a note of the error
 428  * condition in this location. This then will modify a DID_OK status
 429  * into an appropriate error for the higher-level SCSI code.
 430  */
 431 #define aic7xxx_error(cmd)      ((cmd)->SCp.Status)
 432 
 433 /*
 434  * Keep track of the targets returned status.
 435  */
 436 #define aic7xxx_status(cmd)     ((cmd)->SCp.sent_command)
 437 
 438 /*
 439  * The position of the SCSI commands scb within the scb array.
 440  */
 441 #define aic7xxx_position(cmd)   ((cmd)->SCp.have_data_in)
 442 
 443 /*
 444  * Since the sequencer code DMAs the scatter-gather structures
 445  * directly from memory, we use this macro to assert that the
 446  * kernel structure hasn't changed.
 447  */
 448 #define SG_STRUCT_CHECK(sg) \
 449   ((char *) &(sg).address - (char *) &(sg) != 0 ||  \
 450    (char *) &(sg).length  - (char *) &(sg) != 8 ||  \
 451    sizeof((sg).address) != 4 ||                   \
 452    sizeof((sg).length)  != 4 ||                   \
 453    sizeof(sg)           != 12)
 454 
 455 /*
 456  * "Static" structures. Note that these are NOT initialized
 457  * to zero inside the kernel - we have to initialize them all
 458  * explicitly.
 459  *
 460  * We support multiple adapter cards per interrupt, but keep a
 461  * linked list of Scsi_Host structures for each IRQ.  On an interrupt,
 462  * use the IRQ as an index into aic7xxx_boards[] to locate the card
 463  * information.
 464  */
 465 static struct Scsi_Host *aic7xxx_boards[MAXIRQ + 1];
 466 
 467 /*
 468  * When we detect and register the card, it is possible to
 469  * have the card raise a spurious interrupt.  Because we need
 470  * to support multiple cards, we cannot tell which card caused
 471  * the spurious interrupt.  And, we might not even have added
 472  * the card info to the linked list at the time the spurious
 473  * interrupt gets raised.  This variable is suppose to keep track
 474  * of when we are registering a card and how many spurious
 475  * interrupts we have encountered.
 476  *
 477  *   0 - do not allow spurious interrupts.
 478  *   1 - allow 1 spurious interrupt
 479  *   2 - have 1 spurious interrupt, do not allow any more.
 480  *
 481  * I've made it an integer instead of a boolean in case we
 482  * want to allow more than one spurious interrupt for debugging
 483  * purposes.  Otherwise, it could just go from true to false to
 484  * true (or something like that).
 485  *
 486  * When the driver detects the cards, we'll set the count to 1
 487  * for each card detection and registration.  After the registration
 488  * of a card completes, we'll set the count back to 0.  So far, it
 489  * seems to be enough to allow a spurious interrupt only during
 490  * card registration; if a spurious interrupt is going to occur,
 491  * this is where it happens.
 492  *
 493  * We should be able to find a way to avoid getting the spurious
 494  * interrupt.  But until we do, we have to keep this ugly code.
 495  */
 496 static int aic7xxx_spurious_count;
 497 
 498 /*
 499  * The driver keeps up to four scb structures per card in memory. Only the
 500  * first 25 bytes of the structure are valid for the hardware, the rest used
 501  * for driver level bookkeeping.
 502  */
 503 
 504 struct aic7xxx_scb {
 505 /* ------------    Begin hardware supported fields    ---------------- */
 506 /* 0*/  unsigned char control;
 507 /* 1*/  unsigned char target_channel_lun;       /* 4/1/3 bits */
 508 /* 2*/  unsigned char target_status;
 509 /* 3*/  unsigned char SG_segment_count;
 510 /* 4*/  unsigned char SG_list_pointer[4] __attribute__ ((packed));
 511 /* 8*/  unsigned char residual_SG_segment_count;
 512 /* 9*/  unsigned char residual_data_count[3];
 513 /*12*/  unsigned char data_pointer[4] __attribute__ ((packed));
 514 /*16*/  unsigned long data_count;
 515 /*20*/  unsigned char SCSI_cmd_pointer[4] __attribute__ ((packed));
 516 /*24*/  unsigned char SCSI_cmd_length;
 517 #define SCB_PIO_TRANSFER_SIZE   25      /*
 518                                          * amount we need to upload/download
 519                                          * via rep in/outsb to perform
 520                                          * a request sense.  The second
 521                                          * RESERVED byte is initialized to
 522                                          * 0 in getscb().
 523                                          */
 524 /*25*/  u_char next_waiting;            /* Used to thread SCBs awaiting selection. */
 525         /*-----------------end of hardware supported fields----------------*/
 526         struct aic7xxx_scb *next;       /* next ptr when in free list */
 527         Scsi_Cmnd          *cmd;        /* Scsi_Cmnd for this scb */
 528 #define SCB_FREE               0x00
 529 #define SCB_ACTIVE             0x01
 530 #define SCB_ABORTED            0x02
 531 #define SCB_DEVICE_RESET       0x04
 532 #define SCB_IMMED              0x08
 533 #define SCB_SENSE              0x10
 534 #define SCB_QUEUED_FOR_DONE    0x40
 535         int                 state;          /* current state of scb */
 536         unsigned int        position;       /* Position in scb array */
 537         struct scatterlist  sg;
 538         struct scatterlist  sense_sg;
 539         unsigned char       sense_cmd[6];   /* Allocate 6 characters for sense command */
 540 };
 541 
 542 static struct {
 543   unsigned char errno;
 544   const char *errmesg;
 545 } hard_error[] = {
 546   { ILLHADDR,  "Illegal Host Access" },
 547   { ILLSADDR,  "Illegal Sequencer Address referenced" },
 548   { ILLOPCODE, "Illegal Opcode in sequencer program" },
 549   { PARERR,    "Sequencer Ram Parity Error" }
 550 };
 551 
 552 static unsigned char
 553 generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 };
 554 
 555 /*
 556  * The maximum number of SCBs we could have for ANY type
 557  * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE
 558  * SEQUENCER CODE IF THIS IS MODIFIED!
 559  */
 560 #define AIC7XXX_MAXSCB  255
 561 
 562 /*
 563  * Define a structure used for each host adapter, only one per IRQ.
 564  */
 565 struct aic7xxx_host {
 566   struct Scsi_Host        *host;             /* pointer to scsi host */
 567   int                      base;             /* card base address */
 568   int                      maxscb;           /* hardware SCBs */
 569   int                      numscb;           /* current number of scbs */
 570   int                      extended;         /* extended xlate? */
 571   aha_type                 type;             /* card type */
 572   aha_chip_type            chip_type;        /* chip base type */
 573   int                      ultra_enabled;    /* Ultra SCSI speed enabled */
 574   int                      chan_num;         /* for 3940/3985, channel number */
 575   aha_bus_type             bus_type;         /* normal/twin/wide bus */
 576   unsigned char            a_scanned;        /* 0 not scanned, 1 scanned */
 577   unsigned char            b_scanned;        /* 0 not scanned, 1 scanned */
 578   unsigned int             isr_count;        /* Interrupt count */
 579   volatile unsigned char   unpause;          /* unpause value for HCNTRL */
 580   volatile unsigned char   pause;            /* pause value for HCNTRL */
 581   volatile unsigned short  needsdtr_copy;    /* default config */
 582   volatile unsigned short  needsdtr;
 583   volatile unsigned short  sdtr_pending;
 584   volatile unsigned short  needwdtr_copy;    /* default config */
 585   volatile unsigned short  needwdtr;
 586   volatile unsigned short  wdtr_pending;
 587   volatile unsigned short  discenable;       /* Targets allowed to disconnect */
 588   struct seeprom_config    seeprom;
 589   int                      have_seeprom;
 590   unsigned char            qcntmask;
 591   struct Scsi_Host        *next;             /* allow for multiple IRQs */
 592   struct aic7xxx_scb       scb_array[AIC7XXX_MAXSCB];  /* active commands */
 593   struct aic7xxx_scb      *free_scb;         /* list of free SCBs */
 594   struct aic7xxx_scb      *aborted_scb;       /* list of aborted SCBs */
 595 #ifdef AIC7XXX_PROC_STATS
 596   /*
 597    * Statistics Kept:
 598    *
 599    * Total Xfers (count for each command that has a data xfer),
 600    * broken down further by reads && writes.
 601    *
 602    * Binned sizes, writes && reads:
 603    *    < 512, 512, 1-2K, 2-4K, 4-8K, 8-16K, 16-32K, 32-64K, 64K-128K, > 128K
 604    *
 605    * Total amounts read/written above 512 bytes (amts under ignored)
 606    */
 607   struct aic7xxx_xferstats {
 608     long xfers;                              /* total xfer count */
 609     long w_total;                            /* total writes */
 610     long w_total512;                         /* 512 byte blocks written */
 611     long w_bins[10];                         /* binned write */
 612     long r_total;                            /* total reads */
 613     long r_total512;                         /* 512 byte blocks read */
 614     long r_bins[10];                         /* binned reads */
 615   } stats[2][16][8];                         /* channel, target, lun */
 616 #endif /* AIC7XXX_PROC_STATS */
 617 };
 618 
 619 struct aic7xxx_host_config {
 620   int              irq;        /* IRQ number */
 621   int              base;       /* I/O base */
 622   int              maxscb;     /* hardware SCBs */
 623   int              unpause;    /* unpause value for HCNTRL */
 624   int              pause;      /* pause value for HCNTRL */
 625   int              scsi_id;    /* host SCSI ID */
 626   int              scsi_id_b;  /* host SCSI ID B channel for twin cards */
 627   int              extended;   /* extended xlate? */
 628   int              ultra_enabled;    /* Ultra SCSI speed enabled */
 629   int              chan_num;   /* for 3940/3985, channel number */
 630   int              use_defaults;   /* Use default wide/sync settings. */
 631   unsigned char    busrtime;   /* bus release time */
 632   unsigned char    bus_speed;  /* bus speed */
 633   unsigned char    qcntmask;
 634   aha_type         type;       /* card type */
 635   aha_chip_type    chip_type;  /* chip base type */
 636   aha_bus_type     bus_type;   /* normal/twin/wide bus */
 637   aha_status_type  bios;       /* BIOS is enabled/disabled */
 638   aha_status_type  parity;     /* bus parity enabled/disabled */
 639   aha_status_type  low_term;   /* bus termination low byte */
 640   aha_status_type  high_term;  /* bus termination high byte (wide cards only) */
 641 };
 642 
 643 /*
 644  * Valid SCSIRATE values. (p. 3-17)
 645  * Provides a mapping of transfer periods in ns to the proper value to
 646  * stick in the scsiscfr reg to use that transfer rate.
 647  */
 648 static struct {
 649   short period;
 650   /* Rates in Ultra mode have bit 8 of sxfr set */
 651 #define         ULTRA_SXFR 0x100
 652   short rate;
 653   const char *english;
 654 } aic7xxx_syncrates[] = {
 655   {  50,  0x100,  "20.0" },
 656   {  62,  0x110,  "16.0" },
 657   {  75,  0x120,  "13.4" },
 658   { 100,  0x140,  "10.0" },
 659   { 100,  0x000,  "10.0" },
 660   { 125,  0x010,  "8.0"  },
 661   { 150,  0x020,  "6.67" },
 662   { 175,  0x030,  "5.7"  },
 663   { 200,  0x040,  "5.0"  },
 664   { 225,  0x050,  "4.4"  },
 665   { 250,  0x060,  "4.0"  },
 666   { 275,  0x070,  "3.6"  }
 667 };
 668 
 669 static int num_aic7xxx_syncrates =
 670     sizeof(aic7xxx_syncrates) / sizeof(aic7xxx_syncrates[0]);
 671 
 672 #ifdef CONFIG_PCI
 673 static int number_of_39xxs = 0;
 674 #endif CONFIG_PCI
 675 
 676 #ifdef AIC7XXX_DEBUG
 677 static void
 678 debug(const char *fmt, ...)
     /*  */
 679 {
 680   va_list ap;
 681   char buf[256];
 682 
 683   va_start(ap, fmt);
 684   vsprintf(buf, fmt, ap);
 685   printk(buf);
 686   va_end(ap);
 687 }
 688 
 689 static void
 690 debug_config(struct aic7xxx_host_config *p)
     /*  */
 691 {
 692   int scsi_conf;
 693   unsigned char brelease;
 694   unsigned char dfthresh;
 695 
 696   static int DFT[] = { 0, 50, 75, 100 };
 697   static int SST[] = { 256, 128, 64, 32 };
 698   static const char *BUSW[] = { "", "-TWIN", "-WIDE" };
 699 
 700   scsi_conf = inb(SCSICONF + p->base);
 701 
 702   /*
 703    * Scale the Data FIFO Threshold and the Bus Release Time; they are
 704    * stored in formats compatible for writing to sequencer registers.
 705    */
 706   dfthresh = p->bus_speed  >> 6;
 707 
 708   if (p->chip_type == AIC_777x)
 709   {
 710     brelease = p->busrtime >> 2;
 711   }
 712   else
 713   {
 714     brelease = p->busrtime;
 715   }
 716   if (brelease == 0)
 717   {
 718     brelease = 2;
 719   }
 720 
 721   switch (p->type)
 722   {
 723     case AIC_7770:
 724     case AIC_7771:
 725       printk("%s%s AT EISA SLOT %d:\n", board_names[p->type], BUSW[p->bus_type],
 726              p->base >> 12);
 727       break;
 728 
 729     case AIC_284x:
 730       printk("%s%s AT VLB SLOT %d:\n", board_names[p->type], BUSW[p->bus_type],
 731              p->base >> 12);
 732       break;
 733 
 734     case AIC_7850:
 735     case AIC_7855:
 736     case AIC_7870:
 737     case AIC_7871:
 738     case AIC_7872:
 739     case AIC_7873:
 740     case AIC_7874:
 741     case AIC_7880:
 742     case AIC_7881:
 743     case AIC_7882:
 744     case AIC_7883:
 745     case AIC_7884:
 746       printk("%s%s (PCI-bus):\n", board_names[p->type], BUSW[p->bus_type]);
 747       break;
 748 
 749     default:
 750       panic("aic7xxx: (debug_config) internal error.\n");
 751   }
 752 
 753   printk("    irq %d\n"
 754          "    bus release time %d bclks\n"
 755          "    data fifo threshold %d%%\n",
 756          p->irq,
 757          brelease,
 758          DFT[dfthresh]);
 759 
 760   printk("    SCSI CHANNEL A:\n"
 761          "        scsi id %d\n"
 762          "        scsi selection timeout %d ms\n"
 763          "        scsi bus reset at power-on %sabled\n",
 764          scsi_conf & 0x07,
 765          SST[(scsi_conf >> 3) & 0x03],
 766          (scsi_conf & 0x40) ? "en" : "dis");
 767 
 768   if ((p->chip_type == AIC_777x) && (p->parity == AIC_UNKNOWN))
 769   {
 770     /*
 771      * Set the parity for 7770 based cards.
 772      */
 773     p->parity = (scsi_conf & 0x20) ? AIC_ENABLED : AIC_DISABLED;
 774   }
 775   if (p->parity != AIC_UNKNOWN)
 776   {
 777     printk("        scsi bus parity %sabled\n",
 778            (p->parity == AIC_ENABLED) ? "en" : "dis");
 779   }
 780 
 781   if ((p->type == AIC_7770) || (p->type == AIC_7771))
 782   {
 783     p->low_term = (scsi_conf & 0x80) ? AIC_ENABLED : AIC_DISABLED;
 784   }
 785   if (p->low_term != AIC_UNKNOWN)
 786   {
 787     printk("        scsi bus termination (low byte) %sabled\n",
 788           (p->low_term == AIC_ENABLED) ? "en" : "dis");
 789   }
 790   if ((p->bus_type == AIC_WIDE) && (p->high_term != AIC_UNKNOWN))
 791   {
 792     printk("        scsi bus termination (high byte) %sabled\n",
 793           (p->high_term == AIC_ENABLED) ? "en" : "dis");
 794   }
 795 }
 796 
 797 #if 0
 798 static void
 799 debug_scb(struct aic7xxx_scb *scb)
     /*  */
 800 {
 801   printk("control 0x%x, tcl 0x%x, sg_count %d, sg_ptr 0x%x, cmdp 0x%x, cmdlen %d\n",
 802          scb->control, scb->target_channel_lun, scb->SG_segment_count,
 803          (scb->SG_list_pointer[3] << 24) | (scb->SG_list_pointer[2] << 16) |
 804          (scb->SG_list_pointer[1] << 8) | scb->SG_list_pointer[0],
 805          (scb->SCSI_cmd_pointer[3] << 24) | (scb->SCSI_cmd_pointer[2] << 16) |
 806          (scb->SCSI_cmd_pointer[1] << 8) | scb->SCSI_cmd_pointer[0],
 807          scb->SCSI_cmd_length);
 808   printk("reserved 0x%x, target status 0x%x, resid SG count %d, resid data count %d\n",
 809          (scb->RESERVED[1] << 8) | scb->RESERVED[0], scb->target_status,
 810          scb->residual_SG_segment_count, scb->residual_data_count);
 811   printk("data ptr 0x%x, data count %d, next waiting %d\n",
 812          (scb->data_pointer[3] << 24) | (scb->data_pointer[2] << 16) |
 813          (scb->data_pointer[1] << 8) | scb->data_pointer[0],
 814          scb->data_count, scb->next_waiting);
 815   printk("next ptr 0x%lx, Scsi Cmnd 0x%lx, state 0x%x, position %d\n",
 816          (unsigned long) scb->next, (unsigned long) scb->cmd, scb->state,
 817          scb->position);
 818 }
 819 #endif
 820 
 821 #else
 822 #  define debug(fmt, args...)
 823 #  define debug_config(x)
 824 #  define debug_scb(x)
 825 #endif AIC7XXX_DEBUG
 826 
 827 /*
 828  * XXX - these options apply unilaterally to _all_ 274x/284x/294x
 829  *       cards in the system. This should be fixed, but then,
 830  *       does anyone really have more than one in a machine?
 831  */
 832 static unsigned int aic7xxx_extended = 0;    /* extended translation on? */
 833 static unsigned int aic7xxx_no_reset = 0;    /* no resetting of SCSI bus */
 834 
 835 /*+F*************************************************************************
 836  * Function:
 837  *   aic7xxx_setup
 838  *
 839  * Description:
 840  *   Handle Linux boot parameters. This routine allows for assigning a value
 841  *   to a parameter with a ':' between the parameter and the value.
 842  *   ie. aic7xxx=unpause:0x0A,extended
 843  *-F*************************************************************************/
 844 void
 845 aic7xxx_setup(char *s, int *dummy)
     /*  */
 846 {
 847   int   i, n;
 848   char *p;
 849 
 850   static struct {
 851     const char *name;
 852     unsigned int *flag;
 853   } options[] = {
 854     { "extended",    &aic7xxx_extended },
 855     { "no_reset",    &aic7xxx_no_reset },
 856     { NULL,          NULL }
 857   };
 858 
 859   for (p = strtok(s, ","); p; p = strtok(NULL, ","))
 860   {
 861     for (i = 0; options[i].name; i++)
 862     {
 863       n = strlen(options[i].name);
 864       if (!strncmp(options[i].name, p, n))
 865       {
 866         if (p[n] == ':')
 867         {
 868           *(options[i].flag) = simple_strtoul(p + n + 1, NULL, 0);
 869         }
 870         else
 871         {
 872           *(options[i].flag) = !0;
 873         }
 874       }
 875     }
 876   }
 877 }
 878 
 879 /*+F*************************************************************************
 880  * Function:
 881  *   aic7xxx_loadseq
 882  *
 883  * Description:
 884  *   Load the sequencer code into the controller memory.
 885  *-F*************************************************************************/
 886 static void
 887 aic7xxx_loadseq(int base)
     /*  */
 888 {
 889   static unsigned char seqprog[] = {
 890     /*
 891      * Each sequencer instruction is 29 bits
 892      * long (fill in the excess with zeroes)
 893      * and has to be loaded from least -> most
 894      * significant byte, so this table has the
 895      * byte ordering reversed.
 896      */
 897 #   include "aic7xxx_seq.h"
 898   };
 899 
 900   /*
 901    * When the AIC-7770 is paused (as on chip reset), the
 902    * sequencer address can be altered and a sequencer
 903    * program can be loaded by writing it, byte by byte, to
 904    * the sequencer RAM port - the Adaptec documentation
 905    * recommends using REP OUTSB to do this, hence the inline
 906    * assembly. Since the address autoincrements as we load
 907    * the program, reset it back to zero afterward. Disable
 908    * sequencer RAM parity error detection while loading, and
 909    * make sure the LOADRAM bit is enabled for loading.
 910    */
 911   outb(PERRORDIS | SEQRESET | LOADRAM, SEQCTL + base);
 912 
 913   outsb(SEQRAM + base, seqprog, sizeof(seqprog));
 914 
 915   /*
 916    * WARNING!  This is a magic sequence!  After extensive
 917    * experimentation, it seems that you MUST turn off the
 918    * LOADRAM bit before you play with SEQADDR again, else
 919    * you will end up with parity errors being flagged on
 920    * your sequencer program. (You would also think that
 921    * turning off LOADRAM and setting SEQRESET to reset the
 922    * address to zero would work, but you need to do it twice
 923    * for it to take effect on the address. Timing problem?)
 924    */
 925   do {
 926     /*
 927      * Actually, reset it until
 928      * the address shows up as
 929      * zero just to be safe..
 930      */
 931     outb(SEQRESET | FASTMODE, SEQCTL + base);
 932   } while ((inb(SEQADDR0 + base) != 0) && (inb(SEQADDR1 + base) != 0));
 933 }
 934 
 935 /*+F*************************************************************************
 936  * Function:
 937  *   aic7xxx_delay
 938  *
 939  * Description:
 940  *   Delay for specified amount of time.
 941  *-F*************************************************************************/
 942 static void
 943 aic7xxx_delay(int seconds)
     /*  */
 944 {
 945   unsigned long i;
 946 
 947   i = jiffies + (seconds * HZ);  /* compute time to stop */
 948 
 949   while (jiffies < i)
 950   {
 951     ;  /* Do nothing! */
 952   }
 953 }
 954 
 955 /*+F*************************************************************************
 956  * Function:
 957  *   rcs_version
 958  *
 959  * Description:
 960  *   Return a string containing just the RCS version number from either
 961  *   an Id or Revision RCS clause.
 962  *-F*************************************************************************/
 963 const char *
 964 rcs_version(const char *version_info)
     /*  */
 965 {
 966   static char buf[10];
 967   char *bp, *ep;
 968 
 969   bp = NULL;
 970   strcpy(buf, "????");
 971   if (!strncmp(version_info, "$Id: ", 5))
 972   {
 973     if ((bp = strchr(version_info, ' ')) != NULL)
 974     {
 975       bp++;
 976       if ((bp = strchr(bp, ' ')) != NULL)
 977       {
 978         bp++;
 979       }
 980     }
 981   }
 982   else
 983   {
 984     if (!strncmp(version_info, "$Revision: ", 11))
 985     {
 986       if ((bp = strchr(version_info, ' ')) != NULL)
 987       {
 988         bp++;
 989       }
 990     }
 991   }
 992 
 993   if (bp != NULL)
 994   {
 995     if ((ep = strchr(bp, ' ')) != NULL)
 996     {
 997       register int len = ep - bp;
 998 
 999       strncpy(buf, bp, len);
1000       buf[len] = '\0';
1001     }
1002   }
1003 
1004   return buf;
1005 }
1006 
1007 /*+F*************************************************************************
1008  * Function:
1009  *   aic7xxx_info
1010  *
1011  * Description:
1012  *   Return a string describing the driver.
1013  *-F*************************************************************************/
1014 const char *
1015 aic7xxx_info(struct Scsi_Host *notused)
     /*  */
1016 {
1017   static char buffer[128];
1018 
1019   strcpy(buffer, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) ");
1020   strcat(buffer, rcs_version(AIC7XXX_C_VERSION));
1021   strcat(buffer, "/");
1022   strcat(buffer, rcs_version(AIC7XXX_H_VERSION));
1023   strcat(buffer, "/");
1024   strcat(buffer, rcs_version(AIC7XXX_SEQ_VER));
1025 
1026   return buffer;
1027 }
1028 
1029 /*+F*************************************************************************
1030  * Function:
1031  *   aic7xxx_length
1032  *
1033  * Description:
1034  *   How much data should be transferred for this SCSI command? Stop
1035  *   at segment sg_last if it's a scatter-gather command so we can
1036  *   compute underflow easily.
1037  *-F*************************************************************************/
1038 static unsigned
1039 aic7xxx_length(Scsi_Cmnd *cmd, int sg_last)
     /*  */
1040 {
1041   int i, segments;
1042   unsigned length;
1043   struct scatterlist *sg;
1044 
1045   segments = cmd->use_sg - sg_last;
1046   sg = (struct scatterlist *) cmd->buffer;
1047 
1048   if (cmd->use_sg)
1049   {
1050     for (i = length = 0; (i < cmd->use_sg) && (i < segments); i++)
1051     {
1052       length += sg[i].length;
1053     }
1054   }
1055   else
1056   {
1057     length = cmd->request_bufflen;
1058   }
1059 
1060   return (length);
1061 }
1062 
1063 /*+F*************************************************************************
1064  * Function:
1065  *   aic7xxx_scsirate
1066  *
1067  * Description:
1068  *   Look up the valid period to SCSIRATE conversion in our table
1069  *-F*************************************************************************/
1070 static void
1071 aic7xxx_scsirate(struct aic7xxx_host *p, unsigned char *scsirate,
     /*  */
1072                  short period, unsigned char offset,
1073                  int target, char channel)
1074 {
1075   int i;
1076 
1077   for (i = 0; i < num_aic7xxx_syncrates; i++)
1078   {
1079     if ((aic7xxx_syncrates[i].period - period) >= 0)
1080     {
1081       /*
1082        * Watch out for Ultra speeds when ultra is not enabled and
1083        * vice-versa.
1084        */
1085       if (p->ultra_enabled)
1086       {
1087         if (!(aic7xxx_syncrates[i].rate & ULTRA_SXFR))
1088         {
1089           printk ("aic7xxx: Target %d, channel %c, requests %sMHz transfers, "
1090                   "but adapter in Ultra mode can only sync at 7.2MHz or "
1091                   "above.\n", target, channel, aic7xxx_syncrates[i].english);
1092           break;  /* Use asynchronous transfers. */
1093         }
1094       }
1095       else
1096       {
1097         /*
1098          * Check for an Ultra device trying to negotiate an Ultra rate
1099          * on an adapter with Ultra mode disabled.
1100          */
1101         if (aic7xxx_syncrates[i].rate & ULTRA_SXFR)
1102         {
1103           /*
1104            * This should only happen if the driver is the first to negotiate
1105            * and chooses a high rate.  We'll just move down the table until
1106            * we hit a non Ultra speed.
1107            */
1108            continue;
1109         }
1110       }
1111       *scsirate = (aic7xxx_syncrates[i].rate) | (offset & 0x0F);
1112       printk("aic7xxx: Target %d, channel %c, now synchronous at %sMHz, "
1113              "offset(0x%x).\n",
1114              target, channel, aic7xxx_syncrates[i].english, offset);
1115       return;
1116     }
1117   }
1118 
1119   /*
1120    * Default to asynchronous transfer
1121    */
1122   *scsirate = 0;
1123   printk("aic7xxx: Target %d, channel %c, using asynchronous transfers.\n",
1124          target, channel);
1125 }
1126 
1127 /*+F*************************************************************************
1128  * Function:
1129  *   aic7xxx_putscb
1130  *
1131  * Description:
1132  *   Transfer a SCB to the controller.
1133  *-F*************************************************************************/
1134 static inline void
1135 aic7xxx_putscb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
     /*  */
1136 {
1137   unsigned char curscb;
1138   int base = p->base;
1139 
1140   curscb = inb(SCBPTR + base);
1141   outb(scb->position, SCBPTR + base);
1142   outb(SCBAUTO, SCBCNT + base);
1143 
1144   /*
1145    * By turning on the SCB auto increment, any reference
1146    * to the SCB I/O space postincrements the SCB address
1147    * we're looking at. So turn this on and dump the relevant
1148    * portion of the SCB to the card.
1149    *
1150    * We can do 16bit transfers on all but 284x.
1151    */
1152   if (p->type == AIC_284x)
1153   {
1154     outsb(SCBARRAY + base, scb, SCB_PIO_TRANSFER_SIZE);
1155   }
1156   else
1157   {
1158     outsl(SCBARRAY + base, scb, (SCB_PIO_TRANSFER_SIZE + 3) / 4);
1159   }
1160 
1161   outb(0, SCBCNT + base);
1162   outb(curscb, SCBPTR + base);
1163 }
1164 
1165 /*+F*************************************************************************
1166  * Function:
1167  *   aic7xxx_getscb
1168  *
1169  * Description:
1170  *   Get a SCB from the controller.
1171  *-F*************************************************************************/
1172 static inline void
1173 aic7xxx_getscb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
     /*  */
1174 {
1175   int base = p->base;
1176 
1177   /*
1178    * This is almost identical to aic7xxx_putscb().
1179    */
1180   outb(SCBAUTO, SCBCNT + base);
1181   insb(SCBARRAY + base, scb, SCB_PIO_TRANSFER_SIZE);
1182   outb(0, SCBCNT + base);
1183 }
1184 
1185 /*+F*************************************************************************
1186  * Function:
1187  *   aic7xxx_match_scb
1188  *
1189  * Description:
1190  *   Checks to see if an scb matches the target/channel as specified.
1191  *   If target is ALL_TARGETS (-1), then we're looking for any device
1192  *   on the specified channel; this happens when a channel is going
1193  *   to be reset and all devices on that channel must be aborted.
1194  *-F*************************************************************************/
1195 static int
1196 aic7xxx_match_scb(struct aic7xxx_scb *scb, int target, char channel)
     /*  */
1197 {
1198   int targ = (scb->target_channel_lun >> 4) & 0x0F;
1199   char chan = (scb->target_channel_lun & SELBUSB) ? 'B' : 'A';
1200 
1201 #ifdef AIC7XXX_DEBUG_ABORT
1202   printk ("aic7xxx: (match_scb) comparing target/channel %d/%c to scb %d/%c\n",
1203           target, channel, targ, chan);
1204 #endif
1205   if (target == ALL_TARGETS)
1206   {
1207     return (chan == channel);
1208   }
1209   else
1210   {
1211     return ((chan == channel) && (targ == target));
1212   }
1213 }
1214 
1215 /*+F*************************************************************************
1216  * Function:
1217  *   aic7xxx_busy_target
1218  *
1219  * Description:
1220  *   Set the specified target active.
1221  *-F*************************************************************************/
1222 static void
1223 aic7xxx_busy_target(unsigned char target, char channel, int base)
     /*  */
1224 {
1225   unsigned char active;
1226   unsigned long active_port = ACTIVE_A + base;
1227 
1228   if ((target > 0x07) || (channel == 'B'))
1229   {
1230     /*
1231      * targets on the Second channel or above id 7 store info in byte two
1232      * of ACTIVE
1233      */
1234     active_port++;
1235   }
1236   active = inb(active_port);
1237   active |= (0x01 << (target & 0x07));
1238   outb(active, active_port);
1239 }
1240 
1241 /*+F*************************************************************************
1242  * Function:
1243  *   aic7xxx_unbusy_target
1244  *
1245  * Description:
1246  *   Set the specified target inactive.
1247  *-F*************************************************************************/
1248 static void
1249 aic7xxx_unbusy_target(unsigned char target, char channel, int base)
     /*  */
1250 {
1251   unsigned char active;
1252   unsigned long active_port = ACTIVE_A + base;
1253 
1254 #ifdef 0
1255   printk ("aic7xxx: (unbusy_target) target/channel %d/%c\n",
1256           target, channel);
1257 #endif
1258   if ((target > 0x07) || (channel == 'B'))
1259   {
1260     /*
1261      * targets on the Second channel or above id 7 store info in byte two
1262      * of ACTIVE
1263      */
1264     active_port++;
1265   }
1266   active = inb(active_port);
1267   active &= ~(0x01 << (target & 0x07));
1268   outb(active, active_port);
1269 }
1270 
1271 /*+F*************************************************************************
1272  * Function:
1273  *   aic7xxx_done
1274  *
1275  * Description:
1276  *   Calls the higher level scsi done function and frees the scb.
1277  *-F*************************************************************************/
1278 static void
1279 aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
     /*  */
1280 {
1281   long flags;
1282   Scsi_Cmnd *cmd = scb->cmd;
1283 
1284 #ifdef 0
1285   printk ("aic7xxx: (done) target/channel %d/%d\n",
1286           cmd->target, cmd->channel);
1287 #endif
1288   /*
1289    * This is a critical section, since we don't want the
1290    * queue routine mucking with the host data.
1291    */
1292   save_flags(flags);
1293   cli();
1294 
1295   /*
1296    * Process the command after marking the scb as free
1297    * and adding it to the free list.
1298    */
1299   scb->state = SCB_FREE;
1300   scb->next = p->free_scb;
1301   p->free_scb = scb;
1302   scb->cmd = NULL;
1303 
1304   restore_flags(flags);
1305   cmd->scsi_done(cmd);
1306 }
1307 
1308 /*+F*************************************************************************
1309  * Function:
1310  *   aic7xxx_done_aborted_scbs
1311  *
1312  * Description:
1313  *   Calls the scsi_done() for the Scsi_Cmnd of each scb in the
1314  *   aborted list, and adds each scb to the free list.
1315  *-F*************************************************************************/
1316 static void
1317 aic7xxx_done_aborted_scbs (struct aic7xxx_host *p)
     /*  */
1318 {
1319   Scsi_Cmnd *cmd;
1320   struct aic7xxx_scb *scb;
1321   int i;
1322 
1323 #ifdef AIC7XXX_DEBUG_ABORT
1324   int scb_aborted = 0;
1325   printk("aic7xxx: (done_aborted_scbs) calling scsi_done() for aborted scbs\n");
1326 #endif
1327 
1328   for (i = 0; i < p->numscb; i++)
1329   {
1330     scb = &(p->scb_array[i]);
1331     if (scb->state & SCB_QUEUED_FOR_DONE)
1332     {
1333 #ifdef AIC7XXX_DEBUG_ABORT
1334       if (scb_aborted == 0)
1335       {
1336         printk("aic7xxx: (done_aborted_scbs) Aborting scb %d", scb->position);
1337         scb_aborted++;
1338       }
1339       else
1340       {
1341         printk(", %d", scb->position);
1342       }
1343 #endif
1344       /*
1345        * Process the command after marking the scb as free
1346        * and adding it to the free list.
1347        */
1348       scb->state = SCB_FREE;
1349       scb->next = p->free_scb;
1350       p->free_scb = scb;
1351       cmd = scb->cmd;
1352       scb->cmd = NULL;
1353       cmd->scsi_done(cmd);  /* call the done function */
1354     }
1355   }
1356 #ifdef AIC7XXX_DEBUG_ABORT
1357   if (scb_aborted != 0)
1358     printk("\n");
1359 #endif
1360 }
1361 
1362 /*+F*************************************************************************
1363  * Function:
1364  *   aic7xxx_add_waiting_scb
1365  *
1366  * Description:
1367  *   Add this SCB to the head of the "waiting for selection" list.
1368  *-F*************************************************************************/
1369 static void
1370 aic7xxx_add_waiting_scb(u_long              base,
     /*  */
1371                         struct aic7xxx_scb *scb)
1372 {
1373   unsigned char next;
1374   unsigned char curscb;
1375 
1376   curscb = inb(SCBPTR + base);
1377   next = inb(WAITING_SCBH + base);
1378 
1379   outb(scb->position, SCBPTR + base);
1380   outb(next, SCB_NEXT_WAITING + base);
1381   outb(scb->position, WAITING_SCBH + base);
1382 
1383   outb(curscb, SCBPTR + base);
1384 }
1385 
1386 /*+F*************************************************************************
1387  * Function:
1388  *   aic7xxx_abort_waiting_scb
1389  *
1390  * Description:
1391  *   Manipulate the waiting for selection list and return the
1392  *   scb that follows the one that we remove.
1393  *-F*************************************************************************/
1394 static unsigned char
1395 aic7xxx_abort_waiting_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
     /*  */
1396                           unsigned char prev, unsigned char timedout_scb)
1397 {
1398   unsigned char curscb, next;
1399   int target = (scb->target_channel_lun >> 4) & 0x0F;
1400   char channel = (scb->target_channel_lun & SELBUSB) ? 'B' : 'A';
1401   int base = p->base;
1402 
1403   /*
1404    * Select the SCB we want to abort and pull the next pointer out of it.
1405    */
1406   curscb = inb(SCBPTR + base);
1407   outb(scb->position, SCBPTR + base);
1408   next = inb(SCB_NEXT_WAITING + base);
1409 
1410   /*
1411    * Clear the necessary fields
1412    */
1413   outb(0, SCB_CONTROL + base);
1414   outb(SCB_LIST_NULL, SCB_NEXT_WAITING + base);
1415   aic7xxx_unbusy_target(target, channel, base);
1416 
1417   /*
1418    * Update the waiting list
1419    */
1420   if (prev == SCB_LIST_NULL)
1421   {
1422     /*
1423      * First in the list
1424      */
1425     outb(next, WAITING_SCBH + base);
1426   }
1427   else
1428   {
1429     /*
1430      * Select the scb that pointed to us and update its next pointer.
1431      */
1432     outb(prev, SCBPTR + base);
1433     outb(next, SCB_NEXT_WAITING + base);
1434   }
1435   /*
1436    * Point us back at the original scb position and inform the SCSI
1437    * system that the command has been aborted.
1438    */
1439   outb(curscb, SCBPTR + base);
1440   scb->state |= SCB_ABORTED | SCB_QUEUED_FOR_DONE;
1441   scb->cmd->result = (DID_RESET << 16);
1442 
1443 #ifdef AIC7XXX_DEBUG_ABORT
1444   printk ("aic7xxx: (abort_waiting_scb) target/channel %d/%c, prev %d, "
1445           "to_scb %d, next %d\n", target, channel, prev, timedout_scb, next);
1446 #endif
1447   return (next);
1448 }
1449 
1450 /*+F*************************************************************************
1451  * Function:
1452  *   aic7xxx_reset_device
1453  *
1454  * Description:
1455  *   The device at the given target/channel has been reset.  Abort
1456  *   all active and queued scbs for that target/channel.
1457  *-F*************************************************************************/
1458 static int
1459 aic7xxx_reset_device(struct aic7xxx_host *p, int target, char channel,
     /*  */
1460                      unsigned char timedout_scb)
1461 {
1462   int base = p->base;
1463   struct aic7xxx_scb *scb;
1464   unsigned char active_scb;
1465   int i = 0;
1466   int found = 0;
1467 
1468   /*
1469    * Restore this when we're done
1470    */
1471   active_scb = inb(SCBPTR + base);
1472 
1473 #ifdef AIC7XXX_DEBUG_ABORT
1474   printk ("aic7xxx: (reset_device) target/channel %d/%c, to_scb %d, "
1475           "active_scb %d\n", target, channel, timedout_scb, active_scb);
1476 #endif
1477   /*
1478    * Search the QINFIFO.
1479    */
1480   {
1481     int saved_queue[AIC7XXX_MAXSCB];
1482     int queued = inb(QINCNT + base);
1483 
1484 #ifdef AIC7XXX_DEBUG_ABORT
1485     if (queued)
1486       printk ("aic7xxx: (reset_device) found %d SCBs in queue\n", queued);
1487 #endif
1488     for (i = 0; i < (queued - found); i++)
1489     {
1490       saved_queue[i] = inb(QINFIFO + base);
1491       scb = &(p->scb_array[saved_queue[i]]);
1492       if (aic7xxx_match_scb(scb, target, channel))
1493       {
1494         /*
1495          * We found an scb that needs to be aborted.
1496          */
1497 #ifdef AIC7XXX_DEBUG_ABORT
1498         printk ("aic7xxx: (reset_device) aborting SCB %d\n", saved_queue[i]);
1499 #endif
1500         scb->state |= SCB_ABORTED | SCB_QUEUED_FOR_DONE;
1501         scb->cmd->result = (DID_RESET << 16);
1502         outb(scb->position, SCBPTR + base);
1503         outb(0, SCBARRAY + base);
1504         i--;
1505         found++;
1506       }
1507     }
1508     /*
1509      * Now put the saved scbs back.
1510      */
1511     for (queued = 0; queued < i; queued++)
1512     {
1513       outb(saved_queue[queued], QINFIFO + base);
1514     }
1515   }
1516 
1517   /*
1518    * Search waiting for selection list.
1519    */
1520   {
1521     unsigned char next, prev;
1522 
1523     next = inb(WAITING_SCBH + base);  /* Start at head of list. */
1524     prev = SCB_LIST_NULL;
1525 
1526 #ifdef AIC7XXX_DEBUG_ABORT
1527   printk ("aic7xxx: (reset_device) Searching waiting SCBs, head %d\n", next);
1528 #endif
1529     while (next != SCB_LIST_NULL)
1530     {
1531       scb = &(p->scb_array[next]);
1532       /*
1533        * Select the SCB.
1534        */
1535       if (aic7xxx_match_scb(scb, target, channel))
1536       {
1537         next = aic7xxx_abort_waiting_scb(p, scb, prev, timedout_scb);
1538         found++;
1539       }
1540       else
1541       {
1542         outb(scb->position, SCBPTR + base);
1543         prev = next;
1544         next = inb(SCB_NEXT_WAITING + base);
1545       }
1546     }
1547   }
1548 
1549   /*
1550    * Go through the entire SCB array now and look for commands for
1551    * for this target that are active.  These are other (most likely
1552    * tagged) commands that were disconnected when the reset occurred.
1553    */
1554   for (i = 0; i < p->numscb; i++)
1555   {
1556     scb = &(p->scb_array[i]);
1557     if ((scb->state & SCB_ACTIVE) && aic7xxx_match_scb(scb, target, channel))
1558     {
1559       /*
1560        * Ensure the target is "free"
1561        */
1562 #ifdef AIC7XXX_DEBUG_ABORT
1563   printk ("aic7xxx: (reset_device) freeing disconnected SCB %d\n", i);
1564 #endif
1565       aic7xxx_unbusy_target(target, channel, base);
1566       outb(scb->position, SCBPTR + base);
1567       outb(0, SCBARRAY + base);
1568       scb->state |= SCB_ABORTED | SCB_QUEUED_FOR_DONE;
1569       scb->cmd->result = (DID_RESET << 16);
1570       found++;
1571     }
1572   }
1573 
1574   outb(active_scb, SCBPTR + base);
1575   return (found);
1576 }
1577 
1578 /*+F*************************************************************************
1579  * Function:
1580  *   aic7xxx_reset_current_bus
1581  *
1582  * Description:
1583  *   Reset the current SCSI bus.
1584  *-F*************************************************************************/
1585 static void
1586 aic7xxx_reset_current_bus(int base)
     /*  */
1587 {
1588 #ifdef AIC7XXX_DEBUG_ABORT
1589     printk ("aic7xxx: (reset_current_bus)\n");
1590 #endif
1591   outb(SCSIRSTO, SCSISEQ + base);
1592   udelay(1000);
1593   outb(0, SCSISEQ + base);
1594 }
1595 
1596 /*+F*************************************************************************
1597  * Function:
1598  *   aic7xxx_reset_channel
1599  *
1600  * Description:
1601  *   Reset the channel.
1602  *-F*************************************************************************/
1603 static int
1604 aic7xxx_reset_channel(struct aic7xxx_host *p, char channel,
     /*  */
1605                      unsigned char timedout_scb, int initiate_reset)
1606 {
1607   int base = p->base;
1608   unsigned char sblkctl;
1609   char cur_channel;
1610   unsigned long offset, offset_max;
1611   int found;
1612 
1613 #ifdef AIC7XXX_DEBUG_ABORT
1614   printk ("aic7xxx: (reset_channel) channel %c, to_scb %d\n",
1615           channel, timedout_scb);
1616 #endif
1617   /*
1618    * Clean up all the state information for the
1619    * pending transactions on this bus.
1620    */
1621   found = aic7xxx_reset_device(p, ALL_TARGETS, channel, timedout_scb);
1622 
1623   if (channel == 'B')
1624   {
1625     p->needsdtr |= (p->needsdtr_copy & 0xFF00);
1626     p->sdtr_pending &= 0x00FF;
1627     outb(0, ACTIVE_B + base);
1628     offset = TARG_SCRATCH + base + 8;
1629     offset_max = TARG_SCRATCH + base + 16;
1630   }
1631   else
1632   {
1633     if (p->bus_type == AIC_WIDE)
1634     {
1635       p->needsdtr = p->needsdtr_copy;
1636       p->needwdtr = p->needwdtr_copy;
1637       p->sdtr_pending = 0x0;
1638       p->wdtr_pending = 0x0;
1639       outb(0, ACTIVE_A + base);
1640       outb(0, ACTIVE_B + base);
1641       offset = TARG_SCRATCH + base;
1642       offset_max = TARG_SCRATCH + base + 16;
1643     }
1644     else
1645     {
1646       p->needsdtr |= (p->needsdtr_copy & 0x00FF);
1647       p->sdtr_pending &= 0xFF00;
1648       outb(0, ACTIVE_A + base);
1649       offset = TARG_SCRATCH + base;
1650       offset_max = TARG_SCRATCH + base + 8;
1651     }
1652   }
1653   while (offset < offset_max)
1654   {
1655     /*
1656      * Revert to async/narrow transfers
1657      * until we renegotiate.
1658      */
1659     u_char targ_scratch;
1660     targ_scratch = inb(offset);
1661     targ_scratch &= SXFR;
1662     outb(targ_scratch, offset);
1663     offset++;
1664   }
1665 
1666   /*
1667    * Reset the bus and unpause/restart the controller
1668    */
1669 
1670   /*
1671    * Case 1: Command for another bus is active
1672    */
1673   sblkctl = inb(SBLKCTL + base);
1674   cur_channel = (sblkctl & SELBUSB) ? 'B' : 'A';
1675   if (cur_channel != channel)
1676   {
1677 #ifdef AIC7XXX_DEBUG_ABORT
1678     printk ("aic7xxx: (reset_channel) Stealthily resetting channel %c\n",
1679             channel);
1680 #endif
1681     /*
1682      * Stealthily reset the other bus without upsetting the current bus
1683      */
1684     outb(sblkctl ^ SELBUSB, SBLKCTL + base);
1685     if (initiate_reset)
1686     {
1687       aic7xxx_reset_current_bus(base);
1688     }
1689     /* Ensure we don't get a RSTI interrupt from this. */
1690     outb(CLRSCSIRSTI | CLRSELTIMEO, CLRSINT1 + base);
1691     outb(CLRSCSIINT, CLRINT + base);
1692     outb(sblkctl, SBLKCTL + base);
1693 
1694     UNPAUSE_SEQUENCER(p);
1695   }
1696   /*
1697    * Case 2: A command from this bus is active or we're idle
1698    */
1699   else
1700   {
1701 #ifdef AIC7XXX_DEBUG_ABORT
1702     printk ("aic7xxx: (reset_channel) Resetting current channel %c\n",
1703             channel);
1704 #endif
1705     if (initiate_reset)
1706     {
1707       aic7xxx_reset_current_bus(base);
1708     }
1709     /* Ensure we don't get a RSTI interrupt from this. */
1710     outb(CLRSCSIRSTI | CLRSELTIMEO, CLRSINT1 + base);
1711     outb(CLRSCSIINT, CLRINT + base);
1712 
1713     RESTART_SEQUENCER(p);
1714 #ifdef AIC7XXX_DEBUG_ABORT
1715     printk ("aic7xxx: (reset_channel) Channel reset, sequencer restarted\n");
1716 #endif
1717   }
1718 
1719   /*
1720    * Set the time of last reset.
1721    */
1722   p->host->last_reset = jiffies;
1723 
1724   /*
1725    * Now loop through all the SCBs that have been marked for abortion,
1726    * and call the scsi_done routines.
1727    */
1728   aic7xxx_done_aborted_scbs(p);
1729   return found;
1730 }
1731 
1732 /*+F*************************************************************************
1733  * Function:
1734  *   aic7xxx_isr
1735  *
1736  * Description:
1737  *   SCSI controller interrupt handler.
1738  *
1739  *   NOTE: Since we declared this using SA_INTERRUPT, interrupts should
1740  *         be disabled all through this function unless we say otherwise.
1741  *-F*************************************************************************/
1742 static void
1743 aic7xxx_isr(int irq, void *dev_id, struct pt_regs * regs)
     /*  */
1744 {
1745   int base, intstat;
1746   struct aic7xxx_host *p;
1747   struct aic7xxx_scb *scb;
1748   unsigned char ha_flags;
1749   short         transfer;
1750   unsigned char scsi_id, bus_width;
1751   unsigned char offset, rate, scratch, scratch_offset;
1752   unsigned char max_offset, rej_byte;
1753   unsigned short target_mask;
1754   char channel;
1755   void *addr;
1756   int actual;
1757   int scb_index;
1758   Scsi_Cmnd *cmd;
1759 
1760   p = (struct aic7xxx_host *) aic7xxx_boards[irq]->hostdata;
1761 
1762   /*
1763    * Search for the host with a pending interrupt.  If we can't find
1764    * one, then we've encountered a spurious interrupt.
1765    */
1766   while ((p != NULL) && !(inb(INTSTAT + p->base) & INT_PEND))
1767   {
1768     if (p->next == NULL)
1769     {
1770       p = NULL;
1771     }
1772     else
1773     {
1774       p = (struct aic7xxx_host *) p->next->hostdata;
1775     }
1776   }
1777 
1778   if (p == NULL)
1779   {
1780     if (aic7xxx_spurious_count == 1)
1781     {
1782       aic7xxx_spurious_count = 2;
1783       printk("aic7xxx: (aic7xxx_isr) Encountered spurious interrupt.\n");
1784       return;
1785     }
1786     else
1787     {
1788       /*
1789        * The best we can do is to set p back to head of list and process
1790        * the erroneous interrupt - most likely a BRKADRINT.
1791        */
1792       p = (struct aic7xxx_host *) aic7xxx_boards[irq]->hostdata;
1793     }
1794   }
1795 
1796   /*
1797    * Keep track of interrupts for /proc/scsi
1798    */
1799   p->isr_count++;
1800 
1801   if (!p->a_scanned && (p->isr_count == 1))
1802   {
1803     /*
1804      * We must only have one card at this IRQ and it must have been
1805      * added to the board data before the spurious interrupt occurred.
1806      * It is sufficient that we check isr_count and not the spurious
1807      * interrupt count.
1808      */
1809     printk("aic7xxx: (aic7xxx_isr) Encountered spurious interrupt.\n");
1810     return;
1811   }
1812 
1813   base = p->base;
1814   /*
1815    * Handle all the interrupt sources - especially for SCSI
1816    * interrupts, we won't get a second chance at them.
1817    */
1818   intstat = inb(INTSTAT + base);
1819 
1820   if (intstat & BRKADRINT)
1821   {
1822     int i;
1823     unsigned char errno = inb(ERROR + base);
1824 
1825     printk("aic7xxx: (aic7xxx_isr) BRKADRINT error(0x%x):\n", errno);
1826     for (i = 0; i < NUMBER(hard_error); i++)
1827     {
1828       if (errno & hard_error[i].errno)
1829       {
1830         printk("  %s\n", hard_error[i].errmesg);
1831       }
1832     }
1833     panic("aic7xxx: (aic7xxx_isr) BRKADRINT, error(0x%x) seqaddr(0x%x).\n",
1834           inb(ERROR + base), (inb(SEQADDR1 + base) << 8) | inb(SEQADDR0 + base));
1835   }
1836 
1837   if (intstat & SEQINT)
1838   {
1839     /*
1840      * Although the sequencer is paused immediately on
1841      * a SEQINT, an interrupt for a SCSIINT condition will
1842      * unpaused the sequencer before this point.
1843      */
1844     PAUSE_SEQUENCER(p);
1845 
1846     scsi_id = (inb(SCSIID + base) >> 4) & 0x0F;
1847     scratch_offset = scsi_id;
1848     channel = 'A';
1849     if (inb(SBLKCTL + base) & SELBUSB)
1850     {
1851       channel = 'B';
1852       scratch_offset += 8;
1853     }
1854     target_mask = (0x01 << scratch_offset);
1855 
1856     switch (intstat & SEQINT_MASK)
1857     {
1858       case BAD_PHASE:
1859         panic("aic7xxx: (aic7xxx_isr) Unknown scsi bus phase.\n");
1860         break;
1861 
1862       case SEND_REJECT:
1863         rej_byte = inb(REJBYTE + base);
1864         if ((rej_byte & 0xF0) == 0x20)
1865         {
1866           scb_index = inb(SCBPTR + base);
1867           scb = &(p->scb_array[scb_index]);
1868           printk("aic7xxx: Warning - Tagged message received without identify."
1869                  "Disabling tagged commands for target %d channel %c.\n",
1870                   scsi_id, channel);
1871           scb->cmd->device->tagged_supported = 0;
1872           scb->cmd->device->tagged_queue = 0;
1873         }
1874         else
1875         {
1876           debug("aic7xxx: Warning - Rejecting unknown message (0x%x) received "
1877                 "from target %d channel %c.\n", rej_byte, scsi_id, channel);
1878         }
1879         break;
1880 
1881       case NO_IDENT:
1882         panic("aic7xxx: Target %d, channel %c, did not send an IDENTIFY "
1883               "message. SAVED_TCL(0x%x).\n",
1884               scsi_id, channel, inb(SAVED_TCL + base));
1885         break;
1886 
1887       case NO_MATCH:
1888         printk("aic7xxx: No active SCB for reconnecting target %d, "
1889               "channel %c - Issuing ABORT. SAVED_TCL(0x%x).\n",
1890               scsi_id, channel, inb(SAVED_TCL + base));
1891         aic7xxx_unbusy_target(scsi_id, channel, base);
1892         outb(0, SCBARRAY + base);
1893         outb(CLRSELTIMEO, CLRSINT1 + base);
1894         RESTART_SEQUENCER(p);
1895         break;
1896 
1897       case SDTR_MSG:
1898         /*
1899          * Help the sequencer to translate the negotiated
1900          * transfer rate. Transfer is 1/4 the period
1901          * in ns as is returned by the sync negotiation
1902          * message. So, we must multiply by four.
1903          */
1904         transfer = (inb(ARG_1 + base) << 2);
1905         offset = inb(ACCUM + base);
1906         scratch = inb(TARG_SCRATCH + base + scratch_offset);
1907         /*
1908          * The maximum offset for a wide device is 0x08; for a
1909          * 8-bit bus device the maximum offset is 0x0F.
1910          */
1911         if (scratch & WIDEXFER)
1912         {
1913           max_offset = 0x08;
1914         }
1915         else
1916         {
1917           max_offset = 0x0F;
1918         }
1919         aic7xxx_scsirate(p, &rate, transfer, MIN(offset, max_offset),
1920                          scsi_id, channel);
1921         /*
1922          * Preserve the wide transfer flag.
1923          */
1924         scratch = rate | (scratch & WIDEXFER);
1925         outb(scratch, TARG_SCRATCH + base + scratch_offset);
1926         outb(scratch, SCSIRATE + base);
1927         if ((scratch & 0x0F) == 0)
1928         { /*
1929            * The requested rate was so low that asynchronous transfers
1930            * are faster (not to mention the controller won't support
1931            * them), so we issue a reject to ensure we go to asynchronous
1932            * transfers.
1933            */
1934            outb(SEND_REJ, RETURN_1 + base);
1935         }
1936         else
1937         {
1938           /*
1939            * See if we initiated Sync Negotiation
1940            */
1941           if (p->sdtr_pending & target_mask)
1942           {
1943             /*
1944              * Don't send an SDTR back to the target.
1945              */
1946             outb(0, RETURN_1 + base);
1947           }
1948           else
1949           {
1950             /*
1951              * Send our own SDTR in reply.
1952              */
1953             printk("aic7xxx: Sending SDTR!!\n");
1954             outb(SEND_SDTR, RETURN_1 + base);
1955           }
1956         }
1957         /*
1958          * Clear the flags.
1959          */
1960         p->needsdtr &= ~target_mask;
1961         p->sdtr_pending &= ~target_mask;
1962         break;
1963 
1964       case WDTR_MSG:
1965       {
1966         bus_width = inb(ARG_1 + base);
1967         printk("aic7xxx: Received MSG_WDTR, Target %d, channel %c "
1968                "needwdtr(0x%x).\n", scsi_id, channel, p->needwdtr);
1969         scratch = inb(TARG_SCRATCH + base + scratch_offset);
1970 
1971         if (p->wdtr_pending & target_mask)
1972         {
1973           /*
1974            * Don't send an WDTR back to the target, since we asked first.
1975            */
1976           outb(0, RETURN_1 + base);
1977           switch (bus_width)
1978           {
1979             case BUS_8_BIT:
1980               scratch &= 0x7F;
1981               break;
1982 
1983             case BUS_16_BIT:
1984               printk("aic7xxx: Target %d, channel %c, using 16 bit "
1985                      "transfers.\n", scsi_id, channel);
1986               scratch |= 0x80;
1987               break;
1988 
1989             case BUS_32_BIT:
1990               outb(SEND_REJ, RETURN_1 + base);
1991               printk("aic7xxx: Target %d, channel %c, requesting 32 bit "
1992                      "transfers, rejecting...\n", scsi_id, channel);
1993               break;
1994           }
1995         }
1996         else
1997         {
1998           /*
1999            * Send our own WDTR in reply.
2000            */
2001           printk("aic7xxx: Will send WDTR!!\n");
2002           switch (bus_width)
2003           {
2004             case BUS_8_BIT:
2005               scratch &= 0x7F;
2006               break;
2007 
2008             case BUS_32_BIT:
2009               /*
2010                * Negotiate 16 bits.
2011                */
2012               bus_width = BUS_16_BIT;
2013               /* Yes, we mean to fall thru here. */
2014 
2015             case BUS_16_BIT:
2016               printk("aic7xxx: Target %d, channel %c, using 16 bit "
2017                      "transfers.\n", scsi_id, channel);
2018               scratch |= 0x80;
2019               break;
2020           }
2021           outb(bus_width | SEND_WDTR, RETURN_1 + base);
2022         }
2023         p->needwdtr &= ~target_mask;
2024         p->wdtr_pending &= ~target_mask;
2025         outb(scratch, TARG_SCRATCH + base + scratch_offset);
2026         outb(scratch, SCSIRATE + base);
2027         break;
2028       }
2029 
2030       case REJECT_MSG:
2031       {
2032         /*
2033          * What we care about here is if we had an
2034          * outstanding SDTR or WDTR message for this
2035          * target. If we did, this is a signal that
2036          * the target is refusing negotiation.
2037          */
2038 
2039         scratch = inb(TARG_SCRATCH + base + scratch_offset);
2040 
2041         if (p->wdtr_pending & target_mask)
2042         {
2043           /*
2044            * note 8bit xfers and clear flag
2045            */
2046           scratch &= 0x7F;
2047           p->needwdtr &= ~target_mask;
2048           p->wdtr_pending &= ~target_mask;
2049           printk("aic7xxx: Target %d, channel %c, refusing WIDE negotiation. "
2050                  "Using 8 bit transfers.\n", scsi_id, channel);
2051         }
2052         else
2053         {
2054           if (p->sdtr_pending & target_mask)
2055           {
2056             /*
2057              * note asynch xfers and clear flag
2058              */
2059             scratch &= 0xF0;
2060             p->needsdtr &= ~target_mask;
2061             p->sdtr_pending &= ~target_mask;
2062             printk("aic7xxx: Target %d, channel %c, refusing synchronous "
2063                    "negotiation. Using asynchronous transfers.\n",
2064                    scsi_id, channel);
2065           }
2066           /*
2067            * Otherwise, we ignore it.
2068            */
2069         }
2070         outb(scratch, TARG_SCRATCH + base + scratch_offset);
2071         outb(scratch, SCSIRATE + base);
2072         break;
2073       }
2074 
2075       case BAD_STATUS:
2076         scb_index = inb(SCBPTR + base);
2077         scb = &(p->scb_array[scb_index]);
2078         outb(0, RETURN_1 + base);   /* CHECK_CONDITION may change this */
2079         if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2080         {
2081           printk("aic7xxx: Referenced SCB not valid during SEQINT(0x%x) "
2082                  "scb(%d) state(0x%x) cmd(0x%x).\n",
2083                  intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2084         }
2085         else
2086         {
2087           cmd = scb->cmd;
2088           aic7xxx_getscb(p, scb);
2089           aic7xxx_status(cmd) = scb->target_status;
2090 
2091           cmd->result |= scb->target_status;
2092 
2093           switch (status_byte(scb->target_status))
2094           {
2095             case GOOD:
2096               printk("aic7xxx: Interrupted for status of GOOD???\n");
2097               break;
2098 
2099             case CHECK_CONDITION:
2100               if ((aic7xxx_error(cmd) == 0) && !(cmd->flags & WAS_SENSE))
2101               {
2102                 unsigned char tcl;
2103                 unsigned char control;
2104                 void         *req_buf;
2105 
2106                 tcl = scb->target_channel_lun;
2107 
2108                 /*
2109                  * Send a sense command to the requesting target.
2110                  */
2111                 cmd->flags |= WAS_SENSE;
2112                 memcpy((void *) scb->sense_cmd, (void *) generic_sense,
2113                        sizeof(generic_sense));
2114 
2115                 scb->sense_cmd[1] = (cmd->lun << 5);
2116                 scb->sense_cmd[4] = sizeof(cmd->sense_buffer);
2117 
2118                 scb->sense_sg.address = (char *) &cmd->sense_buffer;
2119                 scb->sense_sg.length = sizeof(cmd->sense_buffer);
2120                 req_buf = &scb->sense_sg;
2121                 cmd->cmd_len = COMMAND_SIZE(cmd->cmnd[0]);
2122                 control = scb->control;
2123 
2124                 memset(scb, 0, SCB_PIO_TRANSFER_SIZE);
2125                 scb->control = control & DISCENB;
2126                 scb->target_channel_lun = tcl;
2127                 addr = scb->sense_cmd;
2128                 scb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]);
2129                 memcpy(scb->SCSI_cmd_pointer, &addr,
2130                        sizeof(scb->SCSI_cmd_pointer));
2131                 scb->SG_segment_count = 1;
2132                 memcpy(scb->SG_list_pointer, &req_buf,
2133                         sizeof(scb->SG_list_pointer));
2134                 scb->data_count = scb->sense_sg.length;
2135                 memcpy(scb->data_pointer, &(scb->sense_sg.address), 4);
2136 
2137                 aic7xxx_putscb(p, scb);
2138                 outb(SCB_LIST_NULL, SCB_NEXT_WAITING + base);
2139                 /*
2140                  * Ensure that the target is "BUSY" so we don't get overlapping
2141                  * commands if we happen to be doing tagged I/O.
2142                  */
2143                 aic7xxx_busy_target(scsi_id, channel, base);
2144 
2145                 aic7xxx_add_waiting_scb(base, scb);
2146                 outb(SEND_SENSE, RETURN_1 + base);
2147               }  /* first time sense, no errors */
2148               else
2149               {
2150                 cmd->flags &= ~ASKED_FOR_SENSE;
2151                 if (aic7xxx_error(cmd) == 0)
2152                 {
2153                   aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2154                 }
2155               }
2156               break;
2157 
2158             case BUSY:
2159               printk("aic7xxx: Target busy.\n");
2160               if (!aic7xxx_error(cmd))
2161               {
2162                 aic7xxx_error(cmd) = DID_BUS_BUSY;
2163               }
2164               break;
2165 
2166             case QUEUE_FULL:
2167               printk("aic7xxx: Queue full.\n");
2168               if (!aic7xxx_error(cmd))
2169               {
2170                 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2171               }
2172               break;
2173 
2174             default:
2175               printk("aic7xxx: Unexpected target status(0x%x).\n",
2176                      scb->target_status);
2177               if (!aic7xxx_error(cmd))
2178               {
2179                 aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2180               }
2181               break;
2182           }  /* end switch */
2183         }  /* end else of */
2184         break;
2185 
2186       case RESIDUAL:
2187         scb_index = inb(SCBPTR + base);
2188         scb = &(p->scb_array[scb_index]);
2189         if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2190         {
2191           printk("aic7xxx: Referenced SCB not valid during SEQINT(0x%x) "
2192                  "scb(%d) state(0x%x) cmd(0x%x).\n",
2193                  intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2194         }
2195         else
2196         {
2197           cmd = scb->cmd;
2198           /*
2199            *  Don't destroy valid residual information with
2200            *  residual coming from a check sense operation.
2201            */
2202           if (!(cmd->flags & WAS_SENSE))
2203           {
2204             /*
2205              *  We had an underflow. At this time, there's only
2206              *  one other driver that bothers to check for this,
2207              *  and cmd->underflow seems to be set rather half-
2208              *  heartedly in the higher-level SCSI code.
2209              */
2210             actual = aic7xxx_length(cmd, scb->residual_SG_segment_count);
2211 
2212             actual -= (inb(SCB_RESID_DCNT2 + base) << 16) |
2213                       (inb(SCB_RESID_DCNT1 + base) <<  8) |
2214                       inb(SCB_RESID_DCNT0 + base);
2215 
2216             if (actual < cmd->underflow)
2217             {
2218               printk("aic7xxx: Target %d underflow - "
2219                      "Wanted (at least) (%u) got(%u) count(%d).\n",
2220                      cmd->target, cmd->underflow, actual,
2221                      inb(SCB_RESID_SGCNT + base));
2222               aic7xxx_error(cmd) = DID_RETRY_COMMAND;
2223               aic7xxx_status(cmd) = scb->target_status;
2224             }
2225           }
2226         }
2227         break;
2228 
2229       case ABORT_TAG:
2230         scb_index = inb(SCBPTR + base);
2231         scb = &(p->scb_array[scb_index]);
2232         if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2233         {
2234           printk("aic7xxx: Referenced SCB not valid during SEQINT(0x%x) "
2235                  "scb(%d) state(0x%x) cmd(0x%x)\n",
2236                  intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2237         }
2238         else
2239         {
2240           cmd = scb->cmd;
2241           /*
2242            * We didn't receive a valid tag back from the target
2243            * on a reconnect.
2244            */
2245           printk("aic7xxx: Invalid tag received on target %d, channel %c, "
2246                  "lun %d - Sending ABORT_TAG.\n",
2247                   scsi_id, channel, cmd->lun & 0x07);
2248 
2249           cmd->result = (DID_RETRY_COMMAND << 16);
2250           aic7xxx_done(p, scb);
2251         }
2252         break;
2253 
2254       case AWAITING_MSG:
2255         scb_index = inb(SCBPTR + base);
2256         scb = &(p->scb_array[scb_index]);
2257         if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2258         {
2259           printk("aic7xxx: Referenced SCB not valid during SEQINT(0x%x) "
2260                  "scb(%d) state(0x%x) cmd(0x%x).\n",
2261                  intstat, scb_index, scb->state, (unsigned int) scb->cmd);
2262         }
2263         else
2264         {
2265           /*
2266            * This SCB had a zero length command, informing the sequencer
2267            * that we wanted to send a special message to this target.
2268            * We only do this for BUS_DEVICE_RESET messages currently.
2269            */
2270            if (scb->state & SCB_DEVICE_RESET)
2271            {
2272 #ifdef AIC7XXX_DEBUG_ABORT
2273   printk ("aic7xxx: (isr) sending bus device reset to target %d\n",
2274           scsi_id);
2275 #endif
2276              outb(MSG_BUS_DEVICE_RESET, MSG0 + base);
2277              outb(1, MSG_LEN + base);
2278            }
2279            else
2280            {
2281              panic("aic7xxx: AWAITING_SCB for an SCB that does "
2282                    "not have a waiting message.\n");
2283            }
2284         }
2285         break;
2286 
2287       case IMMEDDONE:
2288         scb_index = inb(SCBPTR + base);
2289         scb = &(p->scb_array[scb_index]);
2290 #ifdef AIC7XXX_DEBUG_ABORT
2291   printk ("aic7xxx: (isr) received IMMEDDONE for target %d, scb %d, state %d\n",
2292           scsi_id, scb_index, scb->state);
2293 #endif
2294         if (scb->state & SCB_DEVICE_RESET)
2295         {
2296           int found;
2297 
2298           /*
2299            * Go back to async/narrow transfers and renegotiate.
2300            */
2301           aic7xxx_unbusy_target(scsi_id, channel, base);
2302           p->needsdtr |= (p->needsdtr_copy & target_mask);
2303           p->needwdtr |= (p->needwdtr_copy & target_mask);
2304           p->sdtr_pending &= ~target_mask;
2305           p->wdtr_pending &= ~target_mask;
2306           scratch = inb(TARG_SCRATCH + base + scratch_offset);
2307           scratch &= SXFR;
2308           outb(scratch, TARG_SCRATCH + base + scratch_offset);
2309           found = aic7xxx_reset_device(p, (int) scsi_id, channel, SCB_LIST_NULL);
2310           aic7xxx_done_aborted_scbs (p);
2311         }
2312         else
2313         {
2314           panic("aic7xxx: Immediate complete for unknown operation.\n");
2315         }
2316         break;
2317 
2318 #if AIC7XXX_NOT_YET
2319       /* XXX Fill these in later */
2320       case MESG_BUFFER_BUSY:
2321         break;
2322       case MSGIN_PHASEMIS:
2323         break;
2324 #endif
2325 
2326       default:               /* unknown */
2327         debug("aic7xxx: SEQINT, INTSTAT(0x%x) SCSISIGI(0x%x).\n",
2328               intstat, inb(SCSISIGI + base));
2329         break;
2330     }
2331 
2332     /*
2333      * Clear the sequencer interrupt and unpause the sequencer.
2334      */
2335     outb(CLRSEQINT, CLRINT + base);
2336     UNPAUSE_SEQUENCER(p);
2337   }
2338 
2339   if (intstat & SCSIINT)
2340   {
2341     int status = inb(SSTAT1 + base);
2342     scsi_id = (inb(SCSIID + base) >> 4) & 0x0F;
2343     channel = 'A';
2344     if (inb(SBLKCTL + base) & SELBUSB)
2345     {
2346       channel = 'B';
2347     }
2348 
2349     scb_index = inb(SCBPTR + base);
2350     scb = &(p->scb_array[scb_index]);
2351     if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2352     {
2353       printk("aic7xxx: No command for SCB (SCSIINT).\n");
2354       /*
2355        * Turn off the interrupt and set status to zero, so that it
2356        * falls through the rest of the SCSIINT code.
2357        */
2358       outb(status, CLRSINT1 + base);
2359       UNPAUSE_SEQUENCER(p);
2360       outb(CLRSCSIINT, CLRINT + base);
2361       scb = NULL;
2362     }
2363     else if (status & SCSIRSTI)
2364     {
2365       PAUSE_SEQUENCER(p);
2366       printk ("aic7xxx: Someone reset channel %c (SCSIINT).\n", channel);
2367       /*
2368        * Go through and abort all commands for the channel, but do not
2369        * reset the channel again.
2370        */
2371       aic7xxx_reset_channel (p, channel, SCB_LIST_NULL, FALSE);
2372     }
2373     else if (status & SCSIPERR)
2374     {
2375       char  *phase;
2376       unsigned char mesg_out = MSG_NOP;
2377       unsigned char lastphase = inb(LASTPHASE + base);
2378 
2379       cmd = scb->cmd;
2380       switch (lastphase)
2381       {
2382         case P_DATAOUT:
2383           phase = "Data-Out";
2384           break;
2385         case P_DATAIN:
2386           phase = "Data-In";
2387           mesg_out = MSG_INITIATOR_DET_ERROR;
2388           break;
2389         case P_COMMAND:
2390           phase = "Command";
2391           break;
2392         case P_MESGOUT:
2393           phase = "Message-Out";
2394           break;
2395         case P_STATUS:
2396           phase = "Status";
2397           mesg_out = MSG_INITIATOR_DET_ERROR;
2398           break;
2399         case P_MESGIN:
2400           phase = "Message-In";
2401           mesg_out = MSG_MSG_PARITY_ERROR;
2402           break;
2403         default:
2404           phase = "unknown";
2405           break;
2406       }
2407 
2408       /*
2409        * A parity error has occurred during a data
2410        * transfer phase. Flag it and continue.
2411        */
2412       printk("aic7xxx: Parity error during phase %s on target %d, "
2413              "channel %d, lun %d.\n", phase,
2414              cmd->target, cmd->channel & 0x01, cmd->lun & 0x07);
2415 
2416       /*
2417        * We've set the hardware to assert ATN if we get a parity
2418        * error on "in" phases, so all we need to do is stuff the
2419        * message buffer with the appropriate message. In phases
2420        * have set mesg_out to something other than MSG_NOP.
2421        */
2422       if (mesg_out != MSG_NOP)
2423       {
2424          outb(mesg_out, MSG0 + base);
2425          outb(1, MSG_LEN + base);
2426          cmd->result = DID_PARITY << 16;
2427       }
2428       else
2429       {
2430          /*
2431           * Should we allow the target to make this decision for us?
2432           */
2433          cmd->result = DID_RETRY_COMMAND << 16;
2434       }
2435       aic7xxx_done(p, scb);
2436     }
2437     else if (status & SELTO)
2438     {
2439       unsigned char waiting;
2440 
2441       cmd = scb->cmd;
2442 
2443      /*
2444        * Hardware selection timer has expired. Turn
2445        * off SCSI selection sequence.
2446        */
2447       outb(ENRSELI, SCSISEQ + base);
2448       cmd->result = (DID_TIME_OUT << 16);
2449       /*
2450        * Clear an pending messages for the timed out
2451        * target and mark the target as free.
2452        */
2453       ha_flags = inb(FLAGS + base);
2454       outb(0, MSG_LEN + base);
2455       aic7xxx_unbusy_target(scsi_id, channel, base);
2456 
2457       outb(0, SCBARRAY + base);
2458 
2459       /*
2460        * Shut off the offending interrupt sources, reset
2461        * the sequencer address to zero and unpause it,
2462        * then call the high-level SCSI completion routine.
2463        *
2464        * WARNING!  This is a magic sequence!  After many
2465        * hours of guesswork, turning off the SCSI interrupts
2466        * in CLRSINT? does NOT clear the SCSIINT bit in
2467        * INTSTAT. By writing to the (undocumented, unused
2468        * according to the AIC-7770 manual) third bit of
2469        * CLRINT, you can clear INTSTAT. But, if you do it
2470        * while the sequencer is paused, you get a BRKADRINT
2471        * with an Illegal Host Address status, so the
2472        * sequencer has to be restarted first.
2473        */
2474       outb(CLRSELTIMEO, CLRSINT1 + base);
2475 
2476       outb(CLRSCSIINT, CLRINT + base);
2477 
2478       /*
2479        * Shift the waiting for selection queue forward
2480        */
2481       waiting = inb(WAITING_SCBH + base);
2482       outb(waiting, SCBPTR + base);
2483       waiting = inb(SCB_NEXT_WAITING + base);
2484       outb(waiting, WAITING_SCBH + base);
2485 
2486       RESTART_SEQUENCER(p);
2487       aic7xxx_done(p, scb);
2488 #if 0
2489 printk("aic7xxx: SELTO SCB(%d) state(0x%x) cmd(0x%x).\n",
2490        scb->position, scb->state, (unsigned int) scb->cmd);
2491 #endif
2492     }
2493     else if (!(status & BUSFREE))
2494     {
2495       /*
2496        * We don't know what's going on. Turn off the
2497        * interrupt source and try to continue.
2498        */
2499       printk("aic7xxx: SSTAT1(0x%x).\n", status);
2500       outb(status, CLRSINT1 + base);
2501       UNPAUSE_SEQUENCER(p);
2502       outb(CLRSCSIINT, CLRINT + base);
2503     }
2504   }
2505 
2506   if (intstat & CMDCMPLT)
2507   {
2508     int complete;
2509 
2510     /*
2511      * The sequencer will continue running when it
2512      * issues this interrupt. There may be >1 commands
2513      * finished, so loop until we've processed them all.
2514      */
2515     do {
2516       complete = inb(QOUTFIFO + base);
2517 
2518       scb = &(p->scb_array[complete]);
2519       if (!(scb->state & SCB_ACTIVE) || (scb->cmd == NULL))
2520       {
2521         printk("aic7xxx: Warning - No command for SCB %d (CMDCMPLT).\n"
2522                "         QOUTCNT(%d) QINCNT(%d) SCB state(0x%x) cmd(0x%x) "
2523                "pos(%d).\n",
2524                complete, inb(QOUTCNT + base), inb(QINCNT + base),
2525                scb->state, (unsigned int) scb->cmd, scb->position);
2526         outb(CLRCMDINT, CLRINT + base);
2527         continue;
2528       }
2529       cmd = scb->cmd;
2530       cmd->result |= (aic7xxx_error(cmd) << 16);
2531       if ((cmd->flags & WAS_SENSE) && !(cmd->flags & ASKED_FOR_SENSE))
2532       {
2533         /*
2534          * Got sense information.
2535          */
2536         cmd->flags &= ASKED_FOR_SENSE;
2537       }
2538 #if 0
2539       printk("aic7xxx: (complete) State(%d) cmd(0x%x) free(0x%x).\n",
2540              scb->state, (unsigned int) scb->cmd, (unsigned int) p->free_scb);
2541 #endif
2542 
2543       /*
2544        * Clear interrupt status before checking
2545        * the output queue again. This eliminates
2546        * a race condition whereby a command could
2547        * complete between the queue poll and the
2548        * interrupt clearing, so notification of the
2549        * command being complete never made it back
2550        * up to the kernel.
2551        */
2552       outb(CLRCMDINT, CLRINT + base);
2553       aic7xxx_done(p, scb);
2554 #if 0
2555   if (scb != &p->scb_array[scb->position])
2556   {
2557     printk("aic7xxx: (complete) Address mismatch, pos(%d).\n", scb->position);
2558   }
2559   printk("aic7xxx: (complete) State(%d) cmd(0x%x) free(0x%x).\n",
2560          scb->state, (unsigned int) scb->cmd, (unsigned int) p->free_scb);
2561 #endif
2562 
2563 #ifdef AIC7XXX_PROC_STATS
2564       /*
2565        * XXX: we should actually know how much actually transferred
2566        * XXX: for each command, but apparently that's too difficult.
2567        */
2568       actual = aic7xxx_length(cmd, 0);
2569       if (!(cmd->flags & WAS_SENSE) && (actual > 0))
2570       {
2571         struct aic7xxx_xferstats *sp;
2572         long *ptr;
2573         int x;
2574 
2575         sp = &p->stats[cmd->channel & 0x01][cmd->target & 0x0F][cmd->lun & 0x07];
2576         sp->xfers++;
2577 
2578         if (cmd->request.cmd == WRITE)
2579         {
2580           sp->w_total++;
2581           sp->w_total512 += (actual >> 9);
2582           ptr = sp->w_bins;
2583         }
2584         else
2585         {
2586           sp->r_total++;
2587           sp->r_total512 += (actual >> 9);
2588           ptr = sp->r_bins;
2589         }
2590         for (x = 9; x <= 17; x++)
2591         {
2592           if (actual < (1 << x))
2593           {
2594             ptr[x - 9]++;
2595             break;
2596           }
2597         }
2598         if (x > 17)
2599         {
2600           ptr[x - 9]++;
2601         }
2602       }
2603 #endif /* AIC7XXX_PROC_STATS */
2604 
2605     } while (inb(QOUTCNT + base) & p->qcntmask);
2606   }
2607 }
2608 
2609 /*+F*************************************************************************
2610  * Function:
2611  *   aic7xxx_probe
2612  *
2613  * Description:
2614  *   Probing for EISA boards: it looks like the first two bytes
2615  *   are a manufacturer code - three characters, five bits each:
2616  *
2617  *               BYTE 0   BYTE 1   BYTE 2   BYTE 3
2618  *              ?1111122 22233333 PPPPPPPP RRRRRRRR
2619  *
2620  *   The characters are baselined off ASCII '@', so add that value
2621  *   to each to get the real ASCII code for it. The next two bytes
2622  *   appear to be a product and revision number, probably vendor-
2623  *   specific. This is what is being searched for at each port,
2624  *   and what should probably correspond to the ID= field in the
2625  *   ECU's .cfg file for the card - if your card is not detected,
2626  *   make sure your signature is listed in the array.
2627  *
2628  *   The fourth byte's lowest bit seems to be an enabled/disabled
2629  *   flag (rest of the bits are reserved?).
2630  *-F*************************************************************************/
2631 static aha_type
2632 aic7xxx_probe(int slot, int base, aha_status_type *bios)
     /*  */
2633 {
2634   int i;
2635   unsigned char buf[4];
2636 
2637   static struct {
2638     int n;
2639     unsigned char signature[sizeof(buf)];
2640     aha_type type;
2641     int bios_disabled;
2642   } AIC7xxx[] = {
2643     { 4, { 0x04, 0x90, 0x77, 0x71 }, AIC_7771, FALSE }, /* host adapter 274x */
2644     { 4, { 0x04, 0x90, 0x77, 0x70 }, AIC_7770, FALSE }, /* motherboard 7770  */
2645     { 4, { 0x04, 0x90, 0x77, 0x56 }, AIC_284x, FALSE }, /* 284x BIOS enabled */
2646     { 4, { 0x04, 0x90, 0x77, 0x57 }, AIC_284x, TRUE }   /* 284x BIOS disabled */
2647   };
2648 
2649   /*
2650    * The VL-bus cards need to be primed by
2651    * writing before a signature check.
2652    */
2653   for (i = 0; i < sizeof(buf); i++)
2654   {
2655     outb(0x80 + i, base);
2656     buf[i] = inb(base + i);
2657   }
2658 
2659   for (i = 0; i < NUMBER(AIC7xxx); i++)
2660   {
2661     /*
2662      * Signature match on enabled card?
2663      */
2664     if (!memcmp(buf, AIC7xxx[i].signature, AIC7xxx[i].n))
2665     {
2666       if (inb(base + 4) & 1)
2667       {
2668         if (AIC7xxx[i].bios_disabled)
2669         {
2670           *bios = AIC_DISABLED;
2671         }
2672         else
2673         {
2674           *bios = AIC_ENABLED;
2675         }
2676         return (AIC7xxx[i].type);
2677       }
2678 
2679       printk("aic7xxx: Disabled at slot %d, ignored.\n", slot);
2680     }
2681   }
2682 
2683   return (AIC_NONE);
2684 }
2685 
2686 /*+F*************************************************************************
2687  * Function:
2688  *   read_2840_seeprom
2689  *
2690  * Description:
2691  *   Reads the 2840 serial EEPROM and returns 1 if successful and 0 if
2692  *   not successful.
2693  *
2694  *   See read_seeprom (for the 2940) for the instruction set of the 93C46
2695  *   chip.
2696  *
2697  *   The 2840 interface to the 93C46 serial EEPROM is through the
2698  *   STATUS_2840 and SEECTL_2840 registers.  The CS_2840, CK_2840, and
2699  *   DO_2840 bits of the SEECTL_2840 register are connected to the chip
2700  *   select, clock, and data out lines respectively of the serial EEPROM.
2701  *   The DI_2840 bit of the STATUS_2840 is connected to the data in line
2702  *   of the serial EEPROM.  The EEPROM_TF bit of STATUS_2840 register is
2703  *   useful in that it gives us an 800 nsec timer.  After a read from the
2704  *   SEECTL_2840 register the timing flag is cleared and goes high 800 nsec
2705  *   later.
2706  *
2707  *-F*************************************************************************/
2708 static int
2709 read_2840_seeprom(int base, struct seeprom_config *sc)
     /*  */
2710 {
2711   int i = 0, k = 0;
2712   unsigned char temp;
2713   unsigned short checksum = 0;
2714   unsigned short *seeprom = (unsigned short *) sc;
2715   struct seeprom_cmd {
2716     unsigned char len;
2717     unsigned char bits[3];
2718   };
2719   struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
2720 
2721 #define CLOCK_PULSE(p) \
2722   while ((inb(STATUS_2840 + base) & EEPROM_TF) == 0)    \
2723   {                                             \
2724     ;  /* Do nothing */                         \
2725   }                                             \
2726   (void) inb(SEECTL_2840 + base);
2727 
2728   /*
2729    * Read the first 32 registers of the seeprom.  For the 2840,
2730    * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers
2731    * but only the first 32 are used by Adaptec BIOS.  The loop
2732    * will range from 0 to 31.
2733    */
2734   for (k = 0; k < (sizeof(*sc) / 2); k++)
2735   {
2736     /*
2737      * Send chip select for one clock cycle.
2738      */
2739     outb(CK_2840 | CS_2840, SEECTL_2840 + base);
2740     CLOCK_PULSE(base);
2741 
2742     /*
2743      * Now we're ready to send the read command followed by the
2744      * address of the 16-bit register we want to read.
2745      */
2746     for (i = 0; i < seeprom_read.len; i++)
2747     {
2748       temp = CS_2840 | seeprom_read.bits[i];
2749       outb(temp, SEECTL_2840 + base);
2750       CLOCK_PULSE(base);
2751       temp = temp ^ CK_2840;
2752       outb(temp, SEECTL_2840 + base);
2753       CLOCK_PULSE(base);
2754     }
2755     /*
2756      * Send the 6 bit address (MSB first, LSB last).
2757      */
2758     for (i = 5; i >= 0; i--)
2759     {
2760       temp = k;
2761       temp = (temp >> i) & 1;  /* Mask out all but lower bit. */
2762       temp = CS_2840 | temp;
2763       outb(temp, SEECTL_2840 + base);
2764       CLOCK_PULSE(base);
2765       temp = temp ^ CK_2840;
2766       outb(temp, SEECTL_2840 + base);
2767       CLOCK_PULSE(base);
2768     }
2769 
2770     /*
2771      * Now read the 16 bit register.  An initial 0 precedes the
2772      * register contents which begins with bit 15 (MSB) and ends
2773      * with bit 0 (LSB).  The initial 0 will be shifted off the
2774      * top of our word as we let the loop run from 0 to 16.
2775      */
2776     for (i = 0; i <= 16; i++)
2777     {
2778       temp = CS_2840;
2779       outb(temp, SEECTL_2840 + base);
2780       CLOCK_PULSE(base);
2781       temp = temp ^ CK_2840;
2782       seeprom[k] = (seeprom[k] << 1) | (inb(STATUS_2840 + base) & DI_2840);
2783       outb(temp, SEECTL_2840 + base);
2784       CLOCK_PULSE(base);
2785     }
2786     /*
2787      * The serial EEPROM has a checksum in the last word.  Keep a
2788      * running checksum for all words read except for the last
2789      * word.  We'll verify the checksum after all words have been
2790      * read.
2791      */
2792     if (k < (sizeof(*sc) / 2) - 1)
2793     {
2794       checksum = checksum + seeprom[k];
2795     }
2796 
2797     /*
2798      * Reset the chip select for the next command cycle.
2799      */
2800     outb(0, SEECTL_2840 + base);
2801     CLOCK_PULSE(base);
2802     outb(CK_2840, SEECTL_2840 + base);
2803     CLOCK_PULSE(base);
2804     outb(0, SEECTL_2840 + base);
2805     CLOCK_PULSE(base);
2806   }
2807 
2808 #if 0
2809   printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum);
2810   printk("Serial EEPROM:");
2811   for (k = 0; k < (sizeof(*sc) / 2); k++)
2812   {
2813     if (((k % 8) == 0) && (k != 0))
2814     {
2815       printk("\n              ");
2816     }
2817     printk(" 0x%x", seeprom[k]);
2818   }
2819   printk("\n");
2820 #endif
2821 
2822   if (checksum != sc->checksum)
2823   {
2824     printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n");
2825     return (0);
2826   }
2827 
2828   return (1);
2829 #undef CLOCK_PULSE
2830 }
2831 
2832 /*+F*************************************************************************
2833  * Function:
2834  *   read_seeprom
2835  *
2836  * Description:
2837  *   Reads the serial EEPROM and returns 1 if successful and 0 if
2838  *   not successful.
2839  *
2840  *   The instruction set of the 93C46 chip is as follows:
2841  *
2842  *               Start  OP
2843  *     Function   Bit  Code  Address    Data     Description
2844  *     -------------------------------------------------------------------
2845  *     READ        1    10   A5 - A0             Reads data stored in memory,
2846  *                                               starting at specified address
2847  *     EWEN        1    00   11XXXX              Write enable must precede
2848  *                                               all programming modes
2849  *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
2850  *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
2851  *     ERAL        1    00   10XXXX              Erase all registers
2852  *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
2853  *     EWDS        1    00   00XXXX              Disables all programming
2854  *                                               instructions
2855  *     *Note: A value of X for address is a don't care condition.
2856  *
2857  *   The 93C46 has a four wire interface: clock, chip select, data in, and
2858  *   data out.  In order to perform one of the above functions, you need
2859  *   to enable the chip select for a clock period (typically a minimum of
2860  *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
2861  *   respectively.  While the chip select remains high, you can clock in
2862  *   the instructions (above) starting with the start bit, followed by the
2863  *   OP code, Address, and Data (if needed).  For the READ instruction, the
2864  *   requested 16-bit register contents is read from the data out line but
2865  *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
2866  *   first).  The clock cycling from low to high initiates the next data
2867  *   bit to be sent from the chip.
2868  *
2869  *   The 7870 interface to the 93C46 serial EEPROM is through the SEECTL
2870  *   register.  After successful arbitration for the memory port, the
2871  *   SEECS bit of the SEECTL register is connected to the chip select.
2872  *   The SEECK, SEEDO, and SEEDI are connected to the clock, data out,
2873  *   and data in lines respectively.  The SEERDY bit of SEECTL is useful
2874  *   in that it gives us an 800 nsec timer.  After a write to the SEECTL
2875  *   register, the SEERDY goes high 800 nsec later.  The one exception
2876  *   to this is when we first request access to the memory port.  The
2877  *   SEERDY goes high to signify that access has been granted and, for
2878  *   this case, has no implied timing.
2879  *
2880  *-F*************************************************************************/
2881 static int
2882 read_seeprom(int base, int offset, struct seeprom_config *sc)
     /*  */
2883 {
2884   int i = 0, k;
2885   unsigned long timeout;
2886   unsigned char temp;
2887   unsigned short checksum = 0;
2888   unsigned short *seeprom = (unsigned short *) sc;
2889   struct seeprom_cmd {
2890     unsigned char len;
2891     unsigned char bits[3];
2892   };
2893   struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
2894 
2895 #define CLOCK_PULSE(p) \
2896   while ((inb(SEECTL + base) & SEERDY) == 0)    \
2897   {                                             \
2898     ;  /* Do nothing */                         \
2899   }
2900 
2901   /*
2902    * Request access of the memory port.  When access is
2903    * granted, SEERDY will go high.  We use a 1 second
2904    * timeout which should be near 1 second more than
2905    * is needed.  Reason: after the 7870 chip reset, there
2906    * should be no contention.
2907    */
2908   outb(SEEMS, SEECTL + base);
2909   timeout = jiffies + 100;  /* 1 second timeout */
2910   while ((jiffies < timeout) && ((inb(SEECTL + base) & SEERDY) == 0))
2911   {
2912     ; /* Do nothing!  Wait for access to be granted.  */
2913   }
2914   if ((inb(SEECTL + base) & SEERDY) == 0)
2915   {
2916     outb(0, SEECTL + base);
2917     return (0);
2918   }
2919 
2920   /*
2921    * Read the first 32 registers of the seeprom.  For the 7870,
2922    * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers
2923    * but only the first 32 are used by Adaptec BIOS.  The loop
2924    * will range from 0 to 31.
2925    */
2926   for (k = 0; k < (sizeof(*sc) / 2); k++)
2927   {
2928     /*
2929      * Send chip select for one clock cycle.
2930      */
2931     outb(SEEMS | SEECK | SEECS, SEECTL + base);
2932     CLOCK_PULSE(base);
2933 
2934     /*
2935      * Now we're ready to send the read command followed by the
2936      * address of the 16-bit register we want to read.
2937      */
2938     for (i = 0; i < seeprom_read.len; i++)
2939     {
2940       temp = SEEMS | SEECS | (seeprom_read.bits[i] << 1);
2941       outb(temp, SEECTL + base);
2942       CLOCK_PULSE(base);
2943       temp = temp ^ SEECK;
2944       outb(temp, SEECTL + base);
2945       CLOCK_PULSE(base);
2946     }
2947     /*
2948      * Send the 6 bit address (MSB first, LSB last).
2949      */
2950     for (i = 5; i >= 0; i--)
2951     {
2952       temp = k + offset;
2953       temp = (temp >> i) & 1;  /* Mask out all but lower bit. */
2954       temp = SEEMS | SEECS | (temp << 1);
2955       outb(temp, SEECTL + base);
2956       CLOCK_PULSE(base);
2957       temp = temp ^ SEECK;
2958       outb(temp, SEECTL + base);
2959       CLOCK_PULSE(base);
2960     }
2961 
2962     /*
2963      * Now read the 16 bit register.  An initial 0 precedes the
2964      * register contents which begins with bit 15 (MSB) and ends
2965      * with bit 0 (LSB).  The initial 0 will be shifted off the
2966      * top of our word as we let the loop run from 0 to 16.
2967      */
2968     for (i = 0; i <= 16; i++)
2969     {
2970       temp = SEEMS | SEECS;
2971       outb(temp, SEECTL + base);
2972       CLOCK_PULSE(base);
2973       temp = temp ^ SEECK;
2974       seeprom[k] = (seeprom[k] << 1) | (inb(SEECTL + base) & SEEDI);
2975       outb(temp, SEECTL + base);
2976       CLOCK_PULSE(base);
2977     }
2978 
2979     /*
2980      * The serial EEPROM has a checksum in the last word.  Keep a
2981      * running checksum for all words read except for the last
2982      * word.  We'll verify the checksum after all words have been
2983      * read.
2984      */
2985     if (k < (sizeof(*sc) / 2) - 1)
2986     {
2987       checksum = checksum + seeprom[k];
2988     }
2989 
2990     /*
2991      * Reset the chip select for the next command cycle.
2992      */
2993     outb(SEEMS, SEECTL + base);
2994     CLOCK_PULSE(base);
2995     outb(SEEMS | SEECK, SEECTL + base);
2996     CLOCK_PULSE(base);
2997     outb(SEEMS, SEECTL + base);
2998     CLOCK_PULSE(base);
2999   }
3000 
3001   /*
3002    * Release access to the memory port and the serial EEPROM.
3003    */
3004   outb(0, SEECTL + base);
3005 
3006 #if 0
3007   printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum);
3008   printk("Serial EEPROM:");
3009   for (k = 0; k < (sizeof(*sc) / 2); k++)
3010   {
3011     if (((k % 8) == 0) && (k != 0))
3012     {
3013       printk("\n              ");
3014     }
3015     printk(" 0x%x", seeprom[k]);
3016   }
3017   printk("\n");
3018 #endif
3019 
3020   if (checksum != sc->checksum)
3021   {
3022     return (0);
3023   }
3024 
3025   return (1);
3026 #undef CLOCK_PULSE
3027 }
3028 
3029 /*+F*************************************************************************
3030  * Function:
3031  *   detect_maxscb
3032  *
3033  * Description:
3034  *   Detects the maximum number of SCBs for the controller and returns
3035  *   the count and a mask in config (config->maxscbs, config->qcntmask).
3036  *-F*************************************************************************/
3037 static void
3038 detect_maxscb(struct aic7xxx_host_config *config)
     /*  */
3039 {
3040   unsigned char sblkctl_reg;
3041   int base, i;
3042 
3043   base = config->base;
3044   switch (config->type)
3045   {
3046     case AIC_7770:
3047     case AIC_7771:
3048     case AIC_284x:
3049       /*
3050        * Check for Rev C or E boards. Rev E boards can supposedly have
3051        * more than 4 SCBs, while the Rev C boards are limited to 4 SCBs.
3052        * Until we know how to access more than 4 SCBs for the Rev E chips,
3053        * we limit them, along with the Rev C chips, to 4 SCBs.
3054        *
3055        * The Rev E boards have a read/write autoflush bit in the
3056        * SBLKCTL register, while in the Rev C boards it is read only.
3057        */
3058       sblkctl_reg = inb(SBLKCTL + base) ^ AUTOFLUSHDIS;
3059       outb(sblkctl_reg, SBLKCTL + base);
3060       if (inb(SBLKCTL + base) == sblkctl_reg)
3061       {
3062         /*
3063          * We detected a Rev E board.
3064          */
3065         printk("aic7xxx: %s Rev E and subsequent.\n",
3066                board_names[config->type]);
3067         outb(sblkctl_reg ^ AUTOFLUSHDIS, SBLKCTL + base);
3068       }
3069       else
3070       {
3071         printk("aic7xxx: %s Rev C and previous.\n", board_names[config->type]);
3072       }
3073       break;
3074 
3075     default:
3076       break;
3077   }
3078 
3079   /*
3080    * Walk the SCBs to determine how many there are.
3081    */
3082   i = 1;
3083   outb (0, SCBPTR + base);
3084   outb (0, SCBARRAY + base);
3085 
3086   while (i < AIC7XXX_MAXSCB)
3087   {
3088     outb(i, SCBPTR + base);
3089     outb(i, SCBARRAY + base);
3090     if (inb(SCBARRAY + base) != i)
3091       break;
3092     outb(0, SCBPTR + base);
3093     if (inb(SCBARRAY + base) != 0)
3094       break;
3095 
3096     outb(i, SCBPTR + base);      /* Clear the control byte. */
3097     outb(0, SCBARRAY + base);
3098 
3099     config->qcntmask |= i;       /* Update the count mask. */
3100     i++;
3101   }
3102   outb(i, SCBPTR + base);   /* Ensure we clear the control bytes. */
3103   outb(0, SCBARRAY + base);
3104   outb(0, SCBPTR + base); 
3105   outb(0, SCBARRAY + base);
3106 
3107   config->maxscb = i;
3108   config->qcntmask |= i;
3109 
3110   printk("aic7xxx: Using %d SCB's after checking for SCB memory.\n",
3111          config->maxscb);
3112 
3113 }
3114 
3115 /*+F*************************************************************************
3116  * Function:
3117  *   aic7xxx_register
3118  *
3119  * Description:
3120  *   Register a Adaptec aic7xxx chip SCSI controller with the kernel.
3121  *-F*************************************************************************/
3122 static int
3123 aic7xxx_register(Scsi_Host_Template *template,
     /*  */
3124                  struct aic7xxx_host_config *config)
3125 {
3126   int i;
3127   unsigned char sblkctl;
3128   int max_targets;
3129   int found = 1, base;
3130   unsigned char target_settings;
3131   unsigned char scsi_conf, host_conf;
3132   int have_seeprom = FALSE;
3133   struct Scsi_Host *host;
3134   struct aic7xxx_host *p;
3135   struct seeprom_config sc;
3136 
3137   base = config->base;
3138 
3139   /*
3140    * Lock out other contenders for our i/o space.
3141    */
3142   request_region(MINREG + base, MAXREG - MINREG, "aic7xxx");
3143 
3144   switch (config->type)
3145   {
3146     case AIC_7770:
3147     case AIC_7771:
3148       /*
3149        * For some 274x boards, we must clear the CHIPRST bit
3150        * and pause the sequencer. For some reason, this makes
3151        * the driver work. For 284x boards, we give it a
3152        * CHIPRST just like the 294x boards.
3153        *
3154        * Use the BIOS settings to determine the interrupt
3155        * trigger type (level or edge) and use this value
3156        * for pausing and unpausing the sequencer.
3157        */
3158       config->unpause = (inb(HCNTRL + base) & IRQMS) | INTEN;
3159       config->pause = config->unpause | PAUSE;
3160       config->extended = aic7xxx_extended;
3161 
3162       outb(config->pause | CHIPRST, HCNTRL + base);
3163       aic7xxx_delay(1);
3164       if (inb(HCNTRL + base) & CHIPRST)
3165       {
3166         printk("aic7xxx: Chip reset not cleared; clearing manually.\n");
3167       }
3168       outb(config->pause, HCNTRL + base);
3169 
3170       /*
3171        * Just to be on the safe side with the 274x, we will re-read the irq
3172        * since there was some issue about resetting the board.
3173        */
3174       config->irq = inb(INTDEF + base) & 0x0F;
3175       if ((config->type == AIC_7771) &&
3176           (inb(HA_274_BIOSCTRL + base) & BIOSMODE) == BIOSDISABLED)
3177       {
3178         config->bios = AIC_DISABLED;
3179         config->use_defaults = TRUE;
3180       }
3181       else
3182       {
3183         host_conf = inb(HOSTCONF + base);
3184         config->bus_speed = host_conf & DFTHRSH;
3185         config->busrtime = (host_conf << 2) & BOFF;
3186       }
3187 
3188       /*
3189        * Setup the FIFO threshold and the bus off time
3190        */
3191       outb(config->bus_speed & DFTHRSH, BUSSPD + base);
3192       outb(config->busrtime, BUSTIME + base);
3193 
3194       /*
3195        * A reminder until this can be detected automatically.
3196        */
3197       printk("aic7xxx: Extended translation %sabled.\n",
3198              config->extended ? "en" : "dis");
3199       break;
3200 
3201     case AIC_284x:
3202       outb(CHIPRST, HCNTRL + base);
3203       config->unpause = UNPAUSE_284X;
3204       config->pause = REQ_PAUSE; /* DWG would like to be like the rest */
3205       aic7xxx_delay(1);
3206       outb(config->pause, HCNTRL + base);
3207 
3208       config->parity = AIC_ENABLED;
3209       config->extended = aic7xxx_extended;
3210       config->irq = inb(INTDEF + base) & 0x0F;
3211       host_conf = inb(HOSTCONF + base);
3212 
3213       printk("aic7xxx: Reading SEEPROM...");
3214       have_seeprom = read_2840_seeprom(base, &sc);
3215       if (!have_seeprom)
3216       {
3217         printk("aic7xxx: Unable to read SEEPROM.\n");
3218       }
3219       else
3220       {
3221         printk("done.\n");
3222         config->extended = ((sc.bios_control & CF284XEXTEND) >> 5);
3223         if (!(sc.bios_control & CFBIOSEN))
3224         {
3225           /*
3226            * The BIOS is disabled; the values left over in scratch
3227            * RAM are still valid.  Do not use defaults as in the
3228            * AIC-7770 case.
3229            */
3230           config->bios = AIC_DISABLED;
3231         }
3232         else
3233         {
3234           config->parity = (sc.adapter_control & CFSPARITY) ?
3235                            AIC_ENABLED : AIC_DISABLED;
3236           config->low_term = (sc.adapter_control & CF284XSTERM) ?
3237                                 AIC_ENABLED : AIC_DISABLED;
3238           /*
3239            * XXX - Adaptec *does* make 284x wide controllers, but the
3240            *       documents do not say where the high byte termination
3241            *       enable bit is located.
3242            */
3243         }
3244       }
3245 
3246       host_conf = inb(HOSTCONF + base);
3247       config->bus_speed = host_conf & DFTHRSH;
3248       config->busrtime = (host_conf << 2) & BOFF;
3249 
3250       /*
3251        * Setup the FIFO threshold and the bus off time
3252        */
3253       outb(config->bus_speed & DFTHRSH, BUSSPD + base);
3254       outb(config->busrtime, BUSTIME + base);
3255 
3256       printk("aic7xxx: Extended translation %sabled.\n",
3257              config->extended ? "en" : "dis");
3258       break;
3259 
3260     case AIC_7850:
3261     case AIC_7855:
3262     case AIC_7870:
3263     case AIC_7871:
3264     case AIC_7872:
3265     case AIC_7873:
3266     case AIC_7874:
3267     case AIC_7880:
3268     case AIC_7881:
3269     case AIC_7882:
3270     case AIC_7883:
3271     case AIC_7884:
3272       outb(CHIPRST, HCNTRL + base);
3273       config->unpause = UNPAUSE_294X;
3274       config->pause = config->unpause | PAUSE;
3275       aic7xxx_delay(1);
3276       outb(config->pause, HCNTRL + base);
3277 
3278       config->extended = aic7xxx_extended;
3279       config->scsi_id = 7;
3280       config->parity = AIC_ENABLED;
3281 
3282       printk("aic7xxx: Reading SEEPROM...");
3283       have_seeprom = read_seeprom(base, config->chan_num * (sizeof(sc) / 2), &sc);
3284       if (!have_seeprom)
3285       {
3286         printk("\naic7xxx: Unable to read SEEPROM; "
3287                "using leftover BIOS values.\n");
3288       }
3289       else
3290       {
3291         printk("done.\n");
3292         if (!(sc.bios_control & CFBIOSEN))
3293         {
3294           /*
3295            * The BIOS is disabled; the values left over in scratch
3296            * RAM are still valid.  Do not use defaults as in the
3297            * AIC-7770 case.
3298            */
3299           config->bios = AIC_DISABLED;
3300         }
3301         else
3302         {
3303           config->extended = ((sc.bios_control & CFEXTEND) >> 7);
3304           config->scsi_id = (sc.brtime_id & CFSCSIID);
3305           config->parity = (sc.adapter_control & CFSPARITY) ?
3306                              AIC_ENABLED : AIC_DISABLED;
3307           config->low_term = (sc.adapter_control & CFSTERM) ?
3308                                AIC_ENABLED : AIC_DISABLED;
3309           config->high_term = (sc.adapter_control & CFWSTERM) ?
3310                                 AIC_ENABLED : AIC_DISABLED;
3311           config->busrtime = ((sc.brtime_id & CFBRTIME) >> 8);
3312           if (((config->type == AIC_7880) || (config->type == AIC_7882) ||
3313                (config->type == AIC_7883) || (config->type == AIC_7884)) &&
3314               (sc.adapter_control & CFULTRAEN))
3315           {
3316             printk ("aic7xxx: Enabling support for Ultra SCSI speed.\n");
3317             config->ultra_enabled = TRUE;
3318           }
3319         }
3320       }
3321 
3322       /*
3323        * XXX - force data fifo threshold to 100%. Why does this
3324        *       need to be done?
3325        *
3326        * We don't know where this is set in the SEEPROM or by the BIOS,
3327        * so we default it to 100%.
3328        */
3329       config->bus_speed = DFTHRSH_100;
3330       scsi_conf = config->scsi_id | DFTHRSH_100;
3331 #if 0
3332       if (config->parity == AIC_ENABLED)
3333       {
3334         scsi_conf |= ENSPCHK;
3335       }
3336 #endif
3337       outb(scsi_conf, SCSICONF + base);
3338       outb(DFTHRSH_100, DSPCISTATUS + base);
3339 
3340       /*
3341        * In case we are a wide card...
3342        */
3343 /*
3344  * Try the following:
3345  *
3346  * 1) outb(config->scsi_id, SCSICONF + base + 1);
3347  * 2) outb(scsiconf, SCSICONF + base + 1);
3348  *
3349  */
3350       outb(config->scsi_id, SCSICONF + base + 1);
3351 
3352       printk("aic7xxx: Extended translation %sabled.\n",
3353              config->extended ? "en" : "dis");
3354       break;
3355 
3356     default:
3357       panic("aic7xxx: (aic7xxx_register) Internal error.\n");
3358   }
3359 
3360   detect_maxscb(config);
3361 
3362   if (config->chip_type == AIC_777x)
3363   {
3364     if (config->pause & IRQMS)
3365     {
3366       printk("aic7xxx: Using level sensitive interrupts.\n");
3367     }
3368     else
3369     {
3370       printk("aic7xxx: Using edge triggered interrupts.\n");
3371     }
3372   }
3373 
3374   /*
3375    * Read the bus type from the SBLKCTL register. Set the FLAGS
3376    * register in the sequencer for twin and wide bus cards.
3377    */
3378   sblkctl = inb(SBLKCTL + base);
3379   switch (sblkctl & SELBUS_MASK)
3380   {
3381     case SELNARROW:     /* narrow/normal bus */
3382       config->scsi_id = inb(SCSICONF + base) & 0x07;
3383       config->bus_type = AIC_SINGLE;
3384       outb(SINGLE_BUS, FLAGS + base);
3385       break;
3386 
3387     case SELWIDE:     /* Wide bus */
3388       config->scsi_id = inb(SCSICONF + base + 1) & 0x0F;
3389       config->bus_type = AIC_WIDE;
3390       printk("aic7xxx: Enabling wide channel of %s-Wide.\n",
3391              board_names[config->type]);
3392       outb(WIDE_BUS, FLAGS + base);
3393       break;
3394 
3395     case SELBUSB:     /* Twin bus */
3396       config->scsi_id = inb(SCSICONF + base) & 0x07;
3397 #ifdef AIC7XXX_TWIN_SUPPORT
3398       config->scsi_id_b = inb(SCSICONF + base + 1) & 0x07;
3399       config->bus_type = AIC_TWIN;
3400       printk("aic7xxx: Enabled channel B of %s-Twin.\n",
3401              board_names[config->type]);
3402       outb(TWIN_BUS, FLAGS + base);
3403 #else
3404       config->bus_type = AIC_SINGLE;
3405       printk("aic7xxx: Channel B of %s-Twin will be ignored.\n",
3406              board_names[config->type]);
3407       outb(0, FLAGS + base);
3408 #endif
3409       break;
3410 
3411     default:
3412       printk("aic7xxx: Unsupported type 0x%x, please "
3413              "mail deang@teleport.com\n", inb(SBLKCTL + base));
3414       outb(0, FLAGS + base);
3415       return (0);
3416   }
3417 
3418   /*
3419    * For the 294x cards, clearing DIAGLEDEN and DIAGLEDON, will
3420    * take the card out of diagnostic mode and make the host adapter
3421    * LED follow bus activity (will not always be on).
3422    */
3423   outb(sblkctl & ~(DIAGLEDEN | DIAGLEDON), SBLKCTL + base);
3424 
3425   /*
3426    * The IRQ level in i/o port 4 maps directly onto the real
3427    * IRQ number. If it's ok, register it with the kernel.
3428    *
3429    * NB. the Adaptec documentation says the IRQ number is only
3430    *     in the lower four bits; the ECU information shows the
3431    *     high bit being used as well. Which is correct?
3432    *
3433    * The PCI cards get their interrupt from PCI BIOS.
3434    */
3435   if ((config->chip_type == AIC_777x) && ((config->irq < 9) || (config->irq > 15)))
3436   {
3437     printk("aic7xxx: Host adapter uses unsupported IRQ level, ignoring.\n");
3438     return (0);
3439   }
3440 
3441   /*
3442    * Check the IRQ to see if it is shared by another aic7xxx
3443    * controller. If it is and sharing of IRQs is not defined,
3444    * then return 0 hosts found. If sharing of IRQs is allowed
3445    * or the IRQ is not shared by another host adapter, then
3446    * proceed.
3447    */
3448 #ifndef AIC7XXX_SHARE_IRQS
3449    if (aic7xxx_boards[config->irq] != NULL)
3450    {
3451      printk("aic7xxx: Sharing of IRQ's is not configured.\n");
3452      return (0);
3453    }
3454 #endif
3455 
3456   /*
3457    * Print out debugging information before re-enabling
3458    * the card - a lot of registers on it can't be read
3459    * when the sequencer is active.
3460    */
3461   debug_config(config);
3462 
3463   /*
3464    * Before registry, make sure that the offsets of the
3465    * struct scatterlist are what the sequencer will expect,
3466    * otherwise disable scatter-gather altogether until someone
3467    * can fix it. This is important since the sequencer will
3468    * DMA elements of the SG array in while executing commands.
3469    */
3470   if (template->sg_tablesize != SG_NONE)
3471   {
3472     struct scatterlist sg;
3473 
3474     if (SG_STRUCT_CHECK(sg))
3475     {
3476       printk("aic7xxx: Warning - Kernel scatter-gather structures changed, "
3477              "disabling it.\n");
3478       template->sg_tablesize = SG_NONE;
3479     }
3480   }
3481 
3482   /*
3483    * Register each "host" and fill in the returned Scsi_Host
3484    * structure as best we can. Some of the parameters aren't
3485    * really relevant for bus types beyond ISA, and none of the
3486    * high-level SCSI code looks at it anyway. Why are the fields
3487    * there? Also save the pointer so that we can find the
3488    * information when an IRQ is triggered.
3489    */
3490   host = scsi_register(template, sizeof(struct aic7xxx_host));
3491   host->can_queue = config->maxscb;
3492   host->cmd_per_lun = AIC7XXX_CMDS_PER_LUN;
3493   host->this_id = config->scsi_id;
3494   host->irq = config->irq;
3495   if (config->bus_type == AIC_WIDE)
3496   {
3497     host->max_id = 16;
3498   }
3499   if (config->bus_type == AIC_TWIN)
3500   {
3501     host->max_channel = 1;
3502   }
3503 
3504   p = (struct aic7xxx_host *) host->hostdata;
3505 
3506   p->host = host;
3507   p->isr_count = 0;
3508   p->a_scanned = FALSE;
3509   p->b_scanned = FALSE;
3510   p->base = base;
3511   p->maxscb = config->maxscb;
3512   p->qcntmask = config->qcntmask;
3513   p->numscb = 0;
3514   p->extended = config->extended;
3515   p->type = config->type;
3516   p->chip_type = config->chip_type;
3517   p->ultra_enabled = config->ultra_enabled;
3518   p->chan_num = config->chan_num;
3519   p->bus_type = config->bus_type;
3520   p->have_seeprom = have_seeprom;
3521   p->seeprom = sc;
3522   p->free_scb = NULL;
3523   p->aborted_scb = NULL;
3524   p->next = NULL;
3525 
3526   p->unpause = config->unpause;
3527   p->pause = config->pause;
3528 
3529   if (aic7xxx_boards[config->irq] == NULL)
3530   {
3531     /*
3532      * Warning! This must be done before requesting the irq.  It is
3533      * possible for some boards to raise an interrupt as soon as
3534      * they are enabled.  So when we request the irq from the Linux
3535      * kernel, an interrupt is triggered immediately.  Therefore, we
3536      * must ensure the board data is correctly set before the request.
3537      */
3538     aic7xxx_boards[config->irq] = host;
3539 
3540     /*
3541      * Register IRQ with the kernel.
3542      */
3543     if (request_irq(config->irq, aic7xxx_isr, SA_INTERRUPT, "aic7xxx", NULL))
3544     {
3545       printk("aic7xxx: Couldn't register IRQ %d, ignoring.\n", config->irq);
3546       aic7xxx_boards[config->irq] = NULL;
3547       return (0);
3548     }
3549   }
3550   else
3551   {
3552     /*
3553      * We have found a host adapter sharing an IRQ of a previously
3554      * registered host adapter. Add this host adapter's Scsi_Host
3555      * to the beginning of the linked list of hosts at the same IRQ.
3556      */
3557     p->next = aic7xxx_boards[config->irq];
3558     aic7xxx_boards[config->irq] = host;
3559   }
3560 
3561   /*
3562    * Load the sequencer program, then re-enable the board -
3563    * resetting the AIC-7770 disables it, leaving the lights
3564    * on with nobody home. On the PCI bus you *may* be home,
3565    * but then your mailing address is dynamically assigned
3566    * so no one can find you anyway :-)
3567    */
3568   printk("aic7xxx: Downloading sequencer code...");
3569   aic7xxx_loadseq(base);
3570 
3571   /*
3572    * Set Fast Mode and Enable the board
3573    */
3574   outb(FASTMODE, SEQCTL + base);
3575 
3576   if (p->chip_type == AIC_777x)
3577   {
3578     outb(ENABLE, BCTL + base);
3579   }
3580 
3581   printk("done.\n");
3582 
3583   /*
3584    * Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels
3585    */
3586   if (p->bus_type == AIC_TWIN)
3587   {
3588     /*
3589      * Select Channel B.
3590      */
3591     outb((sblkctl & ~SELBUS_MASK) | SELBUSB, SBLKCTL + base);
3592 
3593     outb(config->scsi_id_b, SCSIID + base);
3594     scsi_conf = inb(SCSICONF + base + 1) & (ENSPCHK | STIMESEL);
3595     outb(scsi_conf | ENSTIMER | ACTNEGEN | STPWEN, SXFRCTL1 + base);
3596     outb(ENSELTIMO, SIMODE1 + base);
3597     if (p->ultra_enabled)
3598     {
3599       outb(DFON | SPIOEN | ULTRAEN, SXFRCTL0 + base);
3600     }
3601     else
3602     {
3603       outb(DFON | SPIOEN, SXFRCTL0 + base);
3604     }
3605 
3606     /*
3607      * Select Channel A
3608      */
3609     outb((sblkctl & ~SELBUS_MASK) | SELNARROW, SBLKCTL + base);
3610   }
3611   outb(config->scsi_id, SCSIID + base);
3612   scsi_conf = inb(SCSICONF + base) & (ENSPCHK | STIMESEL);
3613   outb(scsi_conf | ENSTIMER | ACTNEGEN | STPWEN, SXFRCTL1 + base);
3614   outb(ENSELTIMO, SIMODE1 + base);
3615   if (p->ultra_enabled)
3616   {
3617     outb(DFON | SPIOEN | ULTRAEN, SXFRCTL0 + base);
3618   }
3619   else
3620   {
3621     outb(DFON | SPIOEN, SXFRCTL0 + base);
3622   }
3623 
3624   /*
3625    * Look at the information that board initialization or the board
3626    * BIOS has left us. In the lower four bits of each target's
3627    * scratch space any value other than 0 indicates that we should
3628    * initiate synchronous transfers. If it's zero, the user or the
3629    * BIOS has decided to disable synchronous negotiation to that
3630    * target so we don't activate the needsdtr flag.
3631    */
3632   p->needsdtr_copy = 0x0;
3633   p->sdtr_pending = 0x0;
3634   p->needwdtr_copy = 0x0;
3635   p->wdtr_pending = 0x0;
3636   if (p->bus_type == AIC_SINGLE)
3637   {
3638     max_targets = 8;
3639   }
3640   else
3641   {
3642     max_targets = 16;
3643   }
3644 
3645   /*
3646    * Grab the disconnection disable table and invert it for our needs
3647    */
3648   if (have_seeprom)
3649   {
3650     p->discenable = 0x0;
3651   }
3652   else
3653   {
3654     if (config->bios == AIC_DISABLED)
3655     {
3656       printk("aic7xxx : Host adapter BIOS disabled. Using default SCSI "
3657              "device parameters.\n");
3658       p->discenable = 0xFFFF;
3659     }
3660     else
3661     {
3662       p->discenable = ~((inb(DISC_DSB + base + 1) << 8) |
3663           inb(DISC_DSB + base));
3664     }
3665   }
3666 
3667   for (i = 0; i < max_targets; i++)
3668   {
3669     if (have_seeprom)
3670     {
3671       target_settings = ((sc.device_flags[i] & CFXFER) << 4);
3672       if (sc.device_flags[i] & CFSYNCH)
3673       {
3674         p->needsdtr_copy |= (0x01 << i);
3675       }
3676       if (sc.device_flags[i] & CFWIDEB)
3677       {
3678         p->needwdtr_copy |= (0x01 << i);
3679       }
3680       if (sc.device_flags[i] & CFDISC)
3681       {
3682         p->discenable |= (0x01 << i);
3683       }
3684     }
3685     else
3686     {
3687       if (config->use_defaults)
3688       {
3689         target_settings = 0;  /* 10 MHz */
3690         p->needsdtr_copy |= (0x01 << i);
3691         p->needwdtr_copy |= (0x01 << i);
3692       }
3693       else
3694       {
3695         target_settings = inb(TARG_SCRATCH + base + i);
3696         if (target_settings & 0x0F)
3697         {
3698           p->needsdtr_copy |= (0x01 << i);
3699           /*
3700            * Default to asynchronous transfers (0 offset)
3701            */
3702           target_settings &= 0xF0;
3703         }
3704         if (target_settings & 0x80)
3705         {
3706           p->needwdtr_copy |= (0x01 << i);
3707           target_settings &= 0x7F;
3708         }
3709       }
3710     }
3711     outb(target_settings, (TARG_SCRATCH + base + i));
3712   }
3713 
3714   /*
3715    * If we are not wide, forget WDTR. This makes the driver
3716    * work on some cards that don't leave these fields cleared
3717    * when BIOS is not installed.
3718    */
3719   if (p->bus_type != AIC_WIDE)
3720   {
3721     p->needwdtr_copy = 0;
3722   }
3723   p->needsdtr = p->needsdtr_copy;
3724   p->needwdtr = p->needwdtr_copy;
3725 #if 0
3726   printk("NeedSdtr = 0x%x, 0x%x\n", p->needsdtr_copy, p->needsdtr);
3727   printk("NeedWdtr = 0x%x, 0x%x\n", p->needwdtr_copy, p->needwdtr);
3728 #endif
3729 
3730   /*
3731    * For reconnecting targets, the sequencer code needs to
3732    * know how many SCBs it has to search through.
3733    */
3734   outb(config->maxscb, SCBCOUNT + base);
3735 
3736   /*
3737    * 2s compliment of SCBCOUNT
3738    */
3739   i = p->maxscb;
3740   outb(-i & 0xff, COMP_SCBCOUNT + base);
3741 
3742   /*
3743    * Set the QCNT (queue count) mask to deal with broken aic7850s that
3744    * sporadically get garbage in the upper bits of their QCNT registers.
3745    */
3746   outb(config->qcntmask, QCNTMASK + base);
3747 
3748   /*
3749    * Clear the active flags - no targets are busy.
3750    */
3751   outb(0, ACTIVE_A + base);
3752   outb(0, ACTIVE_B + base);
3753 
3754   /*
3755    * We don't have any waiting selections
3756    */
3757   outb(SCB_LIST_NULL, WAITING_SCBH + base);
3758 
3759   /*
3760    * Message out buffer starts empty
3761    */
3762   outb(0, MSG_LEN + base);
3763 
3764   /*
3765    * Reset the SCSI bus. Is this necessary?
3766    *   There may be problems for a warm boot without resetting
3767    *   the SCSI bus. Either BIOS settings in scratch RAM
3768    *   will not get reinitialized, or devices may stay at
3769    *   previous negotiated settings (SDTR and WDTR) while
3770    *   the driver will think that no negotiations have been
3771    *   performed.
3772    *
3773    * Some devices need a long time to "settle" after a SCSI
3774    * bus reset.
3775    */
3776 
3777   if (!aic7xxx_no_reset)
3778   {
3779     printk("aic7xxx: Resetting the SCSI bus...");
3780     if (p->bus_type == AIC_TWIN)
3781     {
3782       /*
3783        * Select Channel B.
3784        */
3785       outb((sblkctl & ~SELBUS_MASK) | SELBUSB, SBLKCTL + base);
3786 
3787       outb(SCSIRSTO, SCSISEQ + base);
3788       udelay(1000);
3789       outb(0, SCSISEQ + base);
3790 
3791       /* Ensure we don't get a RSTI interrupt from this. */
3792       outb(CLRSCSIRSTI, CLRSINT1 + base);
3793       outb(CLRSCSIINT, CLRINT + base);
3794 
3795       /*
3796        * Select Channel A.
3797        */
3798       outb((sblkctl & ~SELBUS_MASK) | SELNARROW, SBLKCTL + base);
3799     }
3800 
3801     outb(SCSIRSTO, SCSISEQ + base);
3802     udelay(1000);
3803     outb(0, SCSISEQ + base);
3804 
3805     /* Ensure we don't get a RSTI interrupt from this. */
3806     outb(CLRSCSIRSTI, CLRSINT1 + base);
3807     outb(CLRSCSIINT, CLRINT + base);
3808 
3809     aic7xxx_delay(AIC7XXX_RESET_DELAY);
3810 
3811     printk("done.\n");
3812   }
3813 
3814   /*
3815    * Unpause the sequencer before returning and enable
3816    * interrupts - we shouldn't get any until the first
3817    * command is sent to us by the high-level SCSI code.
3818    */
3819   UNPAUSE_SEQUENCER(p);
3820   return (found);
3821 }
3822 
3823 /*+F*************************************************************************
3824  * Function:
3825  *   aic7xxx_detect
3826  *
3827  * Description:
3828  *   Try to detect and register an Adaptec 7770 or 7870 SCSI controller.
3829  *-F*************************************************************************/
3830 int
3831 aic7xxx_detect(Scsi_Host_Template *template)
     /*  */
3832 {
3833   int found = 0, slot, base;
3834   unsigned char irq = 0;
3835   int i;
3836   struct aic7xxx_host_config config;
3837 
3838   template->proc_dir = &proc_scsi_aic7xxx;
3839   config.chan_num = 0;
3840 
3841   /*
3842    * Since we may allow sharing of IRQs, it is imperative
3843    * that we "null-out" the aic7xxx_boards array. It is
3844    * not guaranteed to be initialized to 0 (NULL). We use
3845    * a NULL entry to indicate that no prior hosts have
3846    * been found/registered for that IRQ.
3847    */
3848   for (i = 0; i <= MAXIRQ; i++)
3849   {
3850     aic7xxx_boards[i] = NULL;
3851   }
3852 
3853   /*
3854    * Initialize the spurious count to 0.
3855    */
3856   aic7xxx_spurious_count = 0;
3857 
3858   /*
3859    * EISA/VL-bus card signature probe.
3860    */
3861   for (slot = MINSLOT; slot <= MAXSLOT; slot++)
3862   {
3863     base = SLOTBASE(slot) + MINREG;
3864 
3865     if (check_region(MINREG + base, MAXREG - MINREG))
3866     {
3867       /*
3868        * Some other driver has staked a
3869        * claim to this i/o region already.
3870        */
3871       continue;
3872     }
3873 
3874     config.type = aic7xxx_probe(slot, HID0 + base, &(config.bios));
3875     if (config.type != AIC_NONE)
3876     {
3877       /*
3878        * We found a card, allow 1 spurious interrupt.
3879        */
3880       aic7xxx_spurious_count = 1;
3881 
3882       /*
3883        * We "find" a AIC-7770 if we locate the card
3884        * signature and we can set it up and register
3885        * it with the kernel without incident.
3886        */
3887       config.chip_type = AIC_777x;
3888       config.base = base;
3889       config.irq = irq;
3890       config.parity = AIC_ENABLED;
3891       config.low_term = AIC_UNKNOWN;
3892       config.high_term = AIC_UNKNOWN;
3893       config.ultra_enabled = FALSE;
3894       config.extended = aic7xxx_extended;
3895       config.bus_speed = DFTHRSH_100;
3896       config.busrtime = BOFF_60BCLKS;
3897       found += aic7xxx_register(template, &config);
3898 
3899       /*
3900        * Disallow spurious interrupts.
3901        */
3902       aic7xxx_spurious_count = 0;
3903     }
3904   }
3905 
3906 #ifdef CONFIG_PCI
3907   /*
3908    * PCI-bus probe.
3909    */
3910   if (pcibios_present())
3911   {
3912     struct
3913     {
3914       unsigned short vendor_id;
3915       unsigned short device_id;
3916       aha_type       card_type;
3917       aha_chip_type  chip_type;
3918     } const aic7xxx_pci_devices[] = {
3919       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7850, AIC_7850, AIC_785x},
3920       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7855, AIC_7855, AIC_785x},
3921       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7870, AIC_7870, AIC_787x},
3922       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7871, AIC_7871, AIC_787x},
3923       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7872, AIC_7872, AIC_787x},
3924       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7873, AIC_7873, AIC_787x},
3925       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7874, AIC_7874, AIC_787x},
3926       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7880, AIC_7880, AIC_788x},
3927       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7881, AIC_7881, AIC_788x},
3928       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7882, AIC_7882, AIC_788x},
3929       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7883, AIC_7883, AIC_788x},
3930       {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7884, AIC_7884, AIC_788x}
3931     };
3932 
3933     int error;
3934     int done = 0;
3935     unsigned int io_port;
3936     unsigned short index = 0;
3937     unsigned char pci_bus, pci_device_fn;
3938     unsigned int  csize_lattime;
3939     unsigned int  class_revid;
3940     unsigned int  devconfig;
3941     char rev_id[] = {'B', 'C', 'D'};
3942 
3943     for (i = 0; i < NUMBER(aic7xxx_pci_devices); i++)
3944     {
3945       done = FALSE;
3946       while (!done)
3947       {
3948         if (pcibios_find_device(aic7xxx_pci_devices[i].vendor_id,
3949                                 aic7xxx_pci_devices[i].device_id,
3950                                 index, &pci_bus, &pci_device_fn))
3951         {
3952           done = TRUE;
3953         }
3954         else  /* Found an Adaptec PCI device. */
3955         {
3956           config.type = aic7xxx_pci_devices[i].card_type;
3957           config.chip_type = aic7xxx_pci_devices[i].chip_type;
3958           config.chan_num = 0;
3959           config.bios = AIC_ENABLED;  /* Assume bios is enabled. */
3960           config.use_defaults = FALSE;
3961           config.busrtime = 40;
3962           switch (config.type)
3963           {
3964             case AIC_7850:
3965             case AIC_7855:
3966               config.bios = AIC_DISABLED;
3967               config.use_defaults = TRUE;
3968               config.bus_speed = DFTHRSH_100;
3969               break;
3970 
3971             case AIC_7872:  /* 3940 */
3972             case AIC_7882:  /* 3940-Ultra */
3973               config.chan_num = number_of_39xxs & 0x1;  /* Has 2 controllers */
3974               number_of_39xxs++;
3975               if (number_of_39xxs == 2)
3976               {
3977                 number_of_39xxs = 0;  /* To be consistent with 3985. */
3978               }
3979               break;
3980 
3981             case AIC_7873:  /* 3985 */
3982             case AIC_7883:  /* 3985-Ultra */
3983               config.chan_num = number_of_39xxs & 0x3;  /* Has 3 controllers */
3984               number_of_39xxs++;
3985               if (number_of_39xxs == 3)
3986               {
3987                 number_of_39xxs = 0;
3988               }
3989               break;
3990 
3991             default:
3992               break;
3993           }
3994 
3995           /*
3996            * Read sundry information from PCI BIOS.
3997            */
3998           error = pcibios_read_config_dword(pci_bus, pci_device_fn,
3999                                             PCI_BASE_ADDRESS_0, &io_port);
4000           error += pcibios_read_config_byte(pci_bus, pci_device_fn,
4001                                             PCI_INTERRUPT_LINE, &irq);
4002 
4003           /*
4004            * Ensure that we are using good values for the PCI burst size
4005            * and latency timer.
4006            */
4007           error += pcibios_read_config_dword(pci_bus, pci_device_fn,
4008                                              CSIZE_LATTIME, &csize_lattime);
4009           if ((csize_lattime & CACHESIZE) == 0)
4010           {
4011             /*
4012              * Default to 8DWDs - what's the PCI define for this?
4013              */
4014             csize_lattime |= 8;
4015           }
4016           if((csize_lattime & LATTIME) == 0)
4017           {
4018             /*
4019              * Default to 64 PCLKS (is this a good value?)
4020              * This may also be available in the SEEPROM??
4021              */
4022             csize_lattime |= (64 << 8);
4023           }
4024           pcibios_write_config_dword(pci_bus, pci_device_fn,
4025                                      CSIZE_LATTIME, csize_lattime);
4026           printk("aic7xxx: BurstLen = %d DWDs, Latency Timer = %d PCLKS\n",
4027                   (int) (csize_lattime & CACHESIZE),
4028                   (csize_lattime >> 8) & 0x000000ff);
4029 
4030           error += pcibios_read_config_dword(pci_bus, pci_device_fn,
4031                                              CLASS_PROGIF_REVID, &class_revid);
4032           if ((class_revid & DEVREVID) < 3)
4033           {
4034             printk("aic7xxx: %s Rev %c.\n", board_names[config.type],
4035                    rev_id[class_revid & DEVREVID]);
4036           }
4037 
4038           error += pcibios_read_config_dword(pci_bus, pci_device_fn,
4039                                              DEVCONFIG, &devconfig);
4040           if (error)
4041           {
4042             panic("aic7xxx: (aic7xxx_detect) Error %d reading PCI registers.\n",
4043                   error);
4044           }
4045 
4046           printk("aic7xxx: devconfig = 0x%x.\n", devconfig);
4047 
4048           /*
4049            * The first bit of PCI_BASE_ADDRESS_0 is always set, so
4050            * we mask it off.
4051            */
4052           base = io_port & 0xfffffffe;
4053 
4054           /*
4055            * I don't think we need to bother with allowing
4056            * spurious interrupts for the 787x/785x, but what
4057            * the hey.
4058            */
4059           aic7xxx_spurious_count = 1;
4060 
4061           config.base = base;
4062           config.irq = irq;
4063           config.parity = AIC_ENABLED;
4064           config.low_term = AIC_UNKNOWN;
4065           config.high_term = AIC_UNKNOWN;
4066           config.extended = aic7xxx_extended;
4067           config.ultra_enabled = FALSE;
4068           if (devconfig & RAMPSM)
4069           {
4070             /*
4071              * External SRAM present.  The probe will walk the SCBs to see
4072              * how much SRAM we have and set the number of SCBs accordingly.
4073              * We have to turn off SCBRAMSEL to access the external SCB
4074              * SRAM.
4075              *
4076              * It seems that early versions of the aic7870 didn't use these
4077              * bits, hence the hack for the 3940 above.  I would guess that
4078              * recent 3940s using later aic7870 or aic7880 chips do actually
4079              * set RAMPSM.
4080              *
4081              * The documentation isn't clear, but it sounds like the value
4082              * written to devconfig must not have RAMPSM set.  The second
4083              * sixteen bits of the register are R/O anyway, so it shouldn't
4084              * affect RAMPSM either way.
4085              */
4086             printk ("aic7xxx: External RAM detected. Enabling RAM access.\n");
4087             devconfig &= ~(RAMPSM | SCBRAMSEL);
4088             pcibios_write_config_dword(pci_bus, pci_device_fn,
4089                                        DEVCONFIG, devconfig);
4090           }
4091           found += aic7xxx_register(template, &config);
4092 
4093           /*
4094            * Disable spurious interrupts.
4095            */
4096           aic7xxx_spurious_count = 0;
4097 
4098           index++;
4099         }  /* Found an Adaptec PCI device. */
4100       }
4101     }
4102   }
4103 #endif CONFIG_PCI
4104 
4105   template->name = aic7xxx_info(NULL);
4106   return (found);
4107 }
4108 
4109 
4110 /*+F*************************************************************************
4111  * Function:
4112  *   aic7xxx_buildscb
4113  *
4114  * Description:
4115  *   Build a SCB.
4116  *-F*************************************************************************/
4117 static void
4118 aic7xxx_buildscb(struct aic7xxx_host *p,
     /*  */
4119                  Scsi_Cmnd *cmd,
4120                  struct aic7xxx_scb *scb)
4121 {
4122   void *addr;
4123   unsigned short mask;
4124   struct scatterlist *sg;
4125 
4126   /*
4127    * Setup the control byte if we need negotiation and have not
4128    * already requested it.
4129    */
4130 #ifdef AIC7XXX_TAGGED_QUEUEING
4131   if (cmd->device->tagged_supported)
4132   {
4133     if (cmd->device->tagged_queue == 0)
4134     {
4135       printk("aic7xxx: Enabling tagged queuing for target %d, "
4136              "channel %d.\n", cmd->target, cmd->channel);
4137       cmd->device->tagged_queue = 1;
4138       cmd->device->current_tag = 1;  /* enable tagging */
4139     }
4140     cmd->tag = cmd->device->current_tag;
4141     cmd->device->current_tag++;
4142     scb->control |= TAG_ENB;
4143   }
4144 #endif
4145   mask = (0x01 << (cmd->target | (cmd->channel << 3)));
4146   if (p->discenable & mask)
4147   {
4148     scb->control |= DISCENB;
4149   }
4150   if ((p->needwdtr & mask) && !(p->wdtr_pending & mask))
4151   {
4152     p->wdtr_pending |= mask;
4153     scb->control |= NEEDWDTR;
4154 #if 0
4155     printk("aic7xxx: Sending WDTR request to target %d.\n", cmd->target);
4156 #endif
4157   }
4158   else
4159   {
4160     if ((p->needsdtr & mask) && !(p->sdtr_pending & mask))
4161     {
4162       p->sdtr_pending |= mask;
4163       scb->control |= NEEDSDTR;
4164 #if 0
4165       printk("aic7xxx: Sending SDTR request to target %d.\n", cmd->target);
4166 #endif
4167     }
4168   }
4169 
4170 #if 0
4171   printk("aic7xxx: (build_scb) Target %d, cmd(0x%x) size(%u) wdtr(0x%x) "
4172          "mask(0x%x).\n",
4173          cmd->target, cmd->cmnd[0], cmd->cmd_len, p->needwdtr, mask);
4174 #endif
4175   scb->target_channel_lun = ((cmd->target << 4) & 0xF0) |
4176         ((cmd->channel & 0x01) << 3) | (cmd->lun & 0x07);
4177 
4178   /*
4179    * The interpretation of request_buffer and request_bufflen
4180    * changes depending on whether or not use_sg is zero; a
4181    * non-zero use_sg indicates the number of elements in the
4182    * scatter-gather array.
4183    */
4184 
4185   /*
4186    * XXX - this relies on the host data being stored in a
4187    *       little-endian format.
4188    */
4189   addr = cmd->cmnd;
4190   scb->SCSI_cmd_length = cmd->cmd_len;
4191   memcpy(scb->SCSI_cmd_pointer, &addr, sizeof(scb->SCSI_cmd_pointer));
4192 
4193   if (cmd->use_sg)
4194   {
4195     scb->SG_segment_count = cmd->use_sg;
4196     memcpy(scb->SG_list_pointer, &cmd->request_buffer,
4197            sizeof(scb->SG_list_pointer));
4198     memcpy(&sg, &cmd->request_buffer, sizeof(sg));
4199     memcpy(scb->data_pointer, &(sg[0].address), sizeof(scb->data_pointer));
4200     scb->data_count = sg[0].length;
4201 #if 0
4202     debug("aic7xxx: (build_scb) SG segs(%d), length(%u), sg[0].length(%d).\n",
4203            cmd->use_sg, aic7xxx_length(cmd, 0), scb->data_count);
4204 #endif
4205   }
4206   else
4207   {
4208 #if 0
4209   debug("aic7xxx: (build_scb) Creating scatterlist, addr(0x%lx) length(%d).\n",
4210         (unsigned long) cmd->request_buffer, cmd->request_bufflen);
4211 #endif
4212     if (cmd->request_bufflen == 0)
4213     {
4214       /*
4215        * In case the higher level SCSI code ever tries to send a zero
4216        * length command, ensure the SCB indicates no data.  The driver
4217        * will interpret a zero length command as a Bus Device Reset.
4218        */
4219       scb->SG_segment_count = 0;
4220       memset(scb->SG_list_pointer, 0, sizeof(scb->SG_list_pointer));
4221       memset(scb->data_pointer, 0, sizeof(scb->data_pointer));
4222       scb->data_count = 0;
4223     }
4224     else
4225     {
4226       scb->SG_segment_count = 1;
4227       scb->sg.address = (char *) cmd->request_buffer;
4228       scb->sg.length = cmd->request_bufflen;
4229       addr = &scb->sg;
4230       memcpy(scb->SG_list_pointer, &addr, sizeof(scb->SG_list_pointer));
4231       scb->data_count = scb->sg.length;
4232       memcpy(scb->data_pointer, &cmd->request_buffer, sizeof(scb->data_pointer));
4233     }
4234   }
4235 }
4236 
4237 /*+F*************************************************************************
4238  * Function:
4239  *   aic7xxx_queue
4240  *
4241  * Description:
4242  *   Queue a SCB to the controller.
4243  *-F*************************************************************************/
4244 int
4245 aic7xxx_queue(Scsi_Cmnd *cmd, void (*fn)(Scsi_Cmnd *))
     /*  */
4246 {
4247   long flags;
4248   struct aic7xxx_host *p;
4249   struct aic7xxx_scb *scb;
4250 
4251   p = (struct aic7xxx_host *) cmd->host->hostdata;
4252 
4253   /*
4254    * Check to see if channel was scanned.
4255    */
4256   if (!p->a_scanned && (cmd->channel == 0))
4257   {
4258     printk("aic7xxx: Scanning channel A for devices.\n");
4259     p->a_scanned = TRUE;
4260   }
4261   else
4262   {
4263     if (!p->b_scanned && (cmd->channel == 1))
4264     {
4265       printk("aic7xxx: Scanning channel B for devices.\n");
4266       p->b_scanned = TRUE;
4267     }
4268   }
4269 
4270 #if 0
4271   debug("aic7xxx: (queue) cmd(0x%x) size(%u), target %d, channel %d, lun %d.\n",
4272         cmd->cmnd[0], cmd->cmd_len, cmd->target, cmd->channel,
4273         cmd->lun & 0x07);
4274 #endif
4275 
4276   /*
4277    * This is a critical section, since we don't want the
4278    * interrupt routine mucking with the host data or the
4279    * card. Since the kernel documentation is vague on
4280    * whether or not we are in a cli/sti pair already, save
4281    * the flags to be on the safe side.
4282    */
4283   save_flags(flags);
4284   cli();
4285 
4286   /*
4287    * Find a free slot in the SCB array to load this command
4288    * into. Since can_queue is set to the maximum number of
4289    * SCBs for the card, we should always find one.
4290    *
4291    * First try to find an scb in the free list. If there are
4292    * none in the free list, then check the current number of
4293    * of scbs and take an unused one from the scb array.
4294    */
4295   scb = p->free_scb;
4296   if (scb != NULL)
4297   { /* found one in the free list */
4298     p->free_scb = scb->next;   /* remove and update head of list */
4299     /*
4300      * Warning! For some unknown reason, the scb at the head
4301      * of the free list is not the same address that it should
4302      * be. That's why we set the scb pointer taken by the
4303      * position in the array. The scb at the head of the list
4304      * should match this address, but it doesn't.
4305      */
4306     scb = &(p->scb_array[scb->position]);
4307     scb->control = 0;
4308     scb->state = SCB_ACTIVE;
4309   }
4310   else
4311   {
4312     if (p->numscb >= p->maxscb)
4313     {
4314       panic("aic7xxx: (aic7xxx_queue) Couldn't find a free SCB.\n");
4315     }
4316     else
4317     {
4318       /*
4319        * Initialize the scb within the scb array. The
4320        * position within the array is the position on
4321        * the board that it will be loaded.
4322        */
4323       scb = &(p->scb_array[p->numscb]);
4324       memset(scb, 0, sizeof(*scb));
4325 
4326       scb->position = p->numscb;
4327       p->numscb++;
4328       scb->state = SCB_ACTIVE;
4329     }
4330   }
4331 
4332   scb->cmd = cmd;
4333   aic7xxx_position(cmd) = scb->position;
4334 #if 0
4335   debug_scb(scb);
4336 #endif;
4337 
4338   /*
4339    * Construct the SCB beforehand, so the sequencer is
4340    * paused a minimal amount of time.
4341    */
4342   aic7xxx_buildscb(p, cmd, scb);
4343 
4344 #if 0
4345   if (scb != &p->scb_array[scb->position])
4346   {
4347     printk("aic7xxx: (queue) Address of SCB by position does not match SCB "
4348            "address.\n");
4349   }
4350   printk("aic7xxx: (queue) SCB pos(%d) cmdptr(0x%x) state(%d) freescb(0x%x)\n",
4351          scb->position, (unsigned int) scb->cmd,
4352          scb->state, (unsigned int) p->free_scb);
4353 #endif
4354 
4355   /*
4356    * Make sure the Scsi_Cmnd pointer is saved, the struct it points to
4357    * is set up properly, and the parity error flag is reset, then send
4358    * the SCB to the sequencer and watch the fun begin.
4359    */
4360   cmd->scsi_done = fn;
4361   aic7xxx_error(cmd) = DID_OK;
4362   aic7xxx_status(cmd) = 0;
4363   cmd->result = 0;
4364   memset(&cmd->sense_buffer, 0, sizeof(cmd->sense_buffer));
4365 
4366   /*
4367    * Pause the sequencer so we can play with its registers -
4368    * wait for it to acknowledge the pause.
4369    *
4370    * XXX - should the interrupts be left on while doing this?
4371    */
4372   PAUSE_SEQUENCER(p);
4373 
4374   /*
4375    * Save the SCB pointer and put our own pointer in - this
4376    * selects one of the four banks of SCB registers. Load
4377    * the SCB, then write its pointer into the queue in FIFO
4378    * and restore the saved SCB pointer.
4379    */
4380   aic7xxx_putscb(p, scb);
4381   outb(scb->position, QINFIFO + p->base);
4382 
4383   UNPAUSE_SEQUENCER(p);
4384 #if 0
4385   printk("aic7xxx: (queue) After - cmd(0x%lx) scb->cmd(0x%lx) pos(%d).\n",
4386          (long) cmd, (long) scb->cmd, scb->position);
4387 #endif;
4388   restore_flags(flags);
4389   return (0);
4390 }
4391 
4392 /*+F*************************************************************************
4393  * Function:
4394  *   aic7xxx_abort_reset
4395  *
4396  * Description:
4397  *   Abort or reset the current SCSI command(s).  If the scb has not
4398  *   previously been aborted, then we attempt to send a BUS_DEVICE_RESET
4399  *   message to the target.  If the scb has previously been unsuccessfully
4400  *   aborted, then we will reset the channel and have all devices renegotiate.
4401  *   Returns an enumerated type that indicates the status of the operation.
4402  *-F*************************************************************************/
4403 static aha_abort_reset_type
4404 aic7xxx_abort_reset(Scsi_Cmnd *cmd, unsigned char errcode)
     /*  */
4405 {
4406   struct aic7xxx_scb  *scb;
4407   struct aic7xxx_host *p;
4408   long flags;
4409   unsigned char bus_state;
4410   aha_abort_reset_type scb_status = ABORT_RESET_SUCCESS;
4411   int base, found;
4412   char channel;
4413 
4414   p = (struct aic7xxx_host *) cmd->host->hostdata;
4415   scb = &(p->scb_array[aic7xxx_position(cmd)]);
4416   base = p->base;
4417   channel = scb->target_channel_lun & SELBUSB ? 'B': 'A';
4418 
4419   save_flags(flags);
4420   cli();
4421 
4422   if (scb->state & SCB_ACTIVE)
4423   {
4424     /*
4425      * Ensure that the card doesn't do anything
4426      * behind our back.
4427      */
4428     PAUSE_SEQUENCER(p);
4429 
4430     printk ("aic7xxx: (abort_reset) scb state 0x%x, ", scb->state);
4431     bus_state = inb(LASTPHASE + p->base);
4432 
4433     switch (bus_state)
4434     {
4435       case P_DATAOUT:
4436         printk ("Data-Out phase, ");
4437         break;
4438       case P_DATAIN:
4439         printk ("Data-In phase, ");
4440         break;
4441       case P_COMMAND:
4442         printk ("Command phase, ");
4443         break;
4444       case P_MESGOUT:
4445         printk ("Message-Out phase, ");
4446         break;
4447       case P_STATUS:
4448         printk ("Status phase, ");
4449         break;
4450       case P_MESGIN:
4451         printk ("Message-In phase, ");
4452         break;
4453       default:
4454         printk ("while idle, LASTPHASE = 0x%x, ", bus_state);
4455         /*
4456          * We're not in a valid phase, so assume we're idle.
4457          */
4458         bus_state = 0;
4459         break;
4460     }
4461     printk ("SCSISIGI = 0x%x\n", inb (p->base + SCSISIGI));
4462 
4463     /*
4464      * First, determine if we want to do a bus reset or simply a bus device
4465      * reset.  If this is the first time that a transaction has timed out,
4466      * just schedule a bus device reset.  Otherwise, we reset the bus and
4467      * abort all pending I/Os on that bus.
4468      */
4469     if (scb->state & SCB_ABORTED)
4470     {
4471       /*
4472        * Been down this road before.  Do a full bus reset.
4473        */
4474       found = aic7xxx_reset_channel(p, channel, scb->position, TRUE);
4475     }
4476     else
4477     {
4478       unsigned char active_scb, control;
4479       struct aic7xxx_scb *active_scbp;
4480 
4481       /*
4482        * Send a Bus Device Reset Message:
4483        * The target we select to send the message to may be entirely
4484        * different than the target pointed to by the scb that timed
4485        * out.  If the command is in the QINFIFO or the waiting for
4486        * selection list, it's not tying up the bus and isn't responsible
4487        * for the delay so we pick off the active command which should
4488        * be the SCB selected by SCBPTR.  If it's disconnected or active,
4489        * we device reset the target scbp points to.  Although it may
4490        * be that this target is not responsible for the delay, it may
4491        * also be that we're timing out on a command that just takes
4492        * too much time, so we try the bus device reset there first.
4493        */
4494       active_scb = inb(SCBPTR + base);
4495       active_scbp = &(p->scb_array[active_scb]);
4496       control = inb(SCB_CONTROL + base);
4497 
4498       /*
4499        * Test to see if scbp is disconnected
4500        */
4501       outb(scb->position, SCBPTR + base);
4502       if (inb(SCB_CONTROL + base) & DISCONNECTED)
4503       {
4504 #ifdef AIC7XXX_DEBUG_ABORT
4505         printk ("aic7xxx: (abort_scb) scb %d is disconnected; "
4506                 "bus device reset message queued.\n", scb->position);
4507 #endif
4508         scb->state |= (SCB_DEVICE_RESET | SCB_ABORTED);
4509         scb->SG_segment_count = 0;
4510         memset(scb->SG_list_pointer, 0, sizeof(scb->SG_list_pointer));
4511         memset(scb->data_pointer, 0, sizeof(scb->data_pointer));
4512         scb->data_count = 0;
4513         aic7xxx_putscb(p, scb);
4514         aic7xxx_add_waiting_scb(base, scb);
4515         aic7xxx_error(scb->cmd) = errcode;
4516         scb_status = ABORT_RESET_PENDING;
4517         outb(active_scb, SCBPTR + base);
4518         UNPAUSE_SEQUENCER(p);
4519       }
4520       else
4521       {
4522         /*
4523          * Is the active SCB really active?
4524          */
4525         if ((active_scbp->state & SCB_ACTIVE) && bus_state)
4526         {
4527           /*
4528            * Load the message buffer and assert attention.
4529            */
4530           active_scbp->state |= (SCB_DEVICE_RESET | SCB_ABORTED);
4531           outb(1, MSG_LEN + base);
4532           outb(MSG_BUS_DEVICE_RESET, MSG0 + base);
4533           outb(bus_state | ATNO, SCSISIGO + base);
4534 #ifdef AIC7XXX_DEBUG_ABORT
4535           printk ("aic7xxx: (abort_scb) asserted ATN - "
4536                   "bus device reset in message buffer.\n");
4537 #endif
4538           if (active_scbp != scb)
4539           {
4540             /*
4541              * XXX - We would like to increment the timeout on scb, but
4542              *       access to that routine is denied because it is hidden
4543              *       in scsi.c.  If we were able to do this, it would give
4544              *       scb a new lease on life.
4545              */
4546             ;
4547           }
4548           aic7xxx_error(scb->cmd) = errcode;
4549           scb_status = ABORT_RESET_PENDING;
4550           /*
4551            * Restore the active SCB and unpause the sequencer.
4552            */
4553           outb(active_scb, SCBPTR + base);
4554 
4555           UNPAUSE_SEQUENCER(p);
4556         }
4557         else
4558         {
4559 #ifdef AIC7XXX_DEBUG_ABORT
4560             printk ("aic7xxx: (abort_scb) no active command.\n");
4561 #endif
4562           /*
4563            * No active command to single out, so reset
4564            * the bus for the timed out target.
4565            */
4566           aic7xxx_reset_channel(p, channel, scb->position, TRUE);
4567         }
4568       }
4569     }
4570   }
4571   else
4572   {
4573     /*
4574      * The scb is not active and must have completed after the timeout
4575      * check in scsi.c and before we check the scb state above.  For
4576      * this case we return SCSI_ABORT_NOT_RUNNING (if abort was called)
4577      * or SCSI_RESET_SUCCESS (if reset was called).
4578      */
4579 #ifdef AIC7XXX_DEBUG_ABORT
4580     printk ("aic7xxx: (abort_reset) called with no active scb, errcode 0x%x\n",
4581             errcode);
4582 #endif
4583     scb_status = ABORT_RESET_INACTIVE;
4584     /*
4585      * According to the comments in scsi.h and Michael Neuffer, if we do not
4586      * have an active command for abort or reset, we should not call the
4587      * command done function.  Unfortunately, this hangs the system for me
4588      * unless we *do* call the done function.
4589      *
4590      * XXX - Revisit this sometime!
4591      */
4592     cmd->result = errcode << 16;
4593     cmd->scsi_done(cmd);
4594   }
4595 
4596   restore_flags(flags);
4597   return (scb_status);
4598 }
4599 
4600 
4601 /*+F*************************************************************************
4602  * Function:
4603  *   aic7xxx_abort
4604  *
4605  * Description:
4606  *   Abort the current SCSI command(s).
4607  *-F*************************************************************************/
4608 int
4609 aic7xxx_abort(Scsi_Cmnd *cmd)
     /*  */
4610 {
4611 #ifdef AIC7XXX_DEBUG_ABORT
4612   printk ("aic7xxx: (abort) target/channel %d/%d\n", cmd->target, cmd->channel);
4613 #endif
4614 
4615   switch (aic7xxx_abort_reset(cmd, DID_ABORT))
4616   {
4617     case ABORT_RESET_INACTIVE:
4618       return (SCSI_ABORT_NOT_RUNNING);
4619       break;
4620     case ABORT_RESET_PENDING:
4621       return (SCSI_ABORT_PENDING);
4622       break;
4623     case ABORT_RESET_SUCCESS:
4624     default:
4625       return (SCSI_ABORT_SUCCESS);
4626       break;
4627   }
4628 }
4629 
4630 /*+F*************************************************************************
4631  * Function:
4632  *   aic7xxx_reset
4633  *
4634  * Description:
4635  *   Resetting the bus always succeeds - is has to, otherwise the
4636  *   kernel will panic! Try a surgical technique - sending a BUS
4637  *   DEVICE RESET message - on the offending target before pulling
4638  *   the SCSI bus reset line.
4639  *-F*************************************************************************/
4640 int
4641 aic7xxx_reset(Scsi_Cmnd *cmd)
     /*  */
4642 {
4643 #ifdef AIC7XXX_DEBUG_ABORT
4644   printk ("aic7xxx: (reset) target/channel %d/%d\n", cmd->target, cmd->channel);
4645 #endif
4646 
4647   switch (aic7xxx_abort_reset(cmd, DID_RESET))
4648   {
4649     case ABORT_RESET_PENDING:
4650       return (SCSI_RESET_PENDING);
4651       break;
4652     case ABORT_RESET_SUCCESS:
4653       return (SCSI_RESET_BUS_RESET | SCSI_RESET_SUCCESS);
4654       break;
4655     case ABORT_RESET_INACTIVE:
4656     default:
4657       return (SCSI_RESET_SUCCESS);
4658       break;
4659   }
4660 }
4661 
4662 /*+F*************************************************************************
4663  * Function:
4664  *   aic7xxx_biosparam
4665  *
4666  * Description:
4667  *   Return the disk geometry for the given SCSI device.
4668  *-F*************************************************************************/
4669 int
4670 aic7xxx_biosparam(Disk *disk, kdev_t dev, int geom[])
     /*  */
4671 {
4672   int heads, sectors, cylinders;
4673   struct aic7xxx_host *p;
4674 
4675   p = (struct aic7xxx_host *) disk->device->host->hostdata;
4676 
4677   /*
4678    * XXX - if I could portably find the card's configuration
4679    *       information, then this could be autodetected instead
4680    *       of left to a boot-time switch.
4681    */
4682   heads = 64;
4683   sectors = 32;
4684   cylinders = disk->capacity / (heads * sectors);
4685 
4686   if (p->extended && cylinders > 1024)
4687   {
4688     heads = 255;
4689     sectors = 63;
4690     cylinders = disk->capacity / (255 * 63);
4691   }
4692 
4693   geom[0] = heads;
4694   geom[1] = sectors;
4695   geom[2] = cylinders;
4696 
4697   return (0);
4698 }
4699 
4700 #include "aic7xxx_proc.c"
4701 
4702 #ifdef MODULE
4703 /* Eventually this will go into an include file, but this will be later */
4704 Scsi_Host_Template driver_template = AIC7XXX;
4705 
4706 #include "scsi_module.c"
4707 #endif
4708 
4709 /*
4710  * Overrides for Emacs so that we almost follow Linus's tabbing style.
4711  * Emacs will notice this stuff at the end of the file and automatically
4712  * adjust the settings for this buffer only.  This must remain at the end
4713  * of the file.
4714  * ---------------------------------------------------------------------------
4715  * Local variables:
4716  * c-indent-level: 2
4717  * c-brace-imaginary-offset: 0
4718  * c-brace-offset: -2
4719  * c-argdecl-indent: 2
4720  * c-label-offset: -2
4721  * c-continued-statement-offset: 2
4722  * c-continued-brace-offset: 0
4723  * indent-tabs-mode: nil
4724  * tab-width: 8
4725  * End:
4726  */
4727
/* */
root/drivers/scsi/aic7xxx.c

DEFINITIONS
