1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23 #ifndef IN2000_H
24 #define IN2000_H
25
26 #include <asm/io.h>
27
28
29
30
31
32
33
34
35
36 #include <linux/version.h>
37
38
39 #define uchar unsigned char
40
41
42
43 #define IO_WD_ASR 0x00
44 #define ASR_INT 0x80
45 #define ASR_LCI 0x40
46 #define ASR_BSY 0x20
47 #define ASR_CIP 0x10
48 #define ASR_PE 0x02
49 #define ASR_DBR 0x01
50 #define IO_WD_ADDR 0x00
51 #define IO_WD_DATA 0x01
52 #define IO_FIFO 0x02
53 #define IN2000_FIFO_SIZE 2048
54 #define IO_CARD_RESET 0x03
55 #define IO_FIFO_COUNT 0x04
56 #define IO_FIFO_WRITE 0x05
57 #define IO_FIFO_READ 0x07
58 #define IO_LED_OFF 0x08
59 #define IO_SWITCHES 0x08
60 #define SW_ADDR0 0x01
61 #define SW_ADDR1 0x02
62 #define SW_DISINT 0x04
63 #define SW_INT0 0x08
64 #define SW_INT1 0x10
65 #define SW_INT_SHIFT 3
66 #define SW_SYNC_DOS5 0x20
67 #define SW_FLOPPY 0x40
68 #define SW_BIT7 0x80
69 #define IO_LED_ON 0x09
70 #define IO_HARDWARE 0x0a
71 #define IO_INTR_MASK 0x0c
72 #define IMASK_WD 0x01
73 #define IMASK_FIFO 0x02
74
75
76 #define WD_OWN_ID 0x00
77 #define WD_CONTROL 0x01
78 #define WD_TIMEOUT_PERIOD 0x02
79 #define WD_CDB_1 0x03
80 #define WD_CDB_2 0x04
81 #define WD_CDB_3 0x05
82 #define WD_CDB_4 0x06
83 #define WD_CDB_5 0x07
84 #define WD_CDB_6 0x08
85 #define WD_CDB_7 0x09
86 #define WD_CDB_8 0x0a
87 #define WD_CDB_9 0x0b
88 #define WD_CDB_10 0x0c
89 #define WD_CDB_11 0x0d
90 #define WD_CDB_12 0x0e
91 #define WD_TARGET_LUN 0x0f
92 #define WD_COMMAND_PHASE 0x10
93 #define WD_SYNCHRONOUS_TRANSFER 0x11
94 #define WD_TRANSFER_COUNT_MSB 0x12
95 #define WD_TRANSFER_COUNT 0x13
96 #define WD_TRANSFER_COUNT_LSB 0x14
97 #define WD_DESTINATION_ID 0x15
98 #define WD_SOURCE_ID 0x16
99 #define WD_SCSI_STATUS 0x17
100 #define WD_COMMAND 0x18
101 #define WD_DATA 0x19
102 #define WD_QUEUE_TAG 0x1a
103 #define WD_AUXILIARY_STATUS 0x1f
104
105
106 #define WD_CMD_RESET 0x00
107 #define WD_CMD_ABORT 0x01
108 #define WD_CMD_ASSERT_ATN 0x02
109 #define WD_CMD_NEGATE_ACK 0x03
110 #define WD_CMD_DISCONNECT 0x04
111 #define WD_CMD_RESELECT 0x05
112 #define WD_CMD_SEL_ATN 0x06
113 #define WD_CMD_SEL 0x07
114 #define WD_CMD_SEL_ATN_XFER 0x08
115 #define WD_CMD_SEL_XFER 0x09
116 #define WD_CMD_RESEL_RECEIVE 0x0a
117 #define WD_CMD_RESEL_SEND 0x0b
118 #define WD_CMD_WAIT_SEL_RECEIVE 0x0c
119 #define WD_CMD_TRANS_ADDR 0x18
120 #define WD_CMD_TRANS_INFO 0x20
121 #define WD_CMD_TRANSFER_PAD 0x21
122 #define WD_CMD_SBT_MODE 0x80
123
124
125 #define PHS_DATA_OUT 0x00
126 #define PHS_DATA_IN 0x01
127 #define PHS_COMMAND 0x02
128 #define PHS_STATUS 0x03
129 #define PHS_MESS_OUT 0x06
130 #define PHS_MESS_IN 0x07
131
132
133
134
135 #define CSR_RESET 0x00
136 #define CSR_RESET_AF 0x01
137
138
139 #define CSR_RESELECT 0x10
140 #define CSR_SELECT 0x11
141 #define CSR_SEL_XFER_DONE 0x16
142 #define CSR_XFER_DONE 0x18
143
144
145 #define CSR_MSGIN 0x20
146 #define CSR_SDP 0x21
147 #define CSR_SEL_ABORT 0x22
148 #define CSR_RESEL_ABORT 0x25
149 #define CSR_RESEL_ABORT_AM 0x27
150 #define CSR_ABORT 0x28
151
152
153 #define CSR_INVALID 0x40
154 #define CSR_UNEXP_DISC 0x41
155 #define CSR_TIMEOUT 0x42
156 #define CSR_PARITY 0x43
157 #define CSR_PARITY_ATN 0x44
158 #define CSR_BAD_STATUS 0x45
159 #define CSR_UNEXP 0x48
160
161
162 #define CSR_RESEL 0x80
163 #define CSR_RESEL_AM 0x81
164 #define CSR_DISC 0x85
165 #define CSR_SRV_REQ 0x88
166
167
168 #define OWNID_EAF 0x08
169 #define OWNID_EHP 0x10
170 #define OWNID_RAF 0x20
171 #define OWNID_FS_8 0x00
172 #define OWNID_FS_12 0x40
173 #define OWNID_FS_16 0x80
174
175
176 #define CTRL_HSP 0x01
177 #define CTRL_HA 0x02
178 #define CTRL_IDI 0x04
179 #define CTRL_EDI 0x08
180 #define CTRL_HHP 0x10
181 #define CTRL_POLLED 0x00
182 #define CTRL_BURST 0x20
183 #define CTRL_BUS 0x40
184 #define CTRL_DMA 0x80
185
186
187 #define TIMEOUT_PERIOD_VALUE 20
188
189
190 #define STR_FSS 0x80
191
192
193 #define DSTID_DPD 0x40
194 #define DATA_OUT_DIR 0
195 #define DATA_IN_DIR 1
196 #define DSTID_SCC 0x80
197
198
199 #define SRCID_MASK 0x07
200 #define SRCID_SIV 0x08
201 #define SRCID_DSP 0x20
202 #define SRCID_ES 0x40
203 #define SRCID_ER 0x80
204
205
206
207 #define DEFAULT_SX_PER 500
208 #define DEFAULT_SX_OFF 0
209
210 #define OPTIMUM_SX_PER 252
211 #define OPTIMUM_SX_OFF 12
212
213 struct sx_period {
214 unsigned int period_ns;
215 uchar reg_value;
216 };
217
218
219 struct IN2000_hostdata {
220 struct Scsi_Host *next;
221 uchar chip;
222 uchar microcode;
223 unsigned short io_base;
224 unsigned int dip_switch;
225 unsigned int hrev;
226 volatile uchar busy[8];
227 volatile Scsi_Cmnd *input_Q;
228 volatile Scsi_Cmnd *selecting;
229 volatile Scsi_Cmnd *connected;
230 volatile Scsi_Cmnd *disconnected_Q;
231 uchar state;
232 uchar fifo;
233 uchar level2;
234 uchar disconnect;
235 unsigned int args;
236 uchar incoming_msg[8];
237 int incoming_ptr;
238 uchar outgoing_msg[8];
239 int outgoing_len;
240 unsigned int default_sx_per;
241 uchar sync_xfer[8];
242 uchar sync_stat[8];
243 uchar sync_off;
244 uchar proc;
245 };
246
247
248
249
250 #define C_WD33C93 0
251 #define C_WD33C93A 1
252 #define C_WD33C93B 2
253 #define C_UNKNOWN_CHIP 100
254
255
256
257 #define S_UNCONNECTED 0
258 #define S_SELECTING 1
259 #define S_RUNNING_LEVEL2 2
260 #define S_CONNECTED 3
261 #define S_PRE_TMP_DISC 4
262 #define S_PRE_CMP_DISC 5
263
264
265
266 #define FI_FIFO_UNUSED 0
267 #define FI_FIFO_READING 1
268 #define FI_FIFO_WRITING 2
269
270
271
272
273
274
275
276 #define L2_NONE 0
277 #define L2_SELECT 1
278 #define L2_BASIC 2
279 #define L2_DATA 3
280 #define L2_MOST 4
281 #define L2_RESELECT 5
282 #define L2_ALL 6
283
284
285
286 #define DIS_NEVER 0
287 #define DIS_ADAPTIVE 1
288 #define DIS_ALWAYS 2
289
290
291
292 #define DB_TEST 1<<0
293 #define DB_FIFO 1<<1
294 #define DB_QUEUE_COMMAND 1<<2
295 #define DB_EXECUTE 1<<3
296 #define DB_INTR 1<<4
297 #define DB_TRANSFER 1<<5
298 #define DB_MASK 0x3f
299
300 #define A_NO_SCSI_RESET 1<<15
301
302
303
304
305 #define SS_UNSET 0
306 #define SS_FIRST 1
307 #define SS_WAITING 2
308 #define SS_SET 3
309
310
311
312 #define PR_VERSION 1<<0
313 #define PR_INFO 1<<1
314 #define PR_TOTALS 1<<2
315 #define PR_CONNECTED 1<<3
316 #define PR_INPUTQ 1<<4
317 #define PR_DISCQ 1<<5
318 #define PR_TEST 1<<6
319 #define PR_STOP 1<<7
320
321
322 int in2000_detect(Scsi_Host_Template *);
323 int in2000_queuecommand(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
324 int in2000_abort(Scsi_Cmnd *);
325 void in2000_setup(char *, int *);
326 int in2000_proc_info(char *, char **, off_t, int, int, int);
327 struct proc_dir_entry proc_scsi_in2000;
328
329 #if LINUX_VERSION_CODE >= 0x010300
330 int in2000_biosparam(struct scsi_disk *, kdev_t, int *);
331 #else
332 int in2000_biosparam(Disk *, int, int *);
333 #endif
334 #if LINUX_VERSION_CODE >= 0x010359
335 int in2000_reset(Scsi_Cmnd *, unsigned int);
336 #else
337 int in2000_reset(Scsi_Cmnd *);
338 #endif
339
340
341 #define IN2000_CAN_Q 16
342 #define IN2000_SG SG_ALL
343 #define IN2000_CPL 2
344 #define IN2000_HOST_ID 7
345
346 #if LINUX_VERSION_CODE >= 0x010300
347 #define IN2000 { NULL, \
348 NULL, \
349 &proc_scsi_in2000, \
350 in2000_proc_info, \
351 "Always IN2000", \
352 in2000_detect, \
353 NULL, \
354 NULL, \
355 NULL, \
356 in2000_queuecommand, \
357 in2000_abort, \
358 in2000_reset, \
359 NULL, \
360 in2000_biosparam, \
361 IN2000_CAN_Q, \
362 IN2000_HOST_ID, \
363 IN2000_SG, \
364 IN2000_CPL, \
365 0, \
366 0, \
367 DISABLE_CLUSTERING \
368 }
369
370 #else
371 #define IN2000 { NULL, \
372 NULL, \
373 \
374 \
375 "Always IN2000", \
376 in2000_detect, \
377 NULL, \
378 NULL, \
379 NULL, \
380 in2000_queuecommand, \
381 in2000_abort, \
382 in2000_reset, \
383 NULL, \
384 in2000_biosparam, \
385 IN2000_CAN_Q, \
386 IN2000_HOST_ID, \
387 IN2000_SG, \
388 IN2000_CPL, \
389 0, \
390 0, \
391 DISABLE_CLUSTERING \
392 }
393 #endif
394
395
396 #endif