This source file includes following definitions.
- thread_saved_pc
- start_thread
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8 #ifndef __ASM_MIPS_PROCESSOR_H
9 #define __ASM_MIPS_PROCESSOR_H
10
11 #if !defined (__LANGUAGE_ASSEMBLY__)
12 #include <asm/cachectl.h>
13 #include <asm/mipsregs.h>
14 #include <asm/reg.h>
15 #include <asm/system.h>
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20 extern char wait_available;
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22 extern unsigned long intr_count;
23 extern unsigned long event;
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32 extern int EISA_bus;
33 #define MCA_bus 0
34 #define MCA_bus__is_a_macro
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38
39 #define wp_works_ok 1
40 #define wp_works_ok__is_a_macro
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44
45
46 #define TASK_SIZE (0x80000000UL)
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50
51 #define IO_BITMAP_SIZE 32
52
53 #define NUM_FPU_REGS 32
54
55 struct mips_fpu_hard_struct {
56 double fp_regs[NUM_FPU_REGS];
57 unsigned int control;
58 };
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62
63 struct mips_fpu_soft_struct {
64 long dummy;
65 };
66
67 union mips_fpu_union {
68 struct mips_fpu_hard_struct hard;
69 struct mips_fpu_soft_struct soft;
70 };
71
72 #define INIT_FPU { \
73 {{0,},} \
74 }
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78
79 struct thread_struct {
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83 unsigned long reg16, reg17, reg18, reg19, reg20, reg21, reg22, reg23;
84 unsigned long reg28, reg29, reg30, reg31;
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88 unsigned long cp0_status;
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92 union mips_fpu_union fpu;
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96 unsigned long cp0_badvaddr;
97 unsigned long error_code;
98 unsigned long trap_no;
99 unsigned long ksp;
100 unsigned long pg_dir;
101 #define MF_FIXADE 1
102 unsigned long mflags;
103 };
104
105 #endif
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109
110 #define TOFF_REG16 0
111 #define TOFF_REG17 (TOFF_REG16+4)
112 #define TOFF_REG18 (TOFF_REG17+4)
113 #define TOFF_REG19 (TOFF_REG18+4)
114 #define TOFF_REG20 (TOFF_REG19+4)
115 #define TOFF_REG21 (TOFF_REG20+4)
116 #define TOFF_REG22 (TOFF_REG21+4)
117 #define TOFF_REG23 (TOFF_REG22+4)
118 #define TOFF_REG28 (TOFF_REG23+4)
119 #define TOFF_REG29 (TOFF_REG28+4)
120 #define TOFF_REG30 (TOFF_REG29+4)
121 #define TOFF_REG31 (TOFF_REG30+4)
122 #define TOFF_CP0_STATUS (TOFF_REG31+4)
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124
125
126 #define TOFF_FPU (((TOFF_CP0_STATUS+4)+(8-1))&~(8-1))
127 #define TOFF_CP0_BADVADDR (TOFF_FPU+264)
128 #define TOFF_ERROR_CODE (TOFF_CP0_BADVADDR+4)
129 #define TOFF_TRAP_NO (TOFF_ERROR_CODE+4)
130 #define TOFF_KSP (TOFF_TRAP_NO+4)
131 #define TOFF_PG_DIR (TOFF_KSP+4)
132 #define TOFF_MFLAGS (TOFF_PG_DIR+4)
133
134 #if !defined (__LANGUAGE_ASSEMBLY__)
135
136 #define INIT_MMAP { &init_mm, KSEG0, KSEG1, PAGE_SHARED, \
137 VM_READ | VM_WRITE | VM_EXEC }
138
139 #define INIT_TSS { \
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142 \
143 0, 0, 0, 0, 0, 0, 0, 0, \
144 0, 0, 0, 0, \
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147 \
148 0, \
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151 \
152 INIT_FPU, \
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155 \
156 0, 0, 0, sizeof(init_kernel_stack) + (unsigned long)init_kernel_stack - 8, \
157 (unsigned long) swapper_pg_dir - PT_OFFSET, 0 \
158 }
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163 extern inline unsigned long thread_saved_pc(struct thread_struct *t)
164 {
165 return ((unsigned long *)t->reg29)[EF_CP0_EPC];
166 }
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171 static __inline__
172 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
173 {
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177 sys_cacheflush(0, ~0, BCACHE);
178 sync_mem();
179 regs->cp0_epc = pc;
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183 regs->cp0_status = (regs->cp0_status & ~(ST0_CU0|ST0_KSU)) | KSU_USER;
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188 regs->reg29 = sp;
189 }
190
191 #ifdef __KERNEL__
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197 asmlinkage void resume(struct task_struct *tsk, int offset);
198
199 #define switch_to(n) \
200 resume(n, ((int)(&((struct task_struct *)0)->tss)))
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205 #if defined (__R4000__)
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207 #define USES_USER_TIME(regs) (!((regs)->cp0_status & 0x18))
208
209 #else
210
211 #define USES_USER_TIME(regs) (!((regs)->cp0_status & 0x4))
212
213 #endif
214
215 #endif
216
217 #endif
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225 #define INCOMPATIBLE_MACHINE(m) ((m) != EM_MIPS && (m) != EM_MIPS_RS4_BE)
226 #define ELF_EM_CPU EM_MIPS
227
228 #endif