root/include/asm-sparc/pgtsun4c.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. sun4c_get_synchronous_error
  2. sun4c_get_synchronous_address
  3. sun4c_get_segmap
  4. sun4c_put_segmap
  5. sun4c_get_pte
  6. sun4c_put_pte
  7. sun4c_get_context
  8. sun4c_set_context

   1 /* $Id: pgtsun4c.h,v 1.24 1996/03/26 06:51:56 miguel Exp $
   2  * pgtsun4c.h:  Sun4c specific pgtable.h defines and code.
   3  *
   4  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6 #ifndef _SPARC_PGTSUN4C_H
   7 #define _SPARC_PGTSUN4C_H
   8 
   9 /* PMD_SHIFT determines the size of the area a second-level page table can map */
  10 #define SUN4C_PMD_SHIFT       22
  11 #define SUN4C_PMD_SIZE        (1UL << SUN4C_PMD_SHIFT)
  12 #define SUN4C_PMD_MASK        (~(SUN4C_PMD_SIZE-1))
  13 #define SUN4C_PMD_ALIGN(addr) (((addr)+SUN4C_PMD_SIZE-1)&SUN4C_PMD_MASK)
  14 
  15 /* PGDIR_SHIFT determines what a third-level page table entry can map */
  16 #define SUN4C_PGDIR_SHIFT       22
  17 #define SUN4C_PGDIR_SIZE        (1UL << SUN4C_PGDIR_SHIFT)
  18 #define SUN4C_PGDIR_MASK        (~(SUN4C_PGDIR_SIZE-1))
  19 #define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK)
  20 
  21 /* To represent how the sun4c mmu really lays things out. */
  22 #define SUN4C_REAL_PGDIR_SHIFT       18
  23 #define SUN4C_REAL_PGDIR_SIZE        (1UL << SUN4C_REAL_PGDIR_SHIFT)
  24 #define SUN4C_REAL_PGDIR_MASK        (~(SUN4C_REAL_PGDIR_SIZE-1))
  25 #define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK)
  26 
  27 /*
  28  * To be efficient, and not have to worry about allocating such
  29  * a huge pgd, we make the kernel sun4c tables each hold 1024
  30  * entries and the pgd similarly just like the i386 tables.
  31  */
  32 #define SUN4C_PTRS_PER_PTE    1024
  33 #define SUN4C_PTRS_PER_PMD    1
  34 #define SUN4C_PTRS_PER_PGD    1024
  35 
  36 /* On the sun4c the physical ram limit is 128MB.  We set up our I/O
  37  * translations at KERNBASE + 128MB for 1MB, then we begin the VMALLOC
  38  * area, makes sense.  This works out to the value below.
  39  */
  40 #define SUN4C_VMALLOC_START   (0xfe200000)
  41 
  42 /*
  43  * Sparc SUN4C pte fields.
  44  */
  45 #define _SUN4C_PAGE_VALID     0x80000000   /* valid page */
  46 #define _SUN4C_PAGE_WRITE     0x40000000   /* can be written to */
  47 #define _SUN4C_PAGE_PRIV      0x20000000   /* bit to signify privileged page */
  48 #define _SUN4C_PAGE_USER      0x00000000   /* User page */
  49 #define _SUN4C_PAGE_NOCACHE   0x10000000   /* non-cacheable page */
  50 #define _SUN4C_PAGE_IO        0x04000000   /* I/O page */
  51 #define _SUN4C_PAGE_REF       0x02000000   /* Page has been accessed/referenced */
  52 #define _SUN4C_PAGE_DIRTY     0x01000000   /* Page has been modified, is dirty */
  53 
  54 #define _SUN4C_PAGE_CHG_MASK  (0xffff | _SUN4C_PAGE_REF | _SUN4C_PAGE_DIRTY)
  55 
  56 #define SUN4C_PAGE_NONE     __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_PRIV | \
  57                                      _SUN4C_PAGE_REF)
  58 #define SUN4C_PAGE_SHARED   __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_WRITE | \
  59                                      _SUN4C_PAGE_USER | _SUN4C_PAGE_REF)
  60 #define SUN4C_PAGE_COPY     __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_USER | \
  61                                      _SUN4C_PAGE_REF)
  62 #define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_USER | \
  63                                      _SUN4C_PAGE_REF)
  64 #define SUN4C_PAGE_KERNEL   __pgprot(_SUN4C_PAGE_VALID | _SUN4C_PAGE_WRITE | \
  65                                      _SUN4C_PAGE_PRIV | _SUN4C_PAGE_DIRTY | \
  66                                      _SUN4C_PAGE_REF | _SUN4C_PAGE_NOCACHE)
  67 
  68 extern __inline__ unsigned long sun4c_get_synchronous_error(void)
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  69 {
  70         unsigned long sync_err;
  71 
  72         __asm__ __volatile__("lda [%1] %2, %0\n\t" :
  73                              "=r" (sync_err) :
  74                              "r" (AC_SYNC_ERR), "i" (ASI_CONTROL));
  75         return sync_err;
  76 }
  77 
  78 extern __inline__ unsigned long sun4c_get_synchronous_address(void)
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  79 {
  80         unsigned long sync_addr;
  81 
  82         __asm__ __volatile__("lda [%1] %2, %0\n\t" :
  83                              "=r" (sync_addr) :
  84                              "r" (AC_SYNC_VA), "i" (ASI_CONTROL));
  85         return sync_addr;
  86 }
  87 
  88 /* SUN4C pte, segmap, and context manipulation */
  89 extern __inline__ unsigned long sun4c_get_segmap(unsigned long addr)
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  90 {
  91   register unsigned long entry;
  92 
  93   __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : 
  94                        "=r" (entry) :
  95                        "r" (addr), "i" (ASI_SEGMAP));
  96 
  97   return entry;
  98 }
  99 
 100 extern __inline__ void sun4c_put_segmap(unsigned long addr, unsigned long entry)
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 101 {
 102 
 103   __asm__ __volatile__("\n\tstba %1, [%0] %2\n\t" : :
 104                        "r" (addr), "r" (entry),
 105                        "i" (ASI_SEGMAP));
 106 
 107   return;
 108 }
 109 
 110 extern __inline__ unsigned long sun4c_get_pte(unsigned long addr)
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 111 {
 112   register unsigned long entry;
 113 
 114   __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" : 
 115                        "=r" (entry) :
 116                        "r" (addr), "i" (ASI_PTE));
 117   return entry;
 118 }
 119 
 120 extern __inline__ void sun4c_put_pte(unsigned long addr, unsigned long entry)
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 121 {
 122   __asm__ __volatile__("\n\tsta %1, [%0] %2\n\t" : :
 123                        "r" (addr), 
 124                        "r" (entry), "i" (ASI_PTE));
 125 
 126   return;
 127 }
 128 
 129 extern __inline__ int sun4c_get_context(void)
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 130 {
 131   register int ctx;
 132 
 133   __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :
 134                        "=r" (ctx) :
 135                        "r" (AC_CONTEXT), "i" (ASI_CONTROL));
 136 
 137   return ctx;
 138 }
 139 
 140 extern __inline__ int sun4c_set_context(int ctx)
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 141 {
 142   __asm__ __volatile__("\n\tstba %0, [%1] %2\n\t" : :
 143                        "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL));
 144 
 145   return ctx;
 146 }
 147 
 148 #endif /* !(_SPARC_PGTSUN4C_H) */

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