This source file includes following definitions.
- depca_probe
- depca_hw_init
- depca_open
- depca_init_ring
- depca_start_xmit
- depca_interrupt
- depca_rx
- depca_tx
- depca_close
- LoadCSRs
- InitRestartDepca
- depca_get_stats
- set_multicast_list
- SetMulticastFilter
- isa_probe
- eisa_probe
- alloc_device
- DepcaSignature
- DevicePresent
- get_hw_addr
- load_packet
- EISA_signature
- depca_dbg_open
- depca_ioctl
- init_module
- cleanup_module
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209 static const char *version = "depca.c:v0.422 96/4/29 davies@wanton.lkg.dec.com\n";
210
211 #include <linux/module.h>
212
213 #include <linux/kernel.h>
214 #include <linux/sched.h>
215 #include <linux/string.h>
216 #include <linux/ptrace.h>
217 #include <linux/errno.h>
218 #include <linux/ioport.h>
219 #include <linux/malloc.h>
220 #include <linux/interrupt.h>
221 #include <linux/delay.h>
222 #include <asm/segment.h>
223 #include <asm/bitops.h>
224 #include <asm/io.h>
225 #include <asm/dma.h>
226
227 #include <linux/netdevice.h>
228 #include <linux/etherdevice.h>
229 #include <linux/skbuff.h>
230
231 #include <linux/time.h>
232 #include <linux/types.h>
233 #include <linux/unistd.h>
234
235 #include "depca.h"
236
237 #ifdef DEPCA_DEBUG
238 static int depca_debug = DEPCA_DEBUG;
239 #else
240 static int depca_debug = 1;
241 #endif
242
243 #define DEPCA_NDA 0xffe0
244
245
246
247
248 #define PROBE_LENGTH 32
249 #define ETH_PROM_SIG 0xAA5500FFUL
250
251
252
253
254
255
256
257
258 #define NUM_RX_DESC 8
259 #define NUM_TX_DESC 8
260 #define RX_BUFF_SZ 1536
261 #define TX_BUFF_SZ 1536
262
263 #define CRC_POLYNOMIAL_BE 0x04c11db7UL
264 #define CRC_POLYNOMIAL_LE 0xedb88320UL
265
266
267
268
269 #define DEPCA_EISA_IO_PORTS 0x0c00
270 #define MAX_EISA_SLOTS 16
271 #define EISA_SLOT_INC 0x1000
272
273
274
275
276 #define DEPCA_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0xe0000,0x00000}
277 #define DEPCA_IO_PORTS {0x300, 0x200, 0}
278 #define DEPCA_TOTAL_SIZE 0x10
279 static short mem_chkd = 0;
280
281
282
283
284 #define DEPCA_SIGNATURE {"DEPCA",\
285 "DE100","DE101",\
286 "DE200","DE201","DE202",\
287 "DE210",\
288 "DE422",\
289 ""}
290 static enum {DEPCA, de100, de101, de200, de201, de202, de210, de422, unknown} adapter;
291
292
293
294
295 #define DEPCA_STRLEN 16
296 #define MAX_NUM_DEPCAS 2
297
298
299
300
301
302
303
304 #define ALIGN4 ((u_long)4 - 1)
305 #define ALIGN8 ((u_long)8 - 1)
306 #define ALIGN ALIGN8
307
308
309
310
311 struct depca_rx_desc {
312 volatile s32 base;
313 s16 buf_length;
314 s16 msg_length;
315 };
316
317 struct depca_tx_desc {
318 volatile s32 base;
319 s16 length;
320 s16 misc;
321 };
322
323 #define LA_MASK 0x0000ffff
324
325
326
327
328
329 struct depca_init {
330 u16 mode;
331 u8 phys_addr[ETH_ALEN];
332 u8 mcast_table[8];
333 u32 rx_ring;
334 u32 tx_ring;
335 };
336
337 #define DEPCA_PKT_STAT_SZ 16
338 #define DEPCA_PKT_BIN_SZ 128
339
340 struct depca_private {
341 char devname[DEPCA_STRLEN];
342 char adapter_name[DEPCA_STRLEN];
343 char adapter;
344 struct depca_rx_desc *rx_ring;
345 struct depca_tx_desc *tx_ring;
346 struct depca_init init_block;
347 char *rx_memcpy[NUM_RX_DESC];
348 char *tx_memcpy[NUM_TX_DESC];
349 u_long bus_offset;
350 u_long sh_mem;
351 u_long dma_buffs;
352 int rx_new, tx_new;
353 int rx_old, tx_old;
354 struct enet_statistics stats;
355 struct {
356 u32 bins[DEPCA_PKT_STAT_SZ];
357 u32 unicast;
358 u32 multicast;
359 u32 broadcast;
360 u32 excessive_collisions;
361 u32 tx_underruns;
362 u32 excessive_underruns;
363 } pktStats;
364 int txRingMask;
365 int rxRingMask;
366 s32 rx_rlen;
367 s32 tx_rlen;
368 };
369
370
371
372
373
374
375
376
377 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
378 lp->tx_old+lp->txRingMask-lp->tx_new:\
379 lp->tx_old -lp->tx_new-1)
380
381
382
383
384 static int depca_open(struct device *dev);
385 static int depca_start_xmit(struct sk_buff *skb, struct device *dev);
386 static void depca_interrupt(int irq, void *dev_id, struct pt_regs * regs);
387 static int depca_close(struct device *dev);
388 static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd);
389 static struct enet_statistics *depca_get_stats(struct device *dev);
390 static void set_multicast_list(struct device *dev);
391
392
393
394
395 static int depca_hw_init(struct device *dev, u_long ioaddr);
396 static void depca_init_ring(struct device *dev);
397 static int depca_rx(struct device *dev);
398 static int depca_tx(struct device *dev);
399
400 static void LoadCSRs(struct device *dev);
401 static int InitRestartDepca(struct device *dev);
402 static void DepcaSignature(char *name, u_long paddr);
403 static int DevicePresent(u_long ioaddr);
404 static int get_hw_addr(struct device *dev);
405 static int EISA_signature(char *name, s32 eisa_id);
406 static void SetMulticastFilter(struct device *dev);
407 static void isa_probe(struct device *dev, u_long iobase);
408 static void eisa_probe(struct device *dev, u_long iobase);
409 static struct device *alloc_device(struct device *dev, u_long iobase);
410 static int load_packet(struct device *dev, struct sk_buff *skb);
411 static void depca_dbg_open(struct device *dev);
412
413 #ifdef MODULE
414 int init_module(void);
415 void cleanup_module(void);
416 static int autoprobed = 1, loading_module = 1;
417 # else
418 static u_char de1xx_irq[] = {2,3,4,5,7,9,0};
419 static u_char de2xx_irq[] = {5,9,10,11,15,0};
420 static u_char de422_irq[] = {5,9,10,11,0};
421 static u_char *depca_irq;
422 static int autoprobed = 0, loading_module = 0;
423 #endif
424
425 static char name[DEPCA_STRLEN];
426 static int num_depcas = 0, num_eth = 0;
427 static int mem=0;
428
429 static char *adapter_name = '\0';
430
431
432
433
434
435 #define STOP_DEPCA \
436 outw(CSR0, DEPCA_ADDR);\
437 outw(STOP, DEPCA_DATA)
438
439
440
441 int depca_probe(struct device *dev)
442 {
443 int tmp = num_depcas, status = -ENODEV;
444 u_long iobase = dev->base_addr;
445
446 if ((iobase == 0) && loading_module){
447 printk("Autoprobing is not supported when loading a module based driver.\n");
448 status = -EIO;
449 } else {
450 isa_probe(dev, iobase);
451 eisa_probe(dev, iobase);
452
453 if ((tmp == num_depcas) && (iobase != 0) && loading_module) {
454 printk("%s: depca_probe() cannot find device at 0x%04lx.\n", dev->name,
455 iobase);
456 }
457
458
459
460
461
462 for (; (dev->priv == NULL) && (dev->next != NULL); dev = dev->next);
463
464 if (dev->priv) status = 0;
465 if (iobase == 0) autoprobed = 1;
466 }
467
468 return status;
469 }
470
471 static int
472 depca_hw_init(struct device *dev, u_long ioaddr)
473 {
474 struct depca_private *lp;
475 int i, j, offset, netRAM, mem_len, status=0;
476 s16 nicsr;
477 u_long mem_start=0, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
478
479 STOP_DEPCA;
480
481 nicsr = inb(DEPCA_NICSR);
482 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
483 outb(nicsr, DEPCA_NICSR);
484
485 if (inw(DEPCA_DATA) == STOP) {
486 if (mem == 0) {
487 while (mem_base[mem_chkd]) {
488 mem_start = mem_base[mem_chkd++];
489 DepcaSignature(name, mem_start);
490 if (*name != '\0') break;
491 }
492 } else {
493 mem_start = mem;
494 if (adapter_name) {
495 strcpy(name, adapter_name);
496 } else{
497 DepcaSignature(name, mem_start);
498 }
499 }
500
501 if ((*name != '\0') && mem_start) {
502 dev->base_addr = ioaddr;
503
504 if ((ioaddr&0x0fff)==DEPCA_EISA_IO_PORTS) {
505 printk("%s: %s at 0x%04lx (EISA slot %d)",
506 dev->name, name, ioaddr, (int)((ioaddr>>12)&0x0f));
507 } else {
508 printk("%s: %s at 0x%04lx", dev->name, name, ioaddr);
509 }
510
511 printk(", h/w address ");
512 status = get_hw_addr(dev);
513 for (i=0; i<ETH_ALEN - 1; i++) {
514 printk("%2.2x:", dev->dev_addr[i]);
515 }
516 printk("%2.2x", dev->dev_addr[i]);
517
518 if (status == 0) {
519
520 netRAM = ((adapter != DEPCA) ? 64 : 48);
521 if ((nicsr & _128KB) && (adapter == de422)) netRAM = 128;
522 offset = 0x0000;
523
524
525 if (nicsr & BUF) {
526 offset = 0x8000;
527 nicsr &= ~BS;
528 netRAM -= 32;
529 }
530 mem_start += offset;
531 if ((mem_len = (NUM_RX_DESC*(sizeof(struct depca_rx_desc)+RX_BUFF_SZ) +
532 NUM_TX_DESC*(sizeof(struct depca_tx_desc)+TX_BUFF_SZ) +
533 sizeof(struct depca_init))) <=
534 (netRAM<<10)) {
535 printk(",\n has %dkB RAM at 0x%.5lx", netRAM, mem_start);
536
537
538 if (adapter != DEPCA) {
539 nicsr |= SHE;
540 outb(nicsr, DEPCA_NICSR);
541 }
542
543
544 dev->priv = (void *) kmalloc(sizeof(struct depca_private), GFP_KERNEL);
545 if (dev->priv == NULL)
546 return -ENOMEM;
547 lp = (struct depca_private *)dev->priv;
548 memset((char *)dev->priv, 0, sizeof(struct depca_private));
549 lp->adapter = adapter;
550 sprintf(lp->adapter_name,"%s (%s)", name, dev->name);
551 request_region(ioaddr, DEPCA_TOTAL_SIZE, lp->adapter_name);
552
553
554 lp->sh_mem = mem_start;
555 mem_start += sizeof(struct depca_init);
556
557
558 mem_start = (mem_start + ALIGN) & ~ALIGN;
559 lp->rx_ring = (struct depca_rx_desc *)mem_start;
560
561 mem_start += (sizeof(struct depca_rx_desc) * NUM_RX_DESC);
562 lp->tx_ring = (struct depca_tx_desc *)mem_start;
563
564 mem_start += (sizeof(struct depca_tx_desc) * NUM_TX_DESC);
565 lp->bus_offset = mem_start & 0x00ff0000;
566 mem_start &= LA_MASK;
567
568 lp->dma_buffs = mem_start;
569
570
571 lp->rxRingMask = NUM_RX_DESC - 1;
572 lp->txRingMask = NUM_TX_DESC - 1;
573
574
575 for (i=0, j = lp->rxRingMask; j>0; i++) {
576 j >>= 1;
577 }
578 lp->rx_rlen = (s32)(i << 29);
579 for (i=0, j = lp->txRingMask; j>0; i++) {
580 j >>= 1;
581 }
582 lp->tx_rlen = (s32)(i << 29);
583
584
585 depca_init_ring(dev);
586
587
588 LoadCSRs(dev);
589
590
591 nicsr = ((nicsr & ~IM)|IEN);
592 outb(nicsr, DEPCA_NICSR);
593
594
595
596 if (dev->irq < 2) {
597 #ifndef MODULE
598 unsigned char irqnum;
599 autoirq_setup(0);
600
601
602 switch (lp->adapter) {
603 case DEPCA:
604 case de100:
605 case de101:
606 depca_irq = de1xx_irq;
607 break;
608 case de200:
609 case de201:
610 case de202:
611 case de210:
612 depca_irq = de2xx_irq;
613 break;
614 case de422:
615 depca_irq = de422_irq;
616 break;
617 }
618
619
620 outw(INEA | INIT, DEPCA_DATA);
621
622 irqnum = autoirq_report(1);
623 if (!irqnum) {
624 printk(" and failed to detect IRQ line.\n");
625 status = -ENXIO;
626 } else {
627 for (dev->irq=0,i=0; (depca_irq[i]) && (!dev->irq); i++) {
628 if (irqnum == depca_irq[i]) {
629 dev->irq = irqnum;
630 printk(" and uses IRQ%d.\n", dev->irq);
631 }
632 }
633
634 if (!dev->irq) {
635 printk(" but incorrect IRQ line detected.\n");
636 status = -ENXIO;
637 }
638 }
639 #endif
640 } else {
641 printk(" and assigned IRQ%d.\n", dev->irq);
642 }
643 if (status) release_region(ioaddr, DEPCA_TOTAL_SIZE);
644 } else {
645 printk(",\n requests %dkB RAM: only %dkB is available!\n",
646 (mem_len>>10), netRAM);
647 status = -ENXIO;
648 }
649 } else {
650 printk(" which has an Ethernet PROM CRC error.\n");
651 status = -ENXIO;
652 }
653 }
654 if (!status) {
655 if (depca_debug > 0) {
656 printk(version);
657 }
658
659
660 dev->open = &depca_open;
661 dev->hard_start_xmit = &depca_start_xmit;
662 dev->stop = &depca_close;
663 dev->get_stats = &depca_get_stats;
664 dev->set_multicast_list = &set_multicast_list;
665 dev->do_ioctl = &depca_ioctl;
666
667 dev->mem_start = 0;
668
669
670 ether_setup(dev);
671 } else {
672 if (dev->priv) {
673 kfree_s(dev->priv, sizeof(struct depca_private));
674 dev->priv = NULL;
675 }
676 }
677 } else {
678 status = -ENXIO;
679 }
680
681 return status;
682 }
683
684
685 static int
686 depca_open(struct device *dev)
687 {
688 struct depca_private *lp = (struct depca_private *)dev->priv;
689 u_long ioaddr = dev->base_addr;
690 s16 nicsr;
691 int status = 0;
692
693 irq2dev_map[dev->irq] = dev;
694 STOP_DEPCA;
695 nicsr = inb(DEPCA_NICSR);
696
697
698 if (adapter != DEPCA) {
699 nicsr |= SHE;
700 outb(nicsr, DEPCA_NICSR);
701 }
702
703
704 depca_init_ring(dev);
705 LoadCSRs(dev);
706
707 depca_dbg_open(dev);
708
709 if (request_irq(dev->irq, &depca_interrupt, 0, lp->adapter_name, NULL)) {
710 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
711 status = -EAGAIN;
712 } else {
713
714
715 nicsr = ((nicsr & ~IM & ~LED)|IEN);
716 outb(nicsr, DEPCA_NICSR);
717 outw(CSR0,DEPCA_ADDR);
718
719 dev->tbusy = 0;
720 dev->interrupt = 0;
721 dev->start = 1;
722
723 status = InitRestartDepca(dev);
724
725 if (depca_debug > 1){
726 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
727 printk("nicsr: 0x%02x\n",inb(DEPCA_NICSR));
728 }
729 }
730
731 MOD_INC_USE_COUNT;
732
733 return status;
734 }
735
736
737 static void
738 depca_init_ring(struct device *dev)
739 {
740 struct depca_private *lp = (struct depca_private *)dev->priv;
741 u_int i;
742 u_long p;
743
744
745 set_bit(0, (void *)&dev->tbusy);
746
747 lp->rx_new = lp->tx_new = 0;
748 lp->rx_old = lp->tx_old = 0;
749
750
751 for (i = 0; i <= lp->rxRingMask; i++) {
752 writel((p=lp->dma_buffs+i*RX_BUFF_SZ) | R_OWN, &lp->rx_ring[i].base);
753 writew(-RX_BUFF_SZ, &lp->rx_ring[i].buf_length);
754 lp->rx_memcpy[i]=(char *)(p+lp->bus_offset);
755 }
756 for (i = 0; i <= lp->txRingMask; i++) {
757 writel((p=lp->dma_buffs+(i+lp->txRingMask+1)*TX_BUFF_SZ) & 0x00ffffff,
758 &lp->tx_ring[i].base);
759 lp->tx_memcpy[i]=(char *)(p+lp->bus_offset);
760 }
761
762
763 lp->init_block.rx_ring = ((u32)((u_long)lp->rx_ring)&LA_MASK) | lp->rx_rlen;
764 lp->init_block.tx_ring = ((u32)((u_long)lp->tx_ring)&LA_MASK) | lp->tx_rlen;
765
766 SetMulticastFilter(dev);
767
768 for (i = 0; i < ETH_ALEN; i++) {
769 lp->init_block.phys_addr[i] = dev->dev_addr[i];
770 }
771
772 lp->init_block.mode = 0x0000;
773
774 return;
775 }
776
777
778
779
780 static int
781 depca_start_xmit(struct sk_buff *skb, struct device *dev)
782 {
783 struct depca_private *lp = (struct depca_private *)dev->priv;
784 u_long ioaddr = dev->base_addr;
785 int status = 0;
786
787
788 if (dev->tbusy) {
789 int tickssofar = jiffies - dev->trans_start;
790 if (tickssofar < 1*HZ) {
791 status = -1;
792 } else {
793 printk("%s: transmit timed out, status %04x, resetting.\n",
794 dev->name, inw(DEPCA_DATA));
795
796 STOP_DEPCA;
797 depca_init_ring(dev);
798 LoadCSRs(dev);
799 dev->interrupt = UNMASK_INTERRUPTS;
800 dev->start = 1;
801 dev->tbusy=0;
802 dev->trans_start = jiffies;
803 InitRestartDepca(dev);
804 }
805 return status;
806 } else if (skb == NULL) {
807 dev_tint(dev);
808 } else if (skb->len > 0) {
809
810 if (set_bit(0, (void*)&dev->tbusy) != 0) {
811 printk("%s: Transmitter access conflict.\n", dev->name);
812 status = -1;
813 } else {
814 if (TX_BUFFS_AVAIL) {
815 status = load_packet(dev, skb);
816
817 if (!status) {
818
819 outw(CSR0, DEPCA_ADDR);
820 outw(INEA | TDMD, DEPCA_DATA);
821
822 dev->trans_start = jiffies;
823 dev_kfree_skb(skb, FREE_WRITE);
824 }
825 if (TX_BUFFS_AVAIL) {
826 dev->tbusy=0;
827 }
828 } else {
829 status = -1;
830 }
831 }
832 }
833
834 return status;
835 }
836
837
838
839
840 static void
841 depca_interrupt(int irq, void *dev_id, struct pt_regs * regs)
842 {
843 struct device *dev = (struct device *)(irq2dev_map[irq]);
844 struct depca_private *lp;
845 s16 csr0, nicsr;
846 u_long ioaddr;
847
848 if (dev == NULL) {
849 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
850 } else {
851 lp = (struct depca_private *)dev->priv;
852 ioaddr = dev->base_addr;
853
854 if (dev->interrupt)
855 printk("%s: Re-entering the interrupt handler.\n", dev->name);
856
857 dev->interrupt = MASK_INTERRUPTS;
858
859
860 nicsr = inb(DEPCA_NICSR);
861 nicsr |= (IM|LED);
862 outb(nicsr, DEPCA_NICSR);
863
864 outw(CSR0, DEPCA_ADDR);
865 csr0 = inw(DEPCA_DATA);
866
867
868 outw(csr0 & INTE, DEPCA_DATA);
869
870 if (csr0 & RINT)
871 depca_rx(dev);
872
873 if (csr0 & TINT)
874 depca_tx(dev);
875
876 if ((TX_BUFFS_AVAIL >= 0) && dev->tbusy) {
877 dev->tbusy = 0;
878 mark_bh(NET_BH);
879 }
880
881
882 nicsr = (nicsr & ~IM & ~LED);
883 outb(nicsr, DEPCA_NICSR);
884
885 dev->interrupt = UNMASK_INTERRUPTS;
886 }
887
888 return;
889 }
890
891 static int
892 depca_rx(struct device *dev)
893 {
894 struct depca_private *lp = (struct depca_private *)dev->priv;
895 int i, entry;
896 s32 status;
897
898 for (entry=lp->rx_new;
899 !(readl(&lp->rx_ring[entry].base) & R_OWN);
900 entry=lp->rx_new){
901 status = readl(&lp->rx_ring[entry].base) >> 16 ;
902 if (status & R_STP) {
903 lp->rx_old = entry;
904 }
905 if (status & R_ENP) {
906 if (status & R_ERR) {
907 lp->stats.rx_errors++;
908 if (status & R_FRAM) lp->stats.rx_frame_errors++;
909 if (status & R_OFLO) lp->stats.rx_over_errors++;
910 if (status & R_CRC) lp->stats.rx_crc_errors++;
911 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
912 } else {
913 short len, pkt_len = readw(&lp->rx_ring[entry].msg_length);
914 struct sk_buff *skb;
915
916 skb = dev_alloc_skb(pkt_len+2);
917 if (skb != NULL) {
918 unsigned char *buf;
919 skb_reserve(skb,2);
920 buf = skb_put(skb,pkt_len);
921 skb->dev = dev;
922 if (entry < lp->rx_old) {
923 len = (lp->rxRingMask - lp->rx_old + 1) * RX_BUFF_SZ;
924 memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], len);
925 memcpy_fromio(buf + len, lp->rx_memcpy[0], pkt_len-len);
926 } else {
927 memcpy_fromio(buf, lp->rx_memcpy[lp->rx_old], pkt_len);
928 }
929
930
931
932
933
934 skb->protocol=eth_type_trans(skb,dev);
935 netif_rx(skb);
936
937
938
939
940 lp->stats.rx_packets++;
941 for (i=1; i<DEPCA_PKT_STAT_SZ-1; i++) {
942 if (pkt_len < (i*DEPCA_PKT_BIN_SZ)) {
943 lp->pktStats.bins[i]++;
944 i = DEPCA_PKT_STAT_SZ;
945 }
946 }
947 if (buf[0] & 0x01) {
948 if ((*(s16 *)&buf[0] == -1) &&
949 (*(s16 *)&buf[2] == -1) &&
950 (*(s16 *)&buf[4] == -1)) {
951 lp->pktStats.broadcast++;
952 } else {
953 lp->pktStats.multicast++;
954 }
955 } else if ((*(s16 *)&buf[0] == *(s16 *)&dev->dev_addr[0]) &&
956 (*(s16 *)&buf[2] == *(s16 *)&dev->dev_addr[2]) &&
957 (*(s16 *)&buf[4] == *(s16 *)&dev->dev_addr[4])) {
958 lp->pktStats.unicast++;
959 }
960
961 lp->pktStats.bins[0]++;
962 if (lp->pktStats.bins[0] == 0) {
963 memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats));
964 }
965 } else {
966 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
967 lp->stats.rx_dropped++;
968 break;
969 }
970 }
971
972 for (; lp->rx_old!=entry; lp->rx_old=(++lp->rx_old)&lp->rxRingMask) {
973 writel(readl(&lp->rx_ring[lp->rx_old].base) | R_OWN,
974 &lp->rx_ring[lp->rx_old].base);
975 }
976 writel(readl(&lp->rx_ring[entry].base) | R_OWN, &lp->rx_ring[entry].base);
977 }
978
979
980
981
982 lp->rx_new = (++lp->rx_new) & lp->rxRingMask;
983 }
984
985 return 0;
986 }
987
988
989
990
991 static int
992 depca_tx(struct device *dev)
993 {
994 struct depca_private *lp = (struct depca_private *)dev->priv;
995 int entry;
996 s32 status;
997 u_long ioaddr = dev->base_addr;
998
999 for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) {
1000 status = readl(&lp->tx_ring[entry].base) >> 16 ;
1001
1002 if (status < 0) {
1003 break;
1004 } else if (status & T_ERR) {
1005 status = readl(&lp->tx_ring[entry].misc);
1006 lp->stats.tx_errors++;
1007 if (status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1008 if (status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1009 if (status & TMD3_LCOL) lp->stats.tx_window_errors++;
1010 if (status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1011 if (status & (TMD3_BUFF | TMD3_UFLO)) {
1012
1013 outw(CSR0, DEPCA_ADDR);
1014 outw(INEA | TDMD, DEPCA_DATA);
1015 }
1016 } else if (status & (T_MORE | T_ONE)) {
1017 lp->stats.collisions++;
1018 } else {
1019 lp->stats.tx_packets++;
1020 }
1021
1022
1023 lp->tx_old = (++lp->tx_old) & lp->txRingMask;
1024 }
1025
1026 return 0;
1027 }
1028
1029 static int
1030 depca_close(struct device *dev)
1031 {
1032 struct depca_private *lp = (struct depca_private *)dev->priv;
1033 s16 nicsr;
1034 u_long ioaddr = dev->base_addr;
1035
1036 dev->start = 0;
1037 dev->tbusy = 1;
1038
1039 outw(CSR0, DEPCA_ADDR);
1040
1041 if (depca_debug > 1) {
1042 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1043 dev->name, inw(DEPCA_DATA));
1044 }
1045
1046
1047
1048
1049
1050 outw(STOP, DEPCA_DATA);
1051
1052
1053
1054
1055 if (lp->adapter != DEPCA) {
1056 nicsr = inb(DEPCA_NICSR);
1057 nicsr &= ~SHE;
1058 outb(nicsr, DEPCA_NICSR);
1059 }
1060
1061
1062
1063
1064 free_irq(dev->irq, NULL);
1065 irq2dev_map[dev->irq] = NULL;
1066
1067 MOD_DEC_USE_COUNT;
1068
1069 return 0;
1070 }
1071
1072 static void LoadCSRs(struct device *dev)
1073 {
1074 struct depca_private *lp = (struct depca_private *)dev->priv;
1075 u_long ioaddr = dev->base_addr;
1076
1077 outw(CSR1, DEPCA_ADDR);
1078 outw((u16)(lp->sh_mem & LA_MASK), DEPCA_DATA);
1079 outw(CSR2, DEPCA_ADDR);
1080 outw((u16)((lp->sh_mem & LA_MASK) >> 16), DEPCA_DATA);
1081 outw(CSR3, DEPCA_ADDR);
1082 outw(ACON, DEPCA_DATA);
1083
1084 outw(CSR0, DEPCA_ADDR);
1085
1086 return;
1087 }
1088
1089 static int InitRestartDepca(struct device *dev)
1090 {
1091 struct depca_private *lp = (struct depca_private *)dev->priv;
1092 u_long ioaddr = dev->base_addr;
1093 int i, status=0;
1094
1095
1096 memcpy_toio((char *)lp->sh_mem, &lp->init_block, sizeof(struct depca_init));
1097
1098 outw(CSR0, DEPCA_ADDR);
1099 outw(INIT, DEPCA_DATA);
1100
1101
1102 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1103
1104 if (i!=100) {
1105
1106 outw(IDON | INEA | STRT, DEPCA_DATA);
1107 if (depca_debug > 2) {
1108 printk("%s: DEPCA open after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1109 dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1110 }
1111 } else {
1112 printk("%s: DEPCA unopen after %d ticks, init block 0x%08lx csr0 %4.4x.\n",
1113 dev->name, i, lp->sh_mem, inw(DEPCA_DATA));
1114 status = -1;
1115 }
1116
1117 return status;
1118 }
1119
1120 static struct enet_statistics *
1121 depca_get_stats(struct device *dev)
1122 {
1123 struct depca_private *lp = (struct depca_private *)dev->priv;
1124
1125
1126
1127 return &lp->stats;
1128 }
1129
1130
1131
1132
1133 static void
1134 set_multicast_list(struct device *dev)
1135 {
1136 struct depca_private *lp = (struct depca_private *)dev->priv;
1137 u_long ioaddr = dev->base_addr;
1138
1139 if (irq2dev_map[dev->irq] != NULL) {
1140 while(dev->tbusy);
1141 set_bit(0, (void*)&dev->tbusy);
1142 while(lp->tx_old != lp->tx_new);
1143
1144 STOP_DEPCA;
1145 depca_init_ring(dev);
1146
1147 if (dev->flags & IFF_PROMISC) {
1148 lp->init_block.mode |= PROM;
1149 } else {
1150 SetMulticastFilter(dev);
1151 lp->init_block.mode &= ~PROM;
1152 }
1153
1154 LoadCSRs(dev);
1155 InitRestartDepca(dev);
1156 dev->tbusy = 0;
1157 }
1158 }
1159
1160
1161
1162
1163
1164
1165
1166 static void SetMulticastFilter(struct device *dev)
1167 {
1168 struct depca_private *lp = (struct depca_private *)dev->priv;
1169 struct dev_mc_list *dmi=dev->mc_list;
1170 char *addrs;
1171 int i, j, bit, byte;
1172 u16 hashcode;
1173 s32 crc, poly = CRC_POLYNOMIAL_BE;
1174
1175 if (dev->flags & IFF_ALLMULTI) {
1176 for (i=0; i<(HASH_TABLE_LEN>>3); i++) {
1177 lp->init_block.mcast_table[i] = (char)0xff;
1178 }
1179 } else {
1180 for (i=0; i<(HASH_TABLE_LEN>>3); i++){
1181 lp->init_block.mcast_table[i]=0;
1182 }
1183
1184 for (i=0;i<dev->mc_count;i++) {
1185 addrs=dmi->dmi_addr;
1186 dmi=dmi->next;
1187 if ((*addrs & 0x01) == 1) {
1188 crc = 0xffffffff;
1189 for (byte=0;byte<ETH_ALEN;byte++) {
1190
1191 for (bit = *addrs++,j=0;j<8;j++, bit>>=1) {
1192 crc = (crc << 1) ^ ((((crc<0?1:0) ^ bit) & 0x01) ? poly : 0);
1193 }
1194 }
1195 hashcode = (crc & 1);
1196 for (j=0;j<5;j++) {
1197 hashcode = (hashcode << 1) | ((crc>>=1) & 1);
1198 }
1199
1200
1201 byte = hashcode >> 3;
1202 bit = 1 << (hashcode & 0x07);
1203 lp->init_block.mcast_table[byte] |= bit;
1204 }
1205 }
1206 }
1207
1208 return;
1209 }
1210
1211
1212
1213
1214 static void isa_probe(struct device *dev, u_long ioaddr)
1215 {
1216 int i = num_depcas, maxSlots;
1217 s32 ports[] = DEPCA_IO_PORTS;
1218
1219 if (!ioaddr && autoprobed) return ;
1220 if (ioaddr > 0x400) return;
1221 if (i >= MAX_NUM_DEPCAS) return;
1222
1223 if (ioaddr == 0) {
1224 maxSlots = MAX_NUM_DEPCAS;
1225 } else {
1226 ports[i] = ioaddr;
1227 maxSlots = i + 1;
1228 }
1229
1230 for (; (i<maxSlots) && (dev!=NULL) && ports[i]; i++) {
1231 if (DevicePresent(ports[i]) == 0) {
1232 if (check_region(ports[i], DEPCA_TOTAL_SIZE) == 0) {
1233 if ((dev = alloc_device(dev, ports[i])) != NULL) {
1234 if (depca_hw_init(dev, ports[i]) == 0) {
1235 num_depcas++;
1236 }
1237 num_eth++;
1238 }
1239 } else if (autoprobed) {
1240 printk("%s: region already allocated at 0x%04x.\n", dev->name,ports[i]);
1241 }
1242 }
1243 }
1244
1245 return;
1246 }
1247
1248
1249
1250
1251
1252 static void eisa_probe(struct device *dev, u_long ioaddr)
1253 {
1254 int i, maxSlots;
1255 u_long iobase;
1256 char name[DEPCA_STRLEN];
1257
1258 if (!ioaddr && autoprobed) return ;
1259 if ((ioaddr < 0x400) && (ioaddr > 0)) return;
1260
1261 if (ioaddr == 0) {
1262 iobase = EISA_SLOT_INC;
1263 i = 1;
1264 maxSlots = MAX_EISA_SLOTS;
1265 } else {
1266 iobase = ioaddr;
1267 i = (ioaddr >> 12);
1268 maxSlots = i + 1;
1269 }
1270 if ((iobase & 0x0fff) == 0) iobase += DEPCA_EISA_IO_PORTS;
1271
1272 for (; (i<maxSlots) && (dev!=NULL); i++, iobase+=EISA_SLOT_INC) {
1273 if (EISA_signature(name, EISA_ID)) {
1274 if (DevicePresent(iobase) == 0) {
1275 if (check_region(iobase, DEPCA_TOTAL_SIZE) == 0) {
1276 if ((dev = alloc_device(dev, iobase)) != NULL) {
1277 if (depca_hw_init(dev, iobase) == 0) {
1278 num_depcas++;
1279 }
1280 num_eth++;
1281 }
1282 } else if (autoprobed) {
1283 printk("%s: region already allocated at 0x%04lx.\n",dev->name,iobase);
1284 }
1285 }
1286 }
1287 }
1288
1289 return;
1290 }
1291
1292
1293
1294
1295
1296 static struct device *alloc_device(struct device *dev, u_long iobase)
1297 {
1298 int addAutoProbe = 0;
1299 struct device *tmp = NULL, *ret;
1300 int (*init)(struct device *) = NULL;
1301
1302
1303
1304
1305 if (!loading_module) {
1306 while (dev->next != NULL) {
1307 if ((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0)) break;
1308 dev = dev->next;
1309 num_eth++;
1310 }
1311
1312
1313
1314
1315
1316 if ((dev->base_addr == 0) && (num_depcas > 0)) {
1317 addAutoProbe++;
1318 tmp = dev->next;
1319 init = dev->init;
1320 }
1321
1322
1323
1324
1325
1326 if ((dev->next == NULL) &&
1327 !((dev->base_addr == DEPCA_NDA) || (dev->base_addr == 0))){
1328 dev->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1329 GFP_KERNEL);
1330
1331 dev = dev->next;
1332 if (dev == NULL) {
1333 printk("eth%d: Device not initialised, insufficient memory\n",
1334 num_eth);
1335 } else {
1336
1337
1338
1339
1340
1341 dev->name = (char *)(dev + 1);
1342 if (num_eth > 9999) {
1343 sprintf(dev->name,"eth????");
1344 } else {
1345 sprintf(dev->name,"eth%d", num_eth);
1346 }
1347 dev->base_addr = iobase;
1348 dev->next = NULL;
1349 dev->init = &depca_probe;
1350 num_depcas++;
1351 }
1352 }
1353 ret = dev;
1354
1355
1356
1357
1358
1359 if (ret != NULL) {
1360 if (addAutoProbe) {
1361 for (;(tmp->next!=NULL) && (tmp->base_addr!=DEPCA_NDA); tmp=tmp->next);
1362
1363
1364
1365
1366
1367 if ((tmp->next == NULL) && !(tmp->base_addr == DEPCA_NDA)) {
1368 tmp->next = (struct device *)kmalloc(sizeof(struct device) + 8,
1369 GFP_KERNEL);
1370 tmp = tmp->next;
1371 if (tmp == NULL) {
1372 printk("%s: Insufficient memory to extend the device list.\n",
1373 dev->name);
1374 } else {
1375
1376
1377
1378
1379
1380 tmp->name = (char *)(tmp + 1);
1381 if (num_eth > 9999) {
1382 sprintf(tmp->name,"eth????");
1383 } else {
1384 sprintf(tmp->name,"eth%d", num_eth);
1385 }
1386 tmp->base_addr = 0;
1387 tmp->next = NULL;
1388 tmp->init = init;
1389 }
1390 } else {
1391 tmp->base_addr = 0;
1392 }
1393 }
1394 }
1395 } else {
1396 ret = dev;
1397 }
1398
1399 return ret;
1400 }
1401
1402
1403
1404
1405
1406
1407 static void DepcaSignature(char *name, u_long paddr)
1408 {
1409 u_int i,j,k;
1410 const char *signatures[] = DEPCA_SIGNATURE;
1411 char tmpstr[16];
1412
1413 for (i=0;i<16;i++) {
1414 tmpstr[i] = readb(paddr+0xc000+i);
1415 }
1416
1417 strcpy(name,"");
1418 for (i=0;*signatures[i]!='\0' && *name=='\0';i++) {
1419 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {
1420 if (signatures[i][k] == tmpstr[j]) {
1421 k++;
1422 } else {
1423 k=0;
1424 }
1425 }
1426 if (k == strlen(signatures[i])) {
1427 strcpy(name,signatures[i]);
1428 }
1429 }
1430
1431 adapter = i - 1;
1432
1433 return;
1434 }
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451 static int DevicePresent(u_long ioaddr)
1452 {
1453 union {
1454 struct {
1455 u32 a;
1456 u32 b;
1457 } llsig;
1458 char Sig[sizeof(u32) << 1];
1459 } dev;
1460 short sigLength=0;
1461 s8 data;
1462 s16 nicsr;
1463 int i, j, status = 0;
1464
1465 data = inb(DEPCA_PROM);
1466 data = inb(DEPCA_PROM);
1467
1468 if (data == 0x08) {
1469 nicsr = inb(DEPCA_NICSR);
1470 nicsr |= AAC;
1471 outb(nicsr, DEPCA_NICSR);
1472 }
1473
1474 dev.llsig.a = ETH_PROM_SIG;
1475 dev.llsig.b = ETH_PROM_SIG;
1476 sigLength = sizeof(u32) << 1;
1477
1478 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
1479 data = inb(DEPCA_PROM);
1480 if (dev.Sig[j] == data) {
1481 j++;
1482 } else {
1483 if (data == dev.Sig[0]) {
1484 j=1;
1485 } else {
1486 j=0;
1487 }
1488 }
1489 }
1490
1491 if (j!=sigLength) {
1492 status = -ENODEV;
1493 }
1494
1495 return status;
1496 }
1497
1498
1499
1500
1501
1502
1503 static int get_hw_addr(struct device *dev)
1504 {
1505 u_long ioaddr = dev->base_addr;
1506 int i, k, tmp, status = 0;
1507 u_short j, x, chksum;
1508
1509 x = (((adapter == de100) || (adapter == de101)) ? 1 : 0);
1510
1511 for (i=0,k=0,j=0;j<3;j++) {
1512 k <<= 1 ;
1513 if (k > 0xffff) k-=0xffff;
1514
1515 k += (u_char) (tmp = inb(DEPCA_PROM + x));
1516 dev->dev_addr[i++] = (u_char) tmp;
1517 k += (u_short) ((tmp = inb(DEPCA_PROM + x)) << 8);
1518 dev->dev_addr[i++] = (u_char) tmp;
1519
1520 if (k > 0xffff) k-=0xffff;
1521 }
1522 if (k == 0xffff) k=0;
1523
1524 chksum = (u_char) inb(DEPCA_PROM + x);
1525 chksum |= (u_short) (inb(DEPCA_PROM + x) << 8);
1526 if (k != chksum) status = -1;
1527
1528 return status;
1529 }
1530
1531
1532
1533
1534 static int load_packet(struct device *dev, struct sk_buff *skb)
1535 {
1536 struct depca_private *lp = (struct depca_private *)dev->priv;
1537 int i, entry, end, len, status = 0;
1538
1539 entry = lp->tx_new;
1540 end = (entry + (skb->len - 1) / TX_BUFF_SZ) & lp->txRingMask;
1541 if (!(readl(&lp->tx_ring[end].base) & T_OWN)) {
1542
1543
1544
1545
1546 if (end < entry) {
1547 len = (lp->txRingMask - entry + 1) * TX_BUFF_SZ;
1548 memcpy_toio(lp->tx_memcpy[entry], skb->data, len);
1549 memcpy_toio(lp->tx_memcpy[0], skb->data + len, skb->len - len);
1550 } else {
1551 memcpy_toio(lp->tx_memcpy[entry], skb->data, skb->len);
1552 }
1553
1554
1555 len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
1556 for (i = entry; i != end; i = (++i) & lp->txRingMask) {
1557
1558 writel(readl(&lp->tx_ring[i].base) & ~T_FLAGS, &lp->tx_ring[i].base);
1559 writew(0x0000, &lp->tx_ring[i].misc);
1560 writew(-TX_BUFF_SZ, &lp->tx_ring[i].length);
1561 len -= TX_BUFF_SZ;
1562 }
1563
1564 writel(readl(&lp->tx_ring[end].base) & ~T_FLAGS, &lp->tx_ring[end].base);
1565 writew(0x0000, &lp->tx_ring[end].misc);
1566 writew(-len, &lp->tx_ring[end].length);
1567
1568
1569 writel(readl(&lp->tx_ring[entry].base) | T_STP, &lp->tx_ring[entry].base);
1570
1571 writel(readl(&lp->tx_ring[end].base) | T_ENP, &lp->tx_ring[end].base);
1572
1573 for (i=end; i!=entry; --i) {
1574
1575 writel(readl(&lp->tx_ring[i].base) | T_OWN, &lp->tx_ring[i].base);
1576 if (i == 0) i=lp->txRingMask+1;
1577 }
1578 writel(readl(&lp->tx_ring[entry].base) | T_OWN, &lp->tx_ring[entry].base);
1579
1580 lp->tx_new = (++end) & lp->txRingMask;
1581 } else {
1582 status = -1;
1583 }
1584
1585 return status;
1586 }
1587
1588
1589
1590
1591 static int EISA_signature(char *name, s32 eisa_id)
1592 {
1593 u_int i;
1594 const char *signatures[] = DEPCA_SIGNATURE;
1595 char ManCode[DEPCA_STRLEN];
1596 union {
1597 s32 ID;
1598 char Id[4];
1599 } Eisa;
1600 int status = 0;
1601
1602 *name = '\0';
1603 Eisa.ID = inl(eisa_id);
1604
1605 ManCode[0]=(((Eisa.Id[0]>>2)&0x1f)+0x40);
1606 ManCode[1]=(((Eisa.Id[1]&0xe0)>>5)+((Eisa.Id[0]&0x03)<<3)+0x40);
1607 ManCode[2]=(((Eisa.Id[2]>>4)&0x0f)+0x30);
1608 ManCode[3]=(( Eisa.Id[2]&0x0f)+0x30);
1609 ManCode[4]=(((Eisa.Id[3]>>4)&0x0f)+0x30);
1610 ManCode[5]='\0';
1611
1612 for (i=0;(*signatures[i] != '\0') && (*name == '\0');i++) {
1613 if (strstr(ManCode, signatures[i]) != NULL) {
1614 strcpy(name,ManCode);
1615 status = 1;
1616 }
1617 }
1618
1619 return status;
1620 }
1621
1622 static void depca_dbg_open(struct device *dev)
1623 {
1624 struct depca_private *lp = (struct depca_private *)dev->priv;
1625 u_long ioaddr = dev->base_addr;
1626 struct depca_init *p = (struct depca_init *)lp->sh_mem;
1627 int i;
1628
1629 if (depca_debug > 1){
1630
1631 memcpy_toio((char *)lp->sh_mem,&lp->init_block,sizeof(struct depca_init));
1632
1633 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
1634 printk("Descriptor head addresses:\n");
1635 printk("\t0x%lx 0x%lx\n",(u_long)lp->rx_ring, (u_long)lp->tx_ring);
1636 printk("Descriptor addresses:\nRX: ");
1637 for (i=0;i<lp->rxRingMask;i++){
1638 if (i < 3) {
1639 printk("0x%8.8lx ", (long) &lp->rx_ring[i].base);
1640 }
1641 }
1642 printk("...0x%8.8lx\n", (long) &lp->rx_ring[i].base);
1643 printk("TX: ");
1644 for (i=0;i<lp->txRingMask;i++){
1645 if (i < 3) {
1646 printk("0x%8.8lx ", (long) &lp->tx_ring[i].base);
1647 }
1648 }
1649 printk("...0x%8.8lx\n", (long) &lp->tx_ring[i].base);
1650 printk("\nDescriptor buffers:\nRX: ");
1651 for (i=0;i<lp->rxRingMask;i++){
1652 if (i < 3) {
1653 printk("0x%8.8x ", readl(&lp->rx_ring[i].base));
1654 }
1655 }
1656 printk("...0x%8.8x\n", readl(&lp->rx_ring[i].base));
1657 printk("TX: ");
1658 for (i=0;i<lp->txRingMask;i++){
1659 if (i < 3) {
1660 printk("0x%8.8x ", readl(&lp->tx_ring[i].base));
1661 }
1662 }
1663 printk("...0x%8.8x\n", readl(&lp->tx_ring[i].base));
1664 printk("Initialisation block at 0x%8.8lx\n",lp->sh_mem);
1665 printk("\tmode: 0x%4.4x\n",readw(&p->mode));
1666 printk("\tphysical address: ");
1667 for (i=0;i<ETH_ALEN-1;i++){
1668 printk("%2.2x:",(u_char)readb(&p->phys_addr[i]));
1669 }
1670 printk("%2.2x\n",(u_char)readb(&p->phys_addr[i]));
1671 printk("\tmulticast hash table: ");
1672 for (i=0;i<(HASH_TABLE_LEN >> 3)-1;i++){
1673 printk("%2.2x:",(u_char)readb(&p->mcast_table[i]));
1674 }
1675 printk("%2.2x\n",(u_char)readb(&p->mcast_table[i]));
1676 printk("\trx_ring at: 0x%8.8x\n",readl(&p->rx_ring));
1677 printk("\ttx_ring at: 0x%8.8x\n",readl(&p->tx_ring));
1678 printk("dma_buffs: 0x%8.8lx\n",lp->dma_buffs);
1679 printk("Ring size:\nRX: %d Log2(rxRingMask): 0x%8.8x\n",
1680 (int)lp->rxRingMask + 1,
1681 lp->rx_rlen);
1682 printk("TX: %d Log2(txRingMask): 0x%8.8x\n",
1683 (int)lp->txRingMask + 1,
1684 lp->tx_rlen);
1685 outw(CSR2,DEPCA_ADDR);
1686 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
1687 outw(CSR1,DEPCA_ADDR);
1688 printk("%4.4x\n",inw(DEPCA_DATA));
1689 outw(CSR3,DEPCA_ADDR);
1690 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
1691 }
1692
1693 return;
1694 }
1695
1696
1697
1698
1699
1700
1701 static int depca_ioctl(struct device *dev, struct ifreq *rq, int cmd)
1702 {
1703 struct depca_private *lp = (struct depca_private *)dev->priv;
1704 struct depca_ioctl *ioc = (struct depca_ioctl *) &rq->ifr_data;
1705 int i, status = 0;
1706 u_long ioaddr = dev->base_addr;
1707 union {
1708 u8 addr[(HASH_TABLE_LEN * ETH_ALEN)];
1709 u16 sval[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1710 u32 lval[(HASH_TABLE_LEN * ETH_ALEN) >> 2];
1711 } tmp;
1712
1713 switch(ioc->cmd) {
1714 case DEPCA_GET_HWADDR:
1715 for (i=0; i<ETH_ALEN; i++) {
1716 tmp.addr[i] = dev->dev_addr[i];
1717 }
1718 ioc->len = ETH_ALEN;
1719 if (!(status = verify_area(VERIFY_WRITE, (void *)ioc->data, ioc->len))) {
1720 memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1721 }
1722
1723 break;
1724 case DEPCA_SET_HWADDR:
1725 if (suser()) {
1726 if (!(status = verify_area(VERIFY_READ, (void *)ioc->data, ETH_ALEN))) {
1727 memcpy_fromfs(tmp.addr,ioc->data,ETH_ALEN);
1728 for (i=0; i<ETH_ALEN; i++) {
1729 dev->dev_addr[i] = tmp.addr[i];
1730 }
1731 while(dev->tbusy);
1732 set_bit(0, (void*)&dev->tbusy);
1733 while(lp->tx_old != lp->tx_new);
1734
1735 STOP_DEPCA;
1736 depca_init_ring(dev);
1737 LoadCSRs(dev);
1738 InitRestartDepca(dev);
1739 dev->tbusy = 0;
1740 }
1741 } else {
1742 status = -EPERM;
1743 }
1744
1745 break;
1746 case DEPCA_SET_PROM:
1747 if (suser()) {
1748 while(dev->tbusy);
1749 set_bit(0, (void*)&dev->tbusy);
1750 while(lp->tx_old != lp->tx_new);
1751
1752 STOP_DEPCA;
1753 depca_init_ring(dev);
1754 lp->init_block.mode |= PROM;
1755
1756 LoadCSRs(dev);
1757 InitRestartDepca(dev);
1758 dev->tbusy = 0;
1759 } else {
1760 status = -EPERM;
1761 }
1762
1763 break;
1764 case DEPCA_CLR_PROM:
1765 if (suser()) {
1766 while(dev->tbusy);
1767 set_bit(0, (void*)&dev->tbusy);
1768 while(lp->tx_old != lp->tx_new);
1769
1770 STOP_DEPCA;
1771 depca_init_ring(dev);
1772 lp->init_block.mode &= ~PROM;
1773
1774 LoadCSRs(dev);
1775 InitRestartDepca(dev);
1776 dev->tbusy = 0;
1777 } else {
1778 status = -EPERM;
1779 }
1780
1781 break;
1782 case DEPCA_SAY_BOO:
1783 printk("%s: Boo!\n", dev->name);
1784
1785 break;
1786 case DEPCA_GET_MCA:
1787 ioc->len = (HASH_TABLE_LEN >> 3);
1788 if (!(status = verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1789 memcpy_tofs(ioc->data, lp->init_block.mcast_table, ioc->len);
1790 }
1791
1792 break;
1793 case DEPCA_SET_MCA:
1794 if (suser()) {
1795 if (!(status=verify_area(VERIFY_READ, ioc->data, ETH_ALEN*ioc->len))) {
1796 memcpy_fromfs(tmp.addr, ioc->data, ETH_ALEN * ioc->len);
1797 set_multicast_list(dev);
1798 }
1799 } else {
1800 status = -EPERM;
1801 }
1802
1803 break;
1804 case DEPCA_CLR_MCA:
1805 if (suser()) {
1806 set_multicast_list(dev);
1807 } else {
1808 status = -EPERM;
1809 }
1810
1811 break;
1812 case DEPCA_MCA_EN:
1813 if (suser()) {
1814 set_multicast_list(dev);
1815 } else {
1816 status = -EPERM;
1817 }
1818
1819 break;
1820 case DEPCA_GET_STATS:
1821 cli();
1822 ioc->len = sizeof(lp->pktStats);
1823 if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1824 memcpy_tofs(ioc->data, &lp->pktStats, ioc->len);
1825 }
1826 sti();
1827
1828 break;
1829 case DEPCA_CLR_STATS:
1830 if (suser()) {
1831 cli();
1832 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1833 sti();
1834 } else {
1835 status = -EPERM;
1836 }
1837
1838 break;
1839 case DEPCA_GET_REG:
1840 i=0;
1841 tmp.sval[i++] = inw(DEPCA_NICSR);
1842 outw(CSR0, DEPCA_ADDR);
1843 tmp.sval[i++] = inw(DEPCA_DATA);
1844 memcpy(&tmp.sval[i], &lp->init_block, sizeof(struct depca_init));
1845 ioc->len = i+sizeof(struct depca_init);
1846 if (!(status=verify_area(VERIFY_WRITE, ioc->data, ioc->len))) {
1847 memcpy_tofs(ioc->data, tmp.addr, ioc->len);
1848 }
1849
1850 break;
1851 default:
1852 status = -EOPNOTSUPP;
1853 }
1854
1855 return status;
1856 }
1857
1858 #ifdef MODULE
1859 static char devicename[9] = { 0, };
1860 static struct device thisDepca = {
1861 devicename,
1862 0, 0, 0, 0,
1863 0x200, 7,
1864 0, 0, 0, NULL, depca_probe };
1865
1866 static int irq=7;
1867 static int io=0x200;
1868
1869
1870 int
1871 init_module(void)
1872 {
1873 thisDepca.irq=irq;
1874 thisDepca.base_addr=io;
1875
1876 if (register_netdev(&thisDepca) != 0)
1877 return -EIO;
1878
1879 return 0;
1880 }
1881
1882 void
1883 cleanup_module(void)
1884 {
1885 if (thisDepca.priv) {
1886 kfree(thisDepca.priv);
1887 thisDepca.priv = NULL;
1888 }
1889 thisDepca.irq=0;
1890
1891 unregister_netdev(&thisDepca);
1892 release_region(thisDepca.base_addr, DEPCA_TOTAL_SIZE);
1893 }
1894 #endif
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1896
1897
1898
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1900
1901
1902
1903