1 /* depca.c: A DIGITAL DEPCA ethernet driver for linux. 2
3 Written 1994 by David C. Davies. 4
5 Copyright 1994 David C. Davies and United States Government as 6 represented by the Director, National Security Agency. This software 7 may be used and distributed according to the terms of the GNU Public 8 License, incorporated herein by reference. 9
10 This driver is written for the Digital Equipment Corporation series 11 of DEPCA ethernet cards: 12
13 DE100 DEPCA 14 DE200 DEPCA Turbo 15 DE202 DEPCA Turbo (TP BNC) 16 DE210 DEPCA 17
18 The driver has been tested on DE100 and DE20x cards in a relatively busy 19 network. 20
21 The author may be reached as davies@wanton.enet.dec.com or 22 Digital Equipment Corporation, 146 Main Street, Maynard MA 01754. 23
24 ========================================================================= 25 The driver was based on the 'lance.c' driver from Donald Becker which is 26 included with the standard driver distribution for linux. Modifications 27 were made to most routines and the hardware recognition routines were 28 written from scratch. Primary references used were: 29
30 1) Lance.c code in /linux/drivers/net/ 31 2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook", 32 AMD, 1992 [(800) 222-9323]. 33 3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 34 AMD, Pub. #17881, May 1993. 35 4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA", 36 AMD, Pub. #16907, May 1992 37 5) "DEC EtherWORKS LC Ethernet Controller Owners Manual", 38 Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003 39 6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual", 40 Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003 41 7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR 42 Digital Equipment Corporation, 1989 43 8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual", 44 Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001 45 46 Peter Bauer's depca.c (V0.5) was referred to when debugging this driver. 47 The hash filter code was derived from Reference 3 and has been tested 48 only to the extent that the Table A-1, page A-7, was confirmed to fill 49 the filter bit positions correctly. Hash filtering is not yet 50 implemented in the current driver set. 51
52 The DE200 series boards have on-board 64kB RAM for use as a shared 53 memory network buffer. Only the DE100 cards make use of a 2kB buffer 54 mode which has not been implemented in this driver (only the 32kB and 55 64kB modes are supported). 56
57 At the most only 2 DEPCA cards can be supported because there is only 58 provision for two I/O base addresses on the cards (0x300 and 0x200). The 59 base address is 'autoprobed' by looking for the self test PROM and 60 detecting the card name. The shared memory base address is decoded by 61 'autoprobing' the Ethernet PROM address information. The second DEPCA is 62 detected and information placed in the base_addr variable of the next 63 device structure (which is created if necessary), thus enabling 64 ethif_probe initialization for the device. 65
66 ************************************************************************ 67
68 NOTE: If you are using two DEPCAs, it is important that you assign the 69 base memory addresses correctly. The driver autoprobes I/O 0x300 then 70 0x200. The base memory address for the first device must be less than 71 that of the second so that the auto probe will correctly assign the I/O 72 and memory addresses on the same card. I can't think of a way to do 73 this unambiguously at the moment, since there is nothing on the cards to 74 tie I/O and memory information together. 75
76 I am unable to test 2 DEPCAs together for now, so this code is 77 unchecked. All reports, good or bad, are welcome. 78
79 ************************************************************************ 80
81 The board IRQ setting must be at an unused IRQ which is auto-probed 82 using Donald Becker's autoprobe routines. DE100 board IRQs are 83 {2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is 84 really IRQ9 in machines with 16 IRQ lines. 85
86 No 16MB memory limitation should exist with this driver as DMA is not 87 used and the common memory area is in low memory on the network card (my 88 current system has 20MB and I've not had problems yet). 89
90 The DE203, DE204 and DE205 cards may also work with this driver (I 91 haven't tested them so I don't know). If you have one of these cards, 92 place the name in the DEPCA_SIGNATURE string around line 160, recompile 93 the kernel and reboot. Check if the card is recognised and works - mail 94 me if so, so that I can add it into the list of supported cards! 95
96 TO DO: 97 ------ 98
99 1. Implement the 2k buffer mode - does anyone need it?? 100
101 Revision History 102 ---------------- 103
104 Version Date Description 105 106 0.1 25-jan-94 Initial writing 107 0.2 27-jan-94 Added LANCE TX buffer chaining 108 0.3 1-feb-94 Added multiple DEPCA support 109 0.31 4-feb-94 Added DE202 recognition 110 0.32 19-feb-94 Tidy up. Improve multi-DEPCA support. 111
112 ========================================================================= 113 */ 114
115 staticchar *version = "depca.c:v0.32 2/19/94 davies@wanton.enet.dec.com\n";
116
117 #include <stdarg.h>
118 #include <linux/config.h>
119 #include <linux/kernel.h>
120 #include <linux/sched.h>
121 #include <linux/string.h>
122 #include <linux/ptrace.h>
123 #include <linux/errno.h>
124 #include <linux/ioport.h>
125 #include <linux/malloc.h>
126 #include <linux/interrupt.h>
127 #include <asm/bitops.h>
128 #include <asm/io.h>
129 #include <asm/dma.h>
130
131 #include "dev.h"
132 #include "iow.h"
133 #include "eth.h"
134 #include "skbuff.h"
135 #include "arp.h"
136 #include "depca.h"
137
138 #ifdefDEPCA_DEBUG 139 intdepca_debug = DEPCA_DEBUG;
140 #else 141 intdepca_debug = 1;
142 #endif 143
144 #ifndefDEPCA_IRQ 145 /*#define DEPCA_IRQ {5,9,10,11,15,0}*/ 146 #defineDEPCA_IRQ 5
147 #endif 148
149 #ifndefPROBE_LENGTH 150 #definePROBE_LENGTH 32
151 #endif 152
153 #ifndefPROBE_SEQUENCE 154 #definePROBE_SEQUENCE "FF0055AAFF0055AA"
155 #endif 156
157 #ifndefDEPCA_SIGNATURE 158 #defineDEPCA_SIGNATURE{"DEPCA","DE100","DE200","DE202","DE210",""} 159 #defineDEPCA_NAME_LENGTH 8
160 #endif 161
162 #ifndefDEPCA_RAM_BASE_ADDRESSES 163 #defineDEPCA_RAM_BASE_ADDRESSES{0xc0000,0xd0000,0xe0000,0x00000} 164 #endif 165 staticshortmem_chkd = 0; /* holds which base addrs have been */ 166 /* checked, for multi-DEPCA case */ 167
168 #ifndefDEPCA_IO_PORTS 169 #defineDEPCA_IO_PORTS{0x300, 0x200, 0} 170 #endif 171
172 #ifndefDEPCA_TOTAL_SIZE 173 #defineDEPCA_TOTAL_SIZE 0x10
174 #endif 175
176 #ifndefMAX_NUM_DEPCAS 177 #defineMAX_NUM_DEPCAS 2
178 #endif 179
180 /* 181 ** Set the number of Tx and Rx buffers. 182 */ 183 #ifndef DEPCA_BUFFER_LOG_SZ
184 #defineRING_SIZE 16 /* 16 buffers */ 185 #else 186 #defineRING_SIZE (1 << (DEPCA_BUFFERS_LOG_SZ))
187 #endif/* DEPCA_BUFFER_LOG_SZ */ 188
189 #definePKT_BUF_SZ 1544 /* Buffer size for each Tx/Rx buffer */ 190 #definePKT_SZ 1514 /* Maximum ethernet packet length */ 191 #defineDAT_SZ 1500 /* Maximum ethernet data length */ 192 #definePKT_HDR_LEN 14 /* Addresses and data length info */ 193
194 #ifdefHAVE_MULTICAST 195 #ifndefCRC_POLYNOMIAL 196 #defineCRC_POLYNOMIAL 0x04c11db7 /* Ethernet CRC polynomial */ 197 #endif/* CRC_POLYNOMIAL */ 198 #endif/* HAVE_MULTICAST */ 199
200 #ifndefHAVE_ALLOC_SKB 201 #definealloc_skb(size, priority) (structsk_buff *) kmalloc(size,priority)
202 #definekfree_skbmem(buff, size) kfree_s(buff,size)
203 #endif/* HAVE_ALLOC_SKB */ 204
205 /* 206 ** The DEPCA Rx and Tx ring descriptors. 207 */ 208 structdepca_rx_head{ 209 longbase;
210 shortbuf_length; /* This length is negative 2's complement! */ 211 shortmsg_length; /* This length is "normal". */ 212 };
213
214 structdepca_tx_head{ 215 longbase;
216 shortlength; /* This length is negative 2's complement! */ 217 shortmisc; /* Errors and TDR info */ 218 };
219
220 struct depca_ring_info { 221 };
222
223 /* 224 ** The Lance initialization block, described in databook, in common memory. 225 */ 226 structdepca_init{ 227 unsignedshortmode; /* Mode register */ 228 unsignedcharphys_addr[ETH_ALEN]; /* Physical ethernet address */ 229 unsignedshortfilter[4]; /* Multicast filter. */ 230 unsignedlongrx_ring; /* Rx ring base pointer & ring length */ 231 unsignedlongtx_ring; /* Tx ring base pointer & ring length */ 232 };
233
234 structdepca_private{ 235 chardevname[8]; /* Not used */ 236 structdepca_rx_head *rx_ring; /* Pointer to start of RX descriptor ring */ 237 structdepca_tx_head *tx_ring; /* Pointer to start of TX descriptor ring */ 238 structdepca_initinit_block;/* Initialization block */ 239 longdma_buffs; /* Start address of Rx and Tx buffers. */ 240 intcur_rx, cur_tx; /* The next free ring entry */ 241 intdirty_rx, dirty_tx; /* The ring entries to be free()ed. */ 242 intdma;
243 structenet_statisticsstats;
244 char old_depca;
245 shortringSize; /* ring size based on available memory */ 246 shortrmask; /* modulus mask based on ring size */ 247 longrlen; /* log2(ringSize) for the descriptors */ 248 };
249
250 /* 251 ** Public Functions 252 */ 253 staticintdepca_open(structdevice *dev);
254 staticintdepca_start_xmit(structsk_buff *skb, structdevice *dev);
255 staticvoiddepca_interrupt(intreg_ptr);
256 staticintdepca_close(structdevice *dev);
257 staticstructenet_statistics *depca_get_stats(structdevice *dev);
258 #ifdefHAVE_MULTICAST 259 staticvoidset_multicast_list(structdevice *dev, intnum_addrs, void *addrs);
260 #endif 261
262 /* 263 ** Private functions 264 */ 265 staticintdepca_probe1(structdevice *dev, shortioaddr);
266 staticvoiddepca_init_ring(structdevice *dev);
267 staticintdepca_rx(structdevice *dev);
268 staticintdepca_tx(structdevice *dev);
269
270 staticvoidLoadCSRs(structdevice *dev);
271 staticintInitRestartDepca(structdevice *dev);
272 staticchar *DepcaSignature(unsignedlongmem_addr);
273 staticintDevicePresent(shortioaddr);
274 #ifdefHAVE_MULTICAST 275 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table);
276 #endif 277
278 staticintnum_depcas = 0, num_eth = 0;;
279
280 /* 281 ** Miscellaneous defines... 282 */ 283 #defineSTOP_DEPCA \
284 outw(CSR0, DEPCA_ADDR);\
285 outw(STOP, DEPCA_DATA)
286
287
288
289 intdepca_probe(structdevice *dev)
/* */ 290 { 291 int *port, ports[] = DEPCA_IO_PORTS;
292 intbase_addr = dev->base_addr;
293 intstatus;
294 structdevice *eth0 = (structdevice *) NULL;
295
296 if (base_addr > 0x1ff) {/* Check a single specified location. */ 297 status = depca_probe1(dev, base_addr);
298 }elseif (base_addr > 0) {/* Don't probe at all. */ 299 status = -ENXIO;
300 }else{/* First probe for the DEPCA test */ 301 /* pattern in ROM */ 302
303 for (status = -ENODEV, port = &ports[0];
304 *port && (num_depcas < MAX_NUM_DEPCAS); port++) { 305 intioaddr = *port;
306
307 #ifdefHAVE_PORTRESERVE 308 if (check_region(ioaddr, DEPCA_TOTAL_SIZE))
309 continue;
310 #endif 311 if (DevicePresent(DEPCA_PROM) == 0) { 312 if (num_depcas > 0) {/* only gets here in autoprobe */ 313
314 /* 315 ** Check the device structures for an end of list or unused device 316 */ 317 while (dev->next != (structdevice *)NULL) { 318 if (dev->next->base_addr == 0xffe0) break;
319 dev = dev->next; /* walk through eth device list */ 320 num_eth++; /* increment eth device number */ 321 } 322
323 /* 324 ** If no more device structures, malloc one up. If memory could 325 ** not be allocated, print an error message. 326 ** 327 */ 328 if (dev->next == (structdevice *)NULL) { 329 dev->next = (structdevice *)kmalloc(sizeof(structdevice) + 8,
330 GFP_KERNEL);
331 }else{ 332 printk("eth%d: Device not initialised, insufficient memory\n",
333 num_eth);
334 } 335
336 /* 337 ** If the memory was allocated, point to the new memory area 338 ** and initialize it (name, I/O address, next device (NULL) and 339 ** initialisation probe routine). 340 */ 341 if ((dev->next != (structdevice *)NULL) &&
342 (num_eth > 0) && (num_eth < 9999)) { 343 dev = dev->next; /* point to the new device */ 344 dev->name = (char *)(dev + sizeof(structdevice));
345 sprintf(dev->name,"eth%d", num_eth); /* New device name */ 346 dev->base_addr = ioaddr; /* assign the io address */ 347 dev->next = (structdevice *)NULL; /* mark the end of list */ 348 dev->init = &depca_probe;/* initialisation routine */ 349 } 350 }else{ 351 eth0 = dev; /* remember the first device */ 352 status = depca_probe1(dev, ioaddr);
353 } 354 num_depcas++;
355 num_eth++;
356 } 357 } 358 if (eth0) dev = eth0; /* restore the first device */ 359 } 360
361 if (status) dev->base_addr = base_addr;
362
363 returnstatus; /* ENODEV would be more accurate. */ 364 } 365
366 staticint 367 depca_probe1(structdevice *dev, shortioaddr)
/* */ 368 { 369 structdepca_private *lp;
370 inti,j, status=0;
371 unsignedlongmem_start, mem_base[] = DEPCA_RAM_BASE_ADDRESSES;
372 char *name=(char *)NULL;
373 intnicsr, offset;
374
375
376 /* 377 ** Stop the DEPCA. Enable the DBR ROM. Disable interrupts and remote boot 378 */ 379 STOP_DEPCA;
380
381 nicsr = inw(DEPCA_NICSR);
382 nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
383 outw(nicsr, DEPCA_NICSR);
384
385 if (inw(DEPCA_DATA) == STOP) { 386
387 /* Now find out what kind of DEPCA we have. The DE100 uses a different 388 ** addressing scheme for some registers compared to the DE2xx series. 389 ** Note that a base address location is marked as checked if no DEPCA is 390 ** there or one is found (when the search is immediately terminated). This 391 ** shortens the search time a little for multiple DEPCAs. 392 */ 393
394 for (j = 0, i = 0; mem_base[i] && (j == 0);) { 395 if (((mem_chkd >> i) & 0x01) == 0) {/* has the memory been checked? */ 396 name = DepcaSignature(mem_base[i]);/* check for a DEPCA here */ 397 mem_chkd |= (0x01 << i); /* mark location checked */ 398 if (*name != (char)NULL) {/* one found? */ 399 j = 1; /* set exit flag */ 400 }else{ 401 i++; /* increment search index */ 402 } 403 } 404 } 405
406 if (*name != (char)NULL) {/* found a DEPCA device */ 407 mem_start = mem_base[i];
408 dev->base_addr = ioaddr;
409
410 printk("%s: DEPCA at %#3x is a %s, ", dev->name, ioaddr, name);
411
412 /* There is a 32 byte station address PROM at DEPCA_PROM address. 413 The first six bytes are the station address. They can be read 414 directly since the signature search set up the ROM address 415 counter correctly just before this function. 416
417 For the DE100 we have to be careful about which port is used to 418 read the ROM info. 419 */ 420
421 if (strstr(name,"DE100")!=(char *)NULL) { 422 j = 1;
423 }else{ 424 j = 0;
425 } 426
427 printk("ethernet address ");
428 for (i = 0; i < ETH_ALEN - 1; i++) {/* get the ethernet address */ 429 printk("%2.2x:", dev->dev_addr[i] = inb(DEPCA_PROM + j));
430 } 431 printk("%2.2x", dev->dev_addr[i] = inb(DEPCA_PROM + j));
432
433 for (;i<32;i++) {/* leave ROM counter in known state */ 434 j=inb(DEPCA_PROM);
435 } 436
437 #ifdefHAVE_PORTRESERVE 438 snarf_region(ioaddr, DEPCA_TOTAL_SIZE);
439 #endif 440
441 /* 442 ** Determine the base address for the DEPCA RAM from the NI-CSR 443 ** and make up a DEPCA-specific-data structure. 444 */ 445
446 if (nicsr & BUF) { 447 offset = 0x8000; /* 32kbyte RAM */ 448 nicsr &= ~BS; /* DEPCA RAM in top 32k */ 449 printk(",\n with 32kB RAM");
450 }else{ 451 offset = 0x0000; /* 64kbyte RAM */ 452 printk(",\n with 64kB RAM");
453 } 454
455 mem_start += offset;
456 printk(" starting at 0x%.5lx", mem_start);
457
458 /* 459 ** Enable the shadow RAM. 460 */ 461 nicsr |= SHE;
462 outw(nicsr, DEPCA_NICSR);
463
464 /* 465 ** Calculate the ring size based on the available RAM 466 ** found above. Allocate an equal number of buffers, each 467 ** of size PKT_BUF_SZ (1544 bytes) to the Tx and Rx. Make sure 468 ** that this ring size is <= RING_SIZE. The ring size must be 469 ** a power of 2. 470 */ 471
472 j = ((0x10000 - offset) / PKT_BUF_SZ) >> 1;
473 for (i=0;j>1;i++) { 474 j >>= 1;
475 } 476
477 /* Hold the ring size information here before the depca 478 ** private structure is allocated. Need this for the memory 479 ** space calculations. 480 */ 481 j = 1 << i;
482
483 /* 484 ** Set up memory information in the device structure. 485 ** Align the descriptor rings on an 8 byte (quadword) boundary. 486 ** 487 ** depca_private area 488 ** rx ring descriptors 489 ** tx ring descriptors 490 ** rx buffers 491 ** tx buffers 492 ** 493 */ 494
495 /* private area & initialise */ 496 dev->priv = (void *)((mem_start + 0x07) & ~0x07);
497 lp = (structdepca_private *)dev->priv;
498 memset(dev->priv, 0, sizeof(structdepca_private));
499
500 /* Tx & Rx descriptors (aligned to a quadword boundary) */ 501 mem_start = ((((unsignedlong)dev->priv +
502 sizeof(structdepca_private)) +
503 (unsignedlong)0x07) & (unsignedlong)~0x07);
504 lp->rx_ring = (structdepca_rx_head *)mem_start;
505
506 mem_start += (sizeof(structdepca_rx_head) * j);
507 lp->tx_ring = (structdepca_tx_head *)mem_start;
508
509 mem_start += (sizeof(structdepca_tx_head) * j);
510 lp->dma_buffs = mem_start & 0x00ffffff;
511
512 mem_start += (PKT_BUF_SZ * j);
513 /* (mem_start now points to the start of the Tx buffers) */ 514
515 /* Initialise the data structures */ 516 memset(lp->rx_ring, 0, sizeof(structdepca_rx_head)*j);
517 memset(lp->tx_ring, 0, sizeof(structdepca_tx_head)*j);
518
519 /* This should never happen. */ 520 if ((int)(lp->rx_ring) & 0x07) { 521 printk("\n **ERROR** DEPCA Rx and Tx descriptor rings not on a quadword boundary.\n");
522 return -ENXIO;
523 } 524
525 /* 526 ** Finish initialising the ring information. 527 */ 528 lp->ringSize = j;
529 if (lp->ringSize > RING_SIZE) lp->ringSize = RING_SIZE;
530 lp->rmask = lp->ringSize - 1;
531
532 /* 533 ** calculate the real RLEN size for the descriptors. It is 534 ** log2(ringSize). 535 */ 536 for (i=0, j = lp->ringSize; j>1; i++) { 537 j >>= 1;
538 } 539 lp->rlen = (unsignedlong)(i << 29);
540
541 /* 542 ** load the initialisation block 543 */ 544 depca_init_ring(dev);
545
546 /* 547 ** Initialise the control and status registers 548 */ 549 LoadCSRs(dev);
550
551 /* 552 ** Enable DEPCA board interrupts for autoprobing 553 */ 554 nicsr = ((nicsr & ~IM)|IEN);
555 outw(nicsr, DEPCA_NICSR);
556
557 /* The DMA channel may be passed in on this parameter. */ 558 dev->dma = 0;
559
560 /* To auto-IRQ we enable the initialization-done and DMA err, 561 interrupts. For now we will always get a DMA error. */ 562 if (dev->irq < 2) { 563 autoirq_setup(0);
564
565 /* Trigger an initialization just for the interrupt. */ 566 outw(INEA | INIT, DEPCA_DATA);
567
568 dev->irq = autoirq_report(1);
569 if (dev->irq) { 570 printk(" and probed IRQ%d.\n", dev->irq);
571 }else{ 572 printk(". Failed to detect IRQ line.\n");
573 status = -EAGAIN;
574 } 575 }else{ 576 printk(". Assigned IRQ%d.\n", dev->irq);
577 } 578 }else{ 579 status = -ENXIO;
580 } 581 if (!status) { 582 if (depca_debug > 0) { 583 printk(version);
584 } 585
586 /* The DEPCA-specific entries in the device structure. */ 587 dev->open = &depca_open;
588 dev->hard_start_xmit = &depca_start_xmit;
589 dev->stop = &depca_close;
590 dev->get_stats = &depca_get_stats;
591 #ifdefHAVE_MULTICAST 592 dev->set_multicast_list = &set_multicast_list;
593 #endif 594
595 dev->mem_start = 0;
596
597 /* Fill in the generic field of the device structure. */ 598 for (i = 0; i < DEV_NUMBUFFS; i++) { 599 dev->buffs[i] = NULL;
600 } 601
602 dev->hard_header = eth_header;
603 dev->add_arp = eth_add_arp;
604 dev->queue_xmit = dev_queue_xmit;
605 dev->rebuild_header = eth_rebuild_header;
606 dev->type_trans = eth_type_trans;
607
608 dev->type = ARPHRD_ETHER;
609 dev->hard_header_len = ETH_HLEN;
610 dev->mtu = 1500; /* eth_mtu */ 611 dev->addr_len = ETH_ALEN;
612
613 for (i = 0; i < dev->addr_len; i++) { 614 dev->broadcast[i]=0xff;
615 } 616
617 /* New-style flags. */ 618 dev->flags = IFF_BROADCAST;
619 dev->family = AF_INET;
620 dev->pa_addr = 0;
621 dev->pa_brdaddr = 0;
622 dev->pa_mask = 0;
623 dev->pa_alen = sizeof(unsignedlong);
624 } 625 }else{ 626 status = -ENXIO;
627 } 628
629 returnstatus;
630 } 631
632
633 staticint 634 depca_open(structdevice *dev)
/* */ 635 { 636 structdepca_private *lp = (structdepca_private *)dev->priv;
637 inti,nicsr,ioaddr = dev->base_addr;
638
639 if (request_irq(dev->irq, &depca_interrupt)) { 640 printk("depca_open(): Requested IRQ%d is busy\n",dev->irq);
641 return -EAGAIN;
642 } 643
644 irq2dev_map[dev->irq] = dev;
645
646 /* 647 ** Stop the DEPCA & get the board status information. 648 */ 649 STOP_DEPCA;
650 nicsr = inw(DEPCA_NICSR);
651
652 /* 653 ** Re-initialize the DEPCA... 654 */ 655 depca_init_ring(dev); /* initialize the descriptor rings */ 656 LoadCSRs(dev);
657
658 if (depca_debug > 1){ 659 printk("%s: depca open with irq %d\n",dev->name,dev->irq);
660 printk("Descriptor head addresses:\n");
661 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring,(long)lp->tx_ring);
662 printk("Descriptor addresses:\n");
663 for (i=0;i<lp->ringSize;i++){ 664 printk("\t0x%8.8lx 0x%8.8lx\n",(long)&lp->rx_ring[i].base,
665 (long)&lp->tx_ring[i].base);
666 } 667 printk("Buffer addresses:\n");
668 for (i=0;i<lp->ringSize;i++){ 669 printk("\t0x%8.8lx 0x%8.8lx\n",(long)lp->rx_ring[i].base,
670 (long)lp->tx_ring[i].base);
671 } 672 printk("Initialisation block at 0x%8.8lx\n",(long)&lp->init_block);
673 printk("\tmode: 0x%4.4x\n",lp->init_block.mode);
674 printk("\tphysical address: ");
675 for (i=0;i<6;i++){ 676 printk("%2.2x:",(short)lp->init_block.phys_addr[i]);
677 } 678 printk("\n\tlogical address filter: 0x");
679 for (i=0;i<4;i++){ 680 printk("%2.2x",(short)lp->init_block.filter[i]);
681 } 682 printk("\n\trx_ring at: 0x%8.8lx\n",(long)lp->init_block.rx_ring);
683 printk("\ttx_ring at: 0x%8.8lx\n",(long)lp->init_block.tx_ring);
684 printk("dma_buffs: 0x%8.8lx\n",(long)lp->dma_buffs);
685 printk("Ring size: %d\nMask: 0x%2.2x\nLog2(ringSize): 0x%8.8lx\n",
686 (short)lp->ringSize,
687 (char)lp->rmask,
688 (long)lp->rlen);
689 outw(CSR2,DEPCA_ADDR);
690 printk("CSR2&1: 0x%4.4x",inw(DEPCA_DATA));
691 outw(CSR1,DEPCA_ADDR);
692 printk("%4.4x\n",inw(DEPCA_DATA));
693 outw(CSR3,DEPCA_ADDR);
694 printk("CSR3: 0x%4.4x\n",inw(DEPCA_DATA));
695 } 696
697 /* 698 ** Enable DEPCA board interrupts 699 */ 700 nicsr = ((nicsr & ~IM & ~LED)|SHE|IEN);
701 outw(nicsr, DEPCA_NICSR);
702 outw(CSR0,DEPCA_ADDR);
703
704 dev->tbusy = 0;
705 dev->interrupt = 0;
706 dev->start = 1;
707
708 InitRestartDepca(dev); /* ignore the return status */ 709
710 if (depca_debug > 1){ 711 printk("CSR0: 0x%4.4x\n",inw(DEPCA_DATA));
712 printk("nicsr: 0x%4.4x\n",inw(DEPCA_NICSR));
713 } 714
715 return 0; /* Always succeed */ 716 } 717
718 /* Initialize the lance Rx and Tx descriptor rings. */ 719 staticvoid 720 depca_init_ring(structdevice *dev)
/* */ 721 { 722 structdepca_private *lp = (structdepca_private *)dev->priv;
723 unsignedlongi;
724
725 lp->init_block.mode = DTX | DRX; /* Disable Rx and Tx. */ 726 lp->cur_rx = lp->cur_tx = 0;
727 lp->dirty_rx = lp->dirty_tx = 0;
728
729 /* Initialize the base addresses and length of each buffer in the ring */ 730 for (i = 0; i < lp->ringSize; i++) { 731 lp->rx_ring[i].base = (lp->dma_buffs + i*PKT_BUF_SZ) | R_OWN;
732 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
733 lp->tx_ring[i].base = (lp->dma_buffs + (i+lp->ringSize) * PKT_BUF_SZ) &
734 (unsignedlong)(0x00ffffff);
735 } 736
737 /* Set up the initialization block */ 738 for (i = 0; i < ETH_ALEN; i++) { 739 lp->init_block.phys_addr[i] = dev->dev_addr[i];
740 } 741 for (i = 0; i < 4; i++) { 742 lp->init_block.filter[i] = 0x0000;
743 } 744 lp->init_block.rx_ring = (unsignedlong)lp->rx_ring | lp->rlen;
745 lp->init_block.tx_ring = (unsignedlong)lp->tx_ring | lp->rlen;
746
747 lp->init_block.mode = 0x0000; /* Enable the Tx and Rx */ 748 } 749
750 /* 751 ** Writes a socket buffer to TX descriptor ring and starts transmission 752 */ 753 staticint 754 depca_start_xmit(structsk_buff *skb, structdevice *dev)
/* */ 755 { 756 structdepca_private *lp = (structdepca_private *)dev->priv;
757 intioaddr = dev->base_addr;
758 intstatus = 0;
759
760 /* Transmitter timeout, serious problems. */ 761 if (dev->tbusy) { 762 inttickssofar = jiffies - dev->trans_start;
763 if (tickssofar < 5) { 764 status = -1;
765 }else{ 766 STOP_DEPCA;
767 printk("%s: transmit timed out, status %4.4x, resetting.\n",
768 dev->name, inw(DEPCA_DATA));
769
770 depca_init_ring(dev);
771 LoadCSRs(dev);
772 InitRestartDepca(dev);
773 dev->tbusy=0;
774 dev->trans_start = jiffies;
775 } 776 returnstatus;
777 } 778
779 if (skb == NULL) { 780 dev_tint(dev);
781 return 0;
782 } 783
784 /* Fill in the ethernet header. */ 785 if (!skb->arp && dev->rebuild_header(skb->data, dev)) { 786 skb->dev = dev;
787 arp_queue (skb);
788 return 0;
789 } 790 skb->arp=1;
791
792 if (skb->len <= 0) { 793 return 0;
794 } 795
796 if (depca_debug > 3) { 797 outw(CSR0, DEPCA_ADDR);
798 printk("%s: depca_start_xmit() called, csr0 %4.4x.\n", dev->name,
799 inw(DEPCA_DATA));
800 } 801
802 /* Block a timer-based transmit from overlapping. This could better be 803 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */ 804 if (set_bit(0, (void*)&dev->tbusy) != 0)
805 printk("%s: Transmitter access conflict.\n", dev->name);
806
807 /* 808 ** The TX buffer, skb, has to be copied into the local network RAM 809 ** for the LANCE to access it. The skb may be at > 16MB for large 810 ** (memory) systems. 811 */ 812 {/* Fill in a Tx ring entry */ 813 unsignedchar *buf;
814 intentry = lp->cur_tx++;
815 intlen;
816 longskbL = skb->len;
817 char *p = (char *) skb->data;
818
819 entry &= lp->rmask; /* Ring around buffer number. */ 820 buf = (unsignedchar *)(lp->tx_ring[entry].base & 0x00ffffff);
821
822 /* Wait for a full ring to free up */ 823 while (lp->tx_ring[entry].base < 0);
824
825 /* 826 ** Caution: the write order is important here... don't set up the 827 ** ownership rights until all the other information is in place. 828 */ 829 len = ((skbL > PKT_SZ) ? PKT_SZ : skbL); /* skb too long */ 830 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 831 skbL -= len;
832 lp->tx_ring[entry].length = -len;
833
834 /* Clears various error flags */ 835 lp->tx_ring[entry].misc = 0x0000;
836
837 /* copy the data from the socket buffer to the net memory */ 838 memcpy((unsignedchar *)(buf), skb->data, len);
839
840 /* Hand over buffer ownership to the LANCE */ 841 if (skbL <= 0) lp->tx_ring[entry].base |= (T_ENP);
842 lp->tx_ring[entry].base |= (T_OWN|T_STP);
843
844 /* Trigger an immediate send demand. */ 845 outw(CSR0, DEPCA_ADDR);
846 outw(INEA | TDMD, DEPCA_DATA);
847
848 dev->trans_start = jiffies;
849
850 for (p += len; skbL > 0; p += len) { 851
852 /* Get new buffer pointer */ 853 entry = lp->cur_tx++;
854 entry &= lp->rmask; /* Ring around buffer number. */ 855 buf = (unsignedchar *)(lp->tx_ring[entry].base & 0x00ffffff);
856
857 /* Wait for a full ring to free up */ 858 while (lp->tx_ring[entry].base < 0);
859 dev->tbusy=0;
860
861 /* Copy ethernet header to the new buffer */ 862 memcpy((unsignedchar *)buf, skb->data, PKT_HDR_LEN);
863
864 /* Determine length of data buffer */ 865 len = ((skbL > DAT_SZ) ? DAT_SZ : skbL); /* skbL too long */ 866 if (len < ETH_ZLEN) len = ETH_ZLEN; /* len too short */ 867 skbL -= len;
868 lp->tx_ring[entry].length = -len;
869
870 /* Clears various error flags */ 871 lp->tx_ring[entry].misc = 0x0000;
872
873 /* copy the data from the socket buffer to the net memory */ 874 memcpy((unsignedchar *)(buf + PKT_HDR_LEN), (unsignedchar *)p, len);
875
876 /* Hand over buffer ownership to the LANCE */ 877 if (skbL <= 0) lp->tx_ring[entry].base |= T_ENP;
878 lp->tx_ring[entry].base |= T_OWN;
879 } 880
881 if (depca_debug > 4) { 882 unsignedchar *pkt =
883 (unsignedchar *)(lp->tx_ring[entry].base & 0x00ffffff);
884
885 printk("%s: tx ring[%d], %#lx, sk_buf %#lx len %d.\n",
886 dev->name, entry, (unsignedlong) &lp->tx_ring[entry],
887 lp->tx_ring[entry].base, -lp->tx_ring[entry].length);
888 printk("%s: Tx %2.2x %2.2x %2.2x ... %2.2x %2.2x %2.2x %2.2x...%2.2x len %2.2x %2.2x %2.2x %2.2x.\n",
889 dev->name, pkt[0], pkt[1], pkt[2], pkt[5], pkt[6],
890 pkt[7], pkt[8], pkt[11], pkt[12], pkt[13],
891 pkt[14], pkt[15]);
892 } 893
894 /* Check if the TX ring is full or not - 'tbusy' cleared if not full. */ 895 if (lp->tx_ring[(entry+1) & lp->rmask].base >= 0) { 896 dev->tbusy=0;
897 } 898
899 if (skb->free) { 900 kfree_skb (skb, FREE_WRITE);
901 } 902 } 903
904 return 0;
905 } 906
907 /* 908 ** The DEPCA interrupt handler. 909 */ 910 staticvoid 911 depca_interrupt(intreg_ptr)
/* */ 912 { 913 intirq = -(((structpt_regs *)reg_ptr)->orig_eax+2);
914 structdevice *dev = (structdevice *)(irq2dev_map[irq]);
915 structdepca_private *lp;
916 intcsr0, ioaddr, nicsr;
917
918 if (dev == NULL) { 919 printk ("depca_interrupt(): irq %d for unknown device.\n", irq);
920 return;
921 }else{ 922 lp = (structdepca_private *)dev->priv;
923 ioaddr = dev->base_addr;
924 } 925
926 if (dev->interrupt)
927 printk("%s: Re-entering the interrupt handler.\n", dev->name);
928
929 dev->interrupt = MASK_INTERRUPTS;
930
931 /* mask the DEPCA board interrupts and turn on the LED */ 932 nicsr = inw(DEPCA_NICSR);
933 nicsr |= (IM|LED);
934 outw(nicsr, DEPCA_NICSR);
935
936 outw(CSR0, DEPCA_ADDR);
937 csr0 = inw(DEPCA_DATA);
938
939 /* Acknowledge all of the current interrupt sources ASAP. */ 940 outw(csr0 & ~(INEA|TDMD|STOP|STRT|INIT), DEPCA_DATA);
941
942 if (depca_debug > 5)
943 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
944 dev->name, csr0, inw(DEPCA_DATA));
945
946 if (csr0 & RINT) /* Rx interrupt (packet arrived) */ 947 depca_rx(dev);
948
949 if (csr0 & TINT) /* Tx interrupt (packet sent) */ 950 depca_tx(dev);
951
952 /* Clear the interrupts we've handled. */ 953 outw(CSR0, DEPCA_ADDR);
954 outw(BABL|CERR|MISS|MERR|RINT|TINT|IDON|INEA, DEPCA_DATA);
955
956 if (depca_debug > 4) { 957 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
958 dev->name, inw(DEPCA_ADDR),
959 inw(DEPCA_DATA));
960 } 961
962 /* Unmask the DEPCA board interrupts and turn off the LED */ 963 nicsr = (nicsr & ~IM & ~LED);
964 outw(nicsr, DEPCA_NICSR);
965
966 dev->interrupt = UNMASK_INTERRUPTS;
967 return;
968 } 969
970 staticint 971 depca_rx(structdevice *dev)
/* */ 972 { 973 structdepca_private *lp = (structdepca_private *)dev->priv;
974 intentry = lp->cur_rx & lp->rmask;
975
976 /* If we own the next entry, it's a new packet. Send it up. */ 977 for (; lp->rx_ring[entry].base >= 0; entry = (++lp->cur_rx) & lp->rmask) { 978 intstatus = lp->rx_ring[entry].base >> 16 ;
979
980 if (status & R_ERR) {/* There was an error. */ 981 lp->stats.rx_errors++; /* Update the error stats. */ 982 if (status & R_FRAM) lp->stats.rx_frame_errors++;
983 if (status & R_OFLO) lp->stats.rx_over_errors++;
984 if (status & R_CRC) lp->stats.rx_crc_errors++;
985 if (status & R_BUFF) lp->stats.rx_fifo_errors++;
986 }else{/* Malloc up new buffer, compatible with net-2e. */ 987 shortpkt_len = lp->rx_ring[entry].msg_length;
988 intsksize = sizeof(structsk_buff) + pkt_len;
989 structsk_buff *skb;
990
991 skb = alloc_skb(sksize, GFP_ATOMIC);
992 if (skb == NULL) { 993 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
994 lp->stats.rx_dropped++; /* Really, deferred. */ 995 break;
996 } 997 skb->mem_len = sksize;
998 skb->mem_addr = skb;
999 skb->len = pkt_len;
1000 skb->dev = dev;
1001 memcpy(skb->data,
1002 (unsignedchar *)(lp->rx_ring[entry].base & 0x00ffffff),
1003 pkt_len);
1004 /* 1005 ** Notify the upper protocol layers that there is another 1006 ** packet to handle1007 */1008 #ifdefHAVE_NETIF_RX1009 netif_rx(skb);
1010 #else1011 skb->lock = 0;
1012 if (dev_rint((unsignedchar*)skb, pkt_len, IN_SKBUFF, dev) != 0) {1013 kfree_skbmem(skb, sksize);
1014 lp->stats.rx_dropped++;
1015 break;
1016 }1017 #endif1018 lp->stats.rx_packets++;
1019 }1020
1021 /* turn over ownership of the current entry back to the LANCE */1022 lp->rx_ring[entry].base |= R_OWN;
1023 }1024
1025 /* 1026 ** We should check that at least two ring entries are free. If not,1027 ** we should free one and mark stats->rx_dropped++. 1028 */1029
1030 return 0;
1031 }1032
1033 /*1034 ** Buffer sent - check for buffer errors.1035 */1036 staticint1037 depca_tx(structdevice *dev)
/* */1038 {1039 structdepca_private *lp = (structdepca_private *)dev->priv;
1040 intdirty_tx = lp->dirty_tx & lp->rmask;
1041
1042 if (depca_debug > 5)
1043 printk("%s: Cleaning tx ring, dirty %d clean %d.\n",
1044 dev->name, dirty_tx, (lp->cur_tx & lp->rmask));
1045
1046 /* 1047 ** While the dirty entry is not the current one AND 1048 ** the LANCE doesn't own it... 1049 */1050 for (; dirty_tx!=(lp->cur_tx & lp->rmask) && lp->tx_ring[dirty_tx].base>0;
1051 dirty_tx = ++lp->dirty_tx & lp->rmask) {1052 unsignedlong *tmdp = (unsignedlong *)(&lp->tx_ring[dirty_tx]);
1053 intstatus = lp->tx_ring[dirty_tx].base >> 16;
1054
1055 if (status < 0) {/* Packet not yet sent! */1056 printk("interrupt for packet not yet sent!\n");
1057 break;
1058 }1059 if (status & T_ERR) {/* There was an major error, log it. */1060 interr_status = lp->tx_ring[dirty_tx].misc;
1061
1062 lp->stats.tx_errors++;
1063 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
1064 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
1065 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
1066 if (err_status & TMD3_UFLO) lp->stats.tx_fifo_errors++;
1067 /* We should re-init() after the FIFO error. */1068 }elseif (status & (T_MORE | T_ONE)) {1069 lp->stats.collisions++;
1070 }else{1071 lp->stats.tx_packets++;
1072 }1073
1074 if (depca_debug > 5)
1075 printk("%s: Tx done entry %d, %4.4lx %4.4lx %4.4lx %4.4lx.\n",
1076 dev->name, dirty_tx,
1077 tmdp[0], tmdp[1], tmdp[2], tmdp[3]);
1078 }1079 /*mark_bh(INET_BH);*/1080 return 0;
1081 }1082
1083 staticint1084 depca_close(structdevice *dev)
/* */1085 {1086 intioaddr = dev->base_addr;
1087
1088 dev->start = 0;
1089 dev->tbusy = 1;
1090
1091 outw(CSR0, DEPCA_ADDR);
1092
1093 if (depca_debug > 1) {1094 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1095 dev->name, inw(DEPCA_DATA));
1096 }1097
1098 /* 1099 ** We stop the DEPCA here -- it occasionally polls1100 ** memory if we don't. 1101 */1102 outw(STOP, DEPCA_DATA);
1103
1104 free_irq(dev->irq);
1105
1106 irq2dev_map[dev->irq] = 0;
1107
1108 return 0;
1109 }1110
1111 staticvoidLoadCSRs(structdevice *dev)
/* */1112 {1113 structdepca_private *lp = (structdepca_private *)dev->priv;
1114 intioaddr = dev->base_addr;
1115
1116 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */1117 outw((unsignedshort)(unsignedlong)&lp->init_block, DEPCA_DATA);
1118 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */1119 outw((unsignedshort)((unsignedlong)&lp->init_block >> 16), DEPCA_DATA);
1120 outw(CSR3, DEPCA_ADDR); /* ALE control */1121 outw(ACON, DEPCA_DATA);
1122 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1123 }1124
1125 staticintInitRestartDepca(structdevice *dev)
/* */1126 {1127 structdepca_private *lp = (structdepca_private *)dev->priv;
1128 intioaddr = dev->base_addr;
1129 inti, status=0;
1130
1131 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */1132 outw(INIT, DEPCA_DATA); /* initialize DEPCA */1133
1134 /* wait for lance to complete initialisation */1135 for (i=0;(i<100) && !(inw(DEPCA_DATA) & IDON); i++);
1136
1137 if (i!=100) {1138 /* clear IDON by writing a "1", enable interrupts and start lance */1139 outw(IDON | INEA | STRT, DEPCA_DATA);
1140 if (depca_debug > 2) {1141 printk("%s: DEPCA open after %d ticks, init block %#lx csr0 %4.4x.\n",
1142 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1143 }1144 }else{1145 status = -1;
1146 printk("%s: DEPCA unopened after %d ticks, init block %#lx csr0 %4.4x.\n",
1147 dev->name, i, (long) &lp->init_block, inw(DEPCA_DATA));
1148 }1149
1150 returnstatus;
1151 }1152
1153 staticstructenet_statistics *
1154 depca_get_stats(structdevice *dev)
/* */1155 {1156 structdepca_private *lp = (structdepca_private *)dev->priv;
1157
1158 /* Null body since there is no framing error counter */1159
1160 return &lp->stats;
1161 }1162
1163 #ifdefHAVE_MULTICAST1164 /*1165 ** Set or clear the multicast filter for this adaptor.1166 ** num_addrs == -1 Promiscuous mode, receive all packets1167 ** num_addrs == 0 Normal mode, clear multicast list1168 ** num_addrs > 0 Multicast mode, receive normal and MC packets, and do1169 ** best-effort filtering.1170 */1171 staticvoid1172 set_multicast_list(structdevice *dev, intnum_addrs, void *addrs)
/* */1173 {1174 shortioaddr = dev->base_addr;
1175 structdepca_private *lp = (structdepca_private *)dev->priv;
1176
1177 /* We take the simple way out and always enable promiscuous mode. */1178 STOP_DEPCA; /* Temporarily stop the depca. */1179
1180 lp->init_block.mode = PROM; /* Set promiscuous mode */1181 if (num_addrs >= 0) {1182 shortmulticast_table[4];
1183 inti;
1184
1185 SetMulticastFilter(num_addrs, (char *)addrs, (char *)multicast_table);
1186
1187 /* We don't use the multicast table, but rely on upper-layer filtering. */1188 memset(multicast_table, (num_addrs==0) ? 0 : -1, sizeof(multicast_table));
1189
1190 for (i = 0; i < 4; i++) {1191 lp->init_block.filter[i] = multicast_table[i];
1192 }1193 lp->init_block.mode &= ~PROM; /* Unset promiscuous mode */1194 }else{1195 lp->init_block.mode |= PROM; /* Set promiscuous mode */1196 }1197
1198 outw(CSR0, DEPCA_ADDR);
1199 outw(IDON|INEA|STRT, DEPCA_DATA); /* Resume normal operation. */1200 }1201
1202 /*1203 ** Calculate the hash code and update the logical address filter1204 ** from a list of ethernet multicast addresses.1205 ** Derived from a 'C' program in the AMD data book:1206 ** "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)", 1207 ** Pub #17781, Rev. A, May 19931208 */1209 staticvoidSetMulticastFilter(intnum_addrs, char *addrs, char *multicast_table)
/* */1210 {1211 charj, ctrl, bit, octet, hashcode;
1212 shortinti;
1213 longintCRC, poly = (longint) CRC_POLYNOMIAL;
1214
1215 for (i=0;i<num_addrs;i++) {/* for each address in the list */1216 if (((char) *(addrs+ETH_ALEN*i) & 0x01) == 1) {/* is multicast address? */1217 CRC = (longint) 0xffffffff; /* init CRC for each address */1218 for (octet=0;octet<ETH_ALEN;octet++) {/* for each address octet */1219 for(j=0;j<8;j++) {/* process each address bit */1220 bit = (((char)* (addrs+ETH_ALEN*i+octet)) >> j) & 0x01;
1221 ctrl = ((CRC < 0) ? 1 : 0); /* shift the control bit */1222 CRC <<= 1; /* shift the CRC */1223 if (bit ^ ctrl) {/* (bit) XOR (control bit) */1224 CRC ^= poly; /* (CRC) XOR (polynomial) */1225 }1226 }1227 }1228 hashcode = (CRC & 0x00000001); /* hashcode is 6 LSb of CRC ... */1229 for (j=0;j<5;j++) {/* ... in reverse order. */1230 hashcode <<= 1;
1231 CRC >>= 1;
1232 hashcode |= (CRC & 0x00000001);
1233 }1234 octet = hashcode >> 3; /* bit[3-5] -> octet in filter */1235 /* bit[0-2] -> bit in octet */1236 multicast_table[octet] |= (1 << (hashcode & 0x07));
1237 }1238 }1239 return;
1240 }1241
1242 #endif/* HAVE_MULTICAST */1243
1244 /*1245 ** Look for a particular board name in the on-board Remote Diagnostics1246 ** and Boot (RDB) ROM. This will also give us a clue to the network RAM1247 ** base address.1248 */1249 staticchar *DepcaSignature(unsignedlongmem_addr)
/* */1250 {1251 unsignedlongi,j,k;
1252 staticcharsignatures[][DEPCA_NAME_LENGTH] = DEPCA_SIGNATURE;
1253 staticcharthisName[DEPCA_NAME_LENGTH];
1254 chartmpstr[17];
1255
1256 for (i=0;i<16;i++) {/* copy the first 16 bytes of ROM to */1257 tmpstr[i] = *(unsignedchar *)(mem_addr+0xc000+i); /* a temporary string */1258 }1259 tmpstr[i]=(char)NULL;
1260
1261 strcpy(thisName,"");
1262 for (i=0;*signatures[i]!=(char)NULL && *thisName==(char)NULL;i++) {1263 for (j=0,k=0;j<16 && k<strlen(signatures[i]);j++) {1264 if (signatures[i][k] == tmpstr[j]) {/* track signature */1265 k++;
1266 }else{/* lost signature; begin search again */1267 k=0;
1268 }1269 }1270 if (k == strlen(signatures[i])) {1271 strcpy(thisName,signatures[i]);
1272 }1273 }1274
1275 returnthisName; /* return the device name string */1276 }1277
1278 /*1279 ** Look for a special sequence in the Ethernet station address PROM that1280 ** is common across all DEPCA products.1281 */1282
1283 staticintDevicePresent(shortioaddr)
/* */1284 {1285 staticshortfp=1,sigLength=0;
1286 staticchardevSig[] = PROBE_SEQUENCE;
1287 chardata;
1288 inti, j, status = 0;
1289 staticcharasc2hex(charvalue);
1290
1291 /* 1292 ** Convert the ascii signature to a hex equivalent & pack in place 1293 */1294 if (fp) {/* only do this once!... */1295 for (i=0,j=0;devSig[i]!=(char)NULL && !status;i+=2,j++) {1296 if ((devSig[i]=asc2hex(devSig[i]))>=0) {1297 devSig[i]<<=4;
1298 if((devSig[i+1]=asc2hex(devSig[i+1]))>=0){1299 devSig[j]=devSig[i]+devSig[i+1];
1300 }else{1301 status= -1;
1302 }1303 }else{1304 status= -1;
1305 }1306 }1307 sigLength=j;
1308 fp = 0;
1309 }1310
1311 /* 1312 ** Search the Ethernet address ROM for the signature. Since the ROM address1313 ** counter can start at an arbitrary point, the search must include the entire1314 ** probe sequence length plus the length of the (signature - 1).1315 ** Stop the search IMMEDIATELY after the signature is found so that the1316 ** PROM address counter is correctly positioned at the start of the1317 ** ethernet address for later read out.1318 */1319 if (!status) {1320 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {1321 data = inb(ioaddr);
1322 if (devSig[j] == data) {/* track signature */1323 j++;
1324 }else{/* lost signature; begin search again */1325 j=0;
1326 }1327 }1328
1329 if (j!=sigLength) {1330 status = -ENODEV; /* search failed */1331 }1332 }1333
1334 returnstatus;
1335 }1336
1337 staticcharasc2hex(charvalue)
/* */1338 {1339 value -= 0x30; /* normalise to 0..9 range */1340 if (value >= 0) {1341 if (value > 9) {/* but may not be 10..15 */1342 value &= 0x1f; /* make A..F & a..f be the same */1343 value -= 0x07; /* normalise to 10..15 range */1344 if ((value < 0x0a) || (value > 0x0f)) {/* if outside range then... */1345 value = -1; /* ...signal error */1346 }1347 }1348 }else{/* outside 0..9 range... */1349 value = -1; /* ...signal error */1350 }1351 returnvalue; /* return hex char or error */1352 }1353
1354
1355 /*1356 * Local variables:1357 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c depca.c"1358 * End:1359 */1360
1361
1362