This source file includes following definitions.
- eata_scsi_done
- eata_fake_int_handler
- eata_release
- eata_info
- eata_int_handler
- eata_send_command
- eata_send_immediate
- eata_queue
- eata_abort
- eata_reset
- get_board_data
- check_blink_state
- get_conf_PIO
- print_config
- register_HBA
- find_EISA
- find_ISA
- find_PCI
- eata_detect
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56 #ifdef MODULE
57 #include <linux/module.h>
58 #include <linux/version.h>
59 #endif
60
61 #include <linux/kernel.h>
62 #include <linux/sched.h>
63 #include <linux/string.h>
64 #include <linux/ioport.h>
65 #include <linux/malloc.h>
66 #include <linux/in.h>
67 #include <linux/bios32.h>
68 #include <linux/pci.h>
69 #include <linux/proc_fs.h>
70 #include <asm/byteorder.h>
71 #include <asm/types.h>
72 #include <asm/io.h>
73 #include <asm/dma.h>
74 #include "../block/blk.h"
75 #include "scsi.h"
76 #include "sd.h"
77 #include "hosts.h"
78 #include <linux/scsicam.h>
79 #include "eata_dma.h"
80 #include "eata_dma_proc.h"
81
82
83 static u32 ISAbases[] =
84 {0x1F0, 0x170, 0x330, 0x230};
85 static unchar EISAbases[] =
86 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
87 static uint registered_HBAs = 0;
88 static struct Scsi_Host *last_HBA = NULL;
89 static struct Scsi_Host *first_HBA = NULL;
90 static unchar reg_IRQ[] =
91 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
92 static unchar reg_IRQL[] =
93 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
94 static struct eata_sp *status = 0;
95 static void *dma_scratch = 0;
96
97 static uint internal_command_finished = TRUE;
98 static unchar HBA_interpret = FALSE;
99 static u32 fake_int_base;
100 static u32 fake_int_result;
101
102 static ulong int_counter = 0;
103 static ulong queue_counter = 0;
104
105 void eata_scsi_done (Scsi_Cmnd * SCpnt)
106 {
107 return;
108 }
109
110 void eata_fake_int_handler(s32 irq, struct pt_regs * regs)
111 {
112 fake_int_result = inb(fake_int_base + HA_RSTATUS);
113 DBG(DBG_INTR3, printk("eata_fake_int_handler called irq%d base %#x"
114 " res %#x\n", irq, fake_int_base, fake_int_result));
115 return;
116 }
117
118 #include "eata_dma_proc.c"
119
120 #ifdef MODULE
121 int eata_release(struct Scsi_Host *sh)
122 {
123 uint i;
124 if (sh->irq && reg_IRQ[sh->irq] == 1) free_irq(sh->irq);
125 else reg_IRQ[sh->irq]--;
126
127 scsi_init_free((void *)status, 512);
128 scsi_init_free((void *)dma_scratch, 512);
129 for (i = 0; i < sh->can_queue; i++){
130 if(SD(sh)->ccb[i].sg_list != NULL)
131 scsi_init_free((void *) SD(sh)->ccb[i].sg_list,
132 sh->sg_tablesize * sizeof(struct eata_sg_list));
133 }
134
135 if (SD(sh)->channel == 0) {
136 if (sh->dma_channel != 0xff) free_dma(sh->dma_channel);
137 if (sh->io_port && sh->n_io_port)
138 release_region(sh->io_port, sh->n_io_port);
139 }
140 return(TRUE);
141 }
142 #endif
143
144 const char *eata_info(struct Scsi_Host *host)
145 {
146 static char *information = "EATA SCSI HBA Driver";
147 return information;
148 }
149
150 void eata_int_handler(int irq, struct pt_regs * regs)
151 {
152 uint i, result = 0;
153 uint hba_stat, scsi_stat, eata_stat;
154 Scsi_Cmnd *cmd;
155 struct eata_ccb *cp;
156 struct eata_sp *sp;
157 uint base;
158 ulong flags;
159 uint x;
160 struct Scsi_Host *sh;
161
162 save_flags(flags);
163 cli();
164
165 for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->prev) {
166 if (sh->irq != irq)
167 continue;
168 if (!(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ))
169 continue;
170
171 int_counter++;
172
173 sp=&SD(sh)->sp;
174
175 cp = sp->ccb;
176 cmd = cp->cmd;
177 base = (uint) cmd->host->base;
178
179 hba_stat = sp->hba_stat;
180
181 scsi_stat = (sp->scsi_stat >> 1) & 0x1f;
182
183 if (sp->EOC == FALSE) {
184 eata_stat = inb(base + HA_RSTATUS);
185 printk("eata_dma: int_handler, board: %x cmd %lx returned "
186 "unfinished.\nEATA: %x HBA: %x SCSI: %x spadr %lx spadrirq "
187 "%lx, irq%d\n", base, (long)cp, eata_stat, hba_stat,
188 scsi_stat,(long)&status, (long)&status[irq], irq);
189 DBG(DBG_DELAY, DEL2(800));
190 restore_flags(flags);
191 return;
192 }
193
194 if (cp->status == LOCKED) {
195 cp->status = FREE;
196 eata_stat = inb(base + HA_RSTATUS);
197 printk("eata_dma: int_handler, freeing locked queueslot\n");
198 DBG(DBG_INTR && DBG_DELAY, DEL2(800));
199 restore_flags(flags);
200 return;
201 }
202
203 eata_stat = inb(base + HA_RSTATUS);
204 DBG(DBG_INTR, printk("IRQ %d received, base %#.4x, pid %ld, target: "
205 "%x, lun: %x, ea_s: %#.2x, hba_s: %#.2x \n",
206 irq, base, cmd->pid, cmd->target, cmd->lun,
207 eata_stat, hba_stat));
208
209 switch (hba_stat) {
210 case HA_NO_ERROR:
211 if (scsi_stat == CONDITION_GOOD
212 && cmd->device->type == TYPE_DISK
213 && (HD(cmd)->t_state[cp->cp_channel][cp->cp_id] == RESET))
214 result = DID_BUS_BUSY << 16;
215 else if (scsi_stat == GOOD) {
216 HD(cmd)->t_state[cp->cp_channel][cp->cp_id] = OK;
217 if(HD(cmd)->do_latency == TRUE && cp->timestamp) {
218 uint time;
219 time = jiffies - cp->timestamp;
220 if((cp->rw_latency) == TRUE) {
221 if(HD(cmd)->writes_lat[cp->sizeindex][1] > time)
222 HD(cmd)->writes_lat[cp->sizeindex][1] = time;
223 if(HD(cmd)->writes_lat[cp->sizeindex][2] < time)
224 HD(cmd)->writes_lat[cp->sizeindex][2] = time;
225 HD(cmd)->writes_lat[cp->sizeindex][3] += time;
226 HD(cmd)->writes_lat[cp->sizeindex][0]++;
227 } else {
228 if(HD(cmd)->reads_lat[cp->sizeindex][1] > time)
229 HD(cmd)->reads_lat[cp->sizeindex][1] = time;
230 if(HD(cmd)->reads_lat[cp->sizeindex][2] < time)
231 HD(cmd)->reads_lat[cp->sizeindex][2] = time;
232 HD(cmd)->reads_lat[cp->sizeindex][3] += time;
233 HD(cmd)->reads_lat[cp->sizeindex][0]++;
234 }
235 }
236 }
237 else if (scsi_stat == CHECK_CONDITION
238 && cmd->device->type == TYPE_DISK
239 && (cmd->sense_buffer[2] & 0xf) == RECOVERED_ERROR)
240 result = DID_BUS_BUSY << 16;
241 else
242 result = DID_OK << 16;
243 HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id] = OK;
244 break;
245 case HA_ERR_SEL_TO:
246 result = DID_BAD_TARGET << 16;
247 break;
248 case HA_ERR_CMD_TO:
249 if (HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id] > 1)
250 result = DID_ERROR << 16;
251 else {
252 result = DID_TIME_OUT << 16;
253 HD(cmd)->t_timeout[cp->cp_channel][cp->cp_id]++;
254 }
255 break;
256 case HA_ERR_RESET:
257 case HA_INIT_POWERUP:
258 if (cmd->device->type != TYPE_TAPE)
259 result = DID_BUS_BUSY << 16;
260 else
261 result = DID_ERROR << 16;
262
263 for (i = 0; i < MAXTARGET; i++)
264 HD(cmd)->t_state[cp->cp_channel][i] = RESET;
265 break;
266 case HA_UNX_BUSPHASE:
267 case HA_UNX_BUS_FREE:
268 case HA_BUS_PARITY:
269 case HA_SCSI_HUNG:
270 case HA_UNX_MSGRJCT:
271 case HA_RESET_STUCK:
272 case HA_RSENSE_FAIL:
273 case HA_PARITY_ERR:
274 default:
275 result = DID_ERROR << 16;
276 break;
277 }
278 cmd->result = result | (scsi_stat << 1);
279
280 #if DBG_INTR2
281 if (scsi_stat || result || hba_stat || eata_stat != 0x50
282 || cmd->scsi_done == NULL || cmd->device->id == 7)
283 printk("HBA: %d, channel %d, id: %d, lun %d, pid %ld:\n"
284 "eata_stat %#x, hba_stat %#.2x, scsi_stat %#.2x, "
285 "sense_key: %#x, result: %#.8x\n",
286 x, cmd->device->channel, cmd->device->id, cmd->device->lun,
287 cmd->pid, eata_stat, hba_stat, scsi_stat,
288 cmd->sense_buffer[2] & 0xf, cmd->result);
289 DBG(DBG_INTR&&DBG_DELAY,DEL2(800));
290 #endif
291
292 cp->status = FREE;
293
294 restore_flags(flags);
295 if(cmd->scsi_done != eata_scsi_done) cmd->scsi_done(cmd);
296 else {
297 internal_command_finished = TRUE;
298 HBA_interpret = FALSE;
299 }
300 save_flags(flags);
301 cli();
302 }
303 restore_flags(flags);
304
305 return;
306 }
307
308 inline int eata_send_command(u32 addr, u32 base, u8 command)
309 {
310 long loop = R_LIMIT;
311
312 while (inb(base + HA_RAUXSTAT) & HA_ABUSY)
313 if (--loop == 0)
314 return(FALSE);
315
316 outb( addr & 0x000000ff, base + HA_WDMAADDR);
317 outb((addr & 0x0000ff00) >> 8, base + HA_WDMAADDR + 1);
318 outb((addr & 0x00ff0000) >> 16, base + HA_WDMAADDR + 2);
319 outb((addr & 0xff000000) >> 24, base + HA_WDMAADDR + 3);
320 outb(command, base + HA_WCOMMAND);
321 return(TRUE);
322 }
323
324 #if 0
325 inline int eata_send_immediate(u32 addr, u32 base, u8 cmnd, u8 cmnd2, u8 id,
326 u8 lun)
327 {
328 if(addr){
329 outb( addr & 0x000000ff, base + HA_WDMAADDR);
330 outb((addr & 0x0000ff00) >> 8, base + HA_WDMAADDR + 1);
331 outb((addr & 0x00ff0000) >> 16, base + HA_WDMAADDR + 2);
332 outb((addr & 0xff000000) >> 24, base + HA_WDMAADDR + 3);
333 } else {
334 outb(id, base + HA_WSUBCODE);
335 outb(lun, base + HA_WSUBLUN);
336 }
337
338 outb(cmnd2, base + HA_WCOMMAND2);
339 outb(cmnd, base + HA_WCOMMAND);
340 return(TRUE);
341 }
342 #endif
343
344 int eata_queue(Scsi_Cmnd * cmd, void (* done) (Scsi_Cmnd *))
345 {
346 unsigned int i, x, y;
347 u32 flags;
348 hostdata *hd;
349 struct Scsi_Host *sh;
350 struct eata_ccb *cp;
351 struct scatterlist *sl;
352
353 save_flags(flags);
354 cli();
355
356 queue_counter++;
357
358 if (done == (void *)eata_scsi_done) {
359 if (internal_command_finished == TRUE)
360 internal_command_finished = FALSE;
361 else
362 cmd->result = (DID_ERROR << 16) + QUEUE_FULL;
363 }
364
365 hd = HD(cmd);
366 sh = cmd->host;
367
368
369 for (y = hd->last_ccb + 1, x = 0; x < sh->can_queue; x++, y++) {
370 if (y >= sh->can_queue)
371 y = 0;
372 if (hd->ccb[y].status == FREE)
373 break;
374 }
375
376 hd->last_ccb = y;
377
378 if (x == sh->can_queue) {
379 DBG(DBG_QUEUE, printk("can_queue %d, x %d, y %d\n",
380 sh->can_queue, x, y));
381
382 panic("eata_dma: run out of queue slots cmdno:%ld intrno: %ld\n",
383 queue_counter, int_counter);
384 }
385
386 cp = &hd->ccb[y];
387
388 memset(cp, 0, sizeof(struct eata_ccb) - sizeof(struct eata_sg_list *));
389
390 cp->status = USED;
391
392 DBG(DBG_QUEUE, printk("eata_queue pid %ld, target: %x, lun: %x, y %d\n",
393 cmd->pid, cmd->target, cmd->lun, y));
394 DBG(DBG_QUEUE && DBG_DELAY, DEL2(250));
395
396 if(hd->do_latency == TRUE) {
397 int x, z;
398 short *sho;
399 long *lon;
400 x = 0;
401 if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 ||
402 cmd->cmnd[0] == WRITE_12 || cmd->cmnd[0] == READ_6 ||
403 cmd->cmnd[0] == READ_10 || cmd->cmnd[0] == READ_12) {
404
405 cp->timestamp = jiffies;
406 switch(cmd->cmnd[0]) {
407 case WRITE_6:
408 case READ_6:
409 x = cmd->cmnd[4]/2;
410 break;
411 case WRITE_10:
412 case READ_10:
413 sho = (short *) &cmd->cmnd[7];
414 x = ntohs(*sho)/2;
415 break;
416 case WRITE_12:
417 case READ_12:
418 lon = (long *) &cmd->cmnd[6];
419 x = ntohl(*lon)/2;
420 break;
421 }
422 for(z = 0; z <= 11, x > (1 << z); z++)
423 ;
424 cp->sizeindex = z;
425 if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 ||
426 cmd->cmnd[0] == WRITE_12){
427 cp->rw_latency = TRUE;
428 }
429 }
430 }
431 cmd->scsi_done = (void *)done;
432
433 switch (cmd->cmnd[0]) {
434 case CHANGE_DEFINITION: case COMPARE: case COPY:
435 case COPY_VERIFY: case LOG_SELECT: case MODE_SELECT:
436 case MODE_SELECT_10: case SEND_DIAGNOSTIC: case WRITE_BUFFER:
437 case FORMAT_UNIT: case REASSIGN_BLOCKS: case RESERVE:
438 case SEARCH_EQUAL: case SEARCH_HIGH: case SEARCH_LOW:
439 case WRITE_6: case WRITE_10: case WRITE_VERIFY:
440 case UPDATE_BLOCK: case WRITE_LONG: case WRITE_SAME:
441 case SEARCH_HIGH_12: case SEARCH_EQUAL_12: case SEARCH_LOW_12:
442 case WRITE_12: case WRITE_VERIFY_12: case SET_WINDOW:
443 case MEDIUM_SCAN: case SEND_VOLUME_TAG:
444 case 0xea:
445 cp->DataOut = TRUE;
446 break;
447 case TEST_UNIT_READY:
448 default:
449 cp->DataIn = TRUE;
450 }
451
452 if ((done == (void *) eata_scsi_done && HBA_interpret == TRUE)
453 || cmd->target == sh->this_id)
454 cp->Interpret = TRUE;
455
456 if (cmd->use_sg) {
457 cp->scatter = TRUE;
458 if (cp->sg_list == NULL) {
459 cp->sg_list = kmalloc(SG_SIZE_BIG*sizeof(struct eata_sg_list),
460 GFP_ATOMIC | GFP_DMA);
461 }
462 cp->cp_dataDMA = htonl((ulong)cp->sg_list);
463 if (cp->cp_dataDMA == 0)
464 panic("eata_dma: Run out of DMA memory for SG lists !\n");
465
466 cp->cp_datalen = htonl(cmd->use_sg * sizeof(struct eata_sg_list));
467 sl=(struct scatterlist *)cmd->request_buffer;
468 for(i = 0; i < cmd->use_sg; i++, sl++){
469 cp->sg_list[i].data = htonl((u32) sl->address);
470 cp->sg_list[i].len = htonl((u32) sl->length);
471 }
472 } else {
473 cp->scatter = FALSE;
474 cp->cp_datalen = htonl(cmd->request_bufflen);
475 cp->cp_dataDMA = htonl((u32)cmd->request_buffer);
476 }
477
478 cp->Auto_Req_Sen = TRUE;
479 cp->cp_reqDMA = htonl((u32) cmd->sense_buffer);
480 cp->reqlen = sizeof(cmd->sense_buffer);
481
482 cp->cp_id = cmd->target;
483 cp->cp_channel = cmd->channel;
484 cp->cp_lun = cmd->lun;
485 cp->cp_dispri = TRUE;
486 cp->cp_identify = TRUE;
487 memcpy(cp->cp_cdb, cmd->cmnd, cmd->cmd_len);
488
489 cp->cp_statDMA = htonl((u32) &(hd->sp));
490
491 cp->cp_viraddr = cp;
492 cp->cmd = cmd;
493 cmd->host_scribble = (char *)&hd->ccb[y];
494
495 if(eata_send_command((u32) cp, (u32) sh->base, EATA_CMD_DMA_SEND_CP) == FALSE) {
496 cmd->result = DID_ERROR << 16;
497 printk("eata_queue target %d, pid %ld, HBA busy, returning DID_ERROR,"
498 " done.\n", cmd->target, cmd->pid);
499 restore_flags(flags);
500 if(done != (void *)eata_scsi_done) done(cmd);
501 return (0);
502 }
503 DBG(DBG_QUEUE,printk("Queued base %#.4x pid: %ld target: %x lun: %x "
504 "slot %d irq %d\n", (s32)sh->base, cmd->pid,
505 cmd->target, cmd->lun, y, sh->irq));
506 DBG(DBG_QUEUE && DBG_DELAY, DEL2(200));
507 restore_flags(flags);
508 return (0);
509 }
510
511
512 int eata_abort(Scsi_Cmnd * cmd)
513 {
514 ulong flags;
515 ulong loop = R_LIMIT;
516
517 save_flags(flags);
518 cli();
519
520 DBG(DBG_ABNORM, printk("eata_abort called pid: %ld target: %x lun: %x"
521 " reason %x\n", cmd->pid, cmd->target, cmd->lun,
522 cmd->abort_reason));
523 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
524
525
526 while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY)
527 if (--loop == 0) {
528 printk("eata_dma: abort, timeout error.\n");
529 restore_flags(flags);
530 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
531 return (SCSI_ABORT_ERROR);
532 }
533 if (CD(cmd)->status == USED) {
534 DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_BUSY\n"));
535 restore_flags(flags);
536 return (SCSI_ABORT_BUSY);
537 }
538 if (CD(cmd)->status == FREE) {
539 DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_NOT_RUNNING\n"));
540 restore_flags(flags);
541 return (SCSI_ABORT_NOT_RUNNING);
542 }
543 if (CD(cmd)->status == RESET) {
544 restore_flags(flags);
545 printk("eata_dma: abort, command reset error.\n");
546 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
547 return (SCSI_ABORT_ERROR);
548 }
549 if (CD(cmd)->status == LOCKED) {
550 restore_flags(flags);
551 DBG(DBG_ABNORM, printk("eata_dma: abort, queue slot locked.\n"));
552 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
553 return (SCSI_ABORT_NOT_RUNNING);
554 } else
555 panic("eata_dma: abort: invalid slot status\n");
556 }
557
558 int eata_reset(Scsi_Cmnd * cmd)
559 {
560 ushort x, z;
561 ulong time, limit = 0;
562 ulong loop = R_LIMIT;
563 ulong flags;
564 unchar success = FALSE;
565 Scsi_Cmnd *sp;
566
567 save_flags(flags);
568 cli();
569
570 DBG(DBG_ABNORM, printk("eata_reset called pid:%ld target: %x lun: %x"
571 " reason %x\n", cmd->pid, cmd->target, cmd->lun,
572 cmd->abort_reason));
573
574 if (HD(cmd)->state == RESET) {
575 printk("eata_reset: exit, already in reset.\n");
576 restore_flags(flags);
577 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
578 return (SCSI_RESET_ERROR);
579 }
580
581 while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY)
582 if (--loop == 0) {
583 printk("eata_reset: exit, timeout error.\n");
584 restore_flags(flags);
585 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
586 return (SCSI_RESET_ERROR);
587 }
588
589 for (x = 0; x < MAXCHANNEL; x++) {
590 for (z = 0; z < MAXTARGET; z++) {
591 HD(cmd)->t_state[x][z] = RESET;
592 HD(cmd)->t_timeout[x][z] = NO_TIMEOUT;
593 }
594 }
595
596 for (x = 0; x < cmd->host->can_queue; x++) {
597 if (HD(cmd)->ccb[x].status == FREE)
598 continue;
599
600 if (HD(cmd)->ccb[x].status == LOCKED) {
601 HD(cmd)->ccb[x].status = FREE;
602 printk("eata_reset: locked slot %d forced free.\n", x);
603 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
604 continue;
605 }
606 sp = HD(cmd)->ccb[x].cmd;
607 HD(cmd)->ccb[x].status = RESET;
608 printk("eata_reset: slot %d in reset, pid %ld.\n", x, sp->pid);
609 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
610
611 if (sp == NULL)
612 panic("eata_reset: slot %d, sp==NULL.\n", x);
613 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
614
615 if (sp == cmd)
616 success = TRUE;
617 }
618
619
620 inb((u32) (cmd->host->base) + HA_RSTATUS);
621 eata_send_command(0, (u32) cmd->host->base, EATA_CMD_RESET);
622
623 DBG(DBG_ABNORM, printk("eata_reset: board reset done, enabling interrupts.\n"));
624 HD(cmd)->state = RESET;
625
626 restore_flags(flags);
627
628 time = jiffies;
629 while (jiffies < (time + (3 * HZ)) && limit++ < 10000000)
630 ;
631
632 save_flags(flags);
633 cli();
634
635 DBG(DBG_ABNORM, printk("eata_reset: interrupts disabled, loops %ld.\n",
636 limit));
637 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
638
639 for (x = 0; x < cmd->host->can_queue; x++) {
640
641
642 if (HD(cmd)->ccb[x].status != RESET)
643 continue;
644
645 sp = HD(cmd)->ccb[x].cmd;
646 sp->result = DID_RESET << 16;
647
648
649 HD(cmd)->ccb[x].status = LOCKED;
650
651 printk("eata_reset: slot %d locked, DID_RESET, pid %ld done.\n",
652 x, sp->pid);
653 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
654 restore_flags(flags);
655 sp->scsi_done(sp);
656 cli();
657 }
658
659 HD(cmd)->state = FALSE;
660 restore_flags(flags);
661
662 if (success) {
663 DBG(DBG_ABNORM, printk("eata_reset: exit, success.\n"));
664 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
665 return (SCSI_RESET_SUCCESS);
666 } else {
667 DBG(DBG_ABNORM, printk("eata_reset: exit, wakeup.\n"));
668 DBG(DBG_ABNORM && DBG_DELAY, DEL2(500));
669 return (SCSI_RESET_PUNT);
670 }
671 }
672
673 char * get_board_data(u32 base, u32 irq, u32 id)
674 {
675 struct eata_ccb *cp;
676 struct eata_sp *sp;
677 static char *buff;
678 ulong i;
679 ulong limit = 0;
680
681 cp = (struct eata_ccb *) scsi_init_malloc(sizeof(struct eata_ccb),
682 GFP_ATOMIC | GFP_DMA);
683 sp = (struct eata_sp *) scsi_init_malloc(sizeof(struct eata_sp),
684 GFP_ATOMIC | GFP_DMA);
685
686 buff = dma_scratch;
687
688 memset(cp, 0, sizeof(struct eata_ccb));
689 memset(sp, 0, sizeof(struct eata_sp));
690 memset(buff, 0, 256);
691
692 cp->DataIn = TRUE;
693 cp->Interpret = TRUE;
694
695 cp->cp_datalen = htonl(255);
696 cp->cp_dataDMA = htonl((s32)buff);
697 cp->cp_viraddr = cp;
698
699 cp->cp_id = id;
700 cp->cp_lun = 0;
701
702 cp->cp_cdb[0] = INQUIRY;
703 cp->cp_cdb[1] = 0;
704 cp->cp_cdb[2] = 0;
705 cp->cp_cdb[3] = 0;
706 cp->cp_cdb[4] = 255;
707 cp->cp_cdb[5] = 0;
708
709 cp->cp_statDMA = htonl((ulong) sp);
710
711 fake_int_base = base;
712 fake_int_result = 0;
713
714 eata_send_command((u32) cp, (u32) base, EATA_CMD_DMA_SEND_CP);
715
716 i = jiffies + (3 * HZ) ;
717 while (fake_int_result == FALSE && jiffies <= i)
718 barrier();
719
720 DBG(DBG_INTR3, printk("fake_int_result: %#x hbastat %#x scsistat %#x,"
721 " buff %p sp %p\n",
722 fake_int_result, (u32) (sp->hba_stat & 0x7f),
723 (u32) sp->scsi_stat, buff, sp));
724
725 scsi_init_free((void *)cp, sizeof(struct eata_ccb));
726 scsi_init_free((void *)sp, sizeof(struct eata_sp));
727
728 if ((fake_int_result & HA_SERROR) || jiffies > i){
729
730 inb((u32) (base) + HA_RSTATUS);
731 eata_send_command(0, base, EATA_CMD_RESET);
732 i = jiffies;
733 while (jiffies < (i + (3 * HZ)) && limit++ < 10000000)
734 barrier();
735 return (NULL);
736 } else
737 return (buff);
738 }
739
740 int check_blink_state(long base)
741 {
742 ushort loops = 10;
743 u32 blinkindicator;
744 u32 state = 0x12345678;
745 u32 oldstate = 0;
746
747 blinkindicator = htonl(0x54504442);
748 while ((loops--) && (state != oldstate)) {
749 oldstate = state;
750 state = inl((uint) base + 1);
751 }
752
753 DBG(DBG_BLINK, printk("Did Blink check. Status: %d\n",
754 (state == oldstate) && (state == blinkindicator)));
755
756 if ((state == oldstate) && (state == blinkindicator))
757 return(TRUE);
758 else
759 return (FALSE);
760 }
761
762 int get_conf_PIO(u32 base, struct get_conf *buf)
763 {
764 ulong loop = R_LIMIT;
765 u16 *p;
766
767 if(check_region(base, 9))
768 return (FALSE);
769
770 memset(buf, 0, sizeof(struct get_conf));
771
772 while (inb(base + HA_RSTATUS) & HA_SBUSY)
773 if (--loop == 0)
774 return (FALSE);
775
776 DBG(DBG_PIO && DBG_PROBE,
777 printk("Issuing PIO READ CONFIG to HBA at %#x\n", base));
778 eata_send_command(0, base, EATA_CMD_PIO_READ_CONFIG);
779
780 loop = R_LIMIT;
781 for (p = (u16 *) buf;
782 (long)p <= ((long)buf + (sizeof(struct get_conf) / 2)); p++) {
783 while (!(inb(base + HA_RSTATUS) & HA_SDRQ))
784 if (--loop == 0)
785 return (FALSE);
786
787 loop = R_LIMIT;
788 *p = inw(base + HA_RDATA);
789 }
790
791 if (!(inb(base + HA_RSTATUS) & HA_SERROR)) {
792 if (htonl(EATA_SIGNATURE) == buf->signature) {
793 DBG(DBG_PIO&&DBG_PROBE, printk("EATA Controller found at %x "
794 "EATA Level: %x\n", (uint) base,
795 (uint) (buf->version)));
796
797 while (inb(base + HA_RSTATUS) & HA_SDRQ)
798 inw(base + HA_RDATA);
799 return (TRUE);
800 }
801 } else {
802 DBG(DBG_PROBE, printk("eata_dma: get_conf_PIO, error during transfer "
803 "for HBA at %lx\n", (long)base));
804 }
805 return (FALSE);
806 }
807
808 void print_config(struct get_conf *gc)
809 {
810 printk("Please check values: (read config data)\n");
811 printk("LEN: %d ver:%d OCS:%d TAR:%d TRNXFR:%d MORES:%d DMAS:%d\n",
812 (u32) ntohl(gc->len), gc->version,
813 gc->OCS_enabled, gc->TAR_support, gc->TRNXFR, gc->MORE_support,
814 gc->DMA_support);
815 printk("DMAV:%d HAAV:%d SCSIID0:%d ID1:%d ID2:%d QUEUE:%d SG:%d SEC:%d\n",
816 gc->DMA_valid, gc->HAA_valid, gc->scsi_id[3], gc->scsi_id[2],
817 gc->scsi_id[1], ntohs(gc->queuesiz), ntohs(gc->SGsiz), gc->SECOND);
818 printk("IRQ:%d IRQT:%d DMAC:%d FORCADR:%d SG_64K:%d SG_UAE:%d MID:%d "
819 "MCH:%d MLUN:%d\n",
820 gc->IRQ, gc->IRQ_TR, (8 - gc->DMA_channel) & 7, gc->FORCADR,
821 gc->SG_64K, gc->SG_UAE, gc->MAX_ID, gc->MAX_CHAN, gc->MAX_LUN);
822 printk("RIDQ:%d PCI:%d EISA:%d\n",
823 gc->ID_qest, gc->is_PCI, gc->is_EISA);
824 DBG(DPT_DEBUG, DELAY(14));
825 }
826
827 short register_HBA(u32 base, struct get_conf *gc, Scsi_Host_Template * tpnt,
828 u8 bustype)
829 {
830 ulong size = 0;
831 unchar dma_channel = 0;
832 char *buff = 0;
833 unchar bugs = 0;
834 struct Scsi_Host *sh;
835 hostdata *hd;
836 int x;
837
838
839 DBG(DBG_REGISTER, print_config(gc));
840
841 if (gc->DMA_support == FALSE) {
842 printk("The EATA HBA at %#.4x does not support DMA.\n"
843 "Please use the EATA-PIO driver.\n", base);
844 return (FALSE);
845 }
846
847 if(gc->HAA_valid == FALSE || ntohl(gc->len) < 0x22)
848 gc->MAX_CHAN = 0;
849
850 if (reg_IRQ[gc->IRQ] == FALSE) {
851 if (!request_irq(gc->IRQ, (void *) eata_fake_int_handler, SA_INTERRUPT,
852 "eata_dma")){
853 reg_IRQ[gc->IRQ]++;
854 if (!gc->IRQ_TR)
855 reg_IRQL[gc->IRQ] = TRUE;
856 } else {
857 printk("Couldn't allocate IRQ %d, Sorry.", gc->IRQ);
858 return (FALSE);
859 }
860 } else {
861 if (reg_IRQL[gc->IRQ] == TRUE) {
862 printk("Can't support more than one HBA on this IRQ,\n"
863 " if the IRQ is edge triggered. Sorry.\n");
864 return (FALSE);
865 } else
866 reg_IRQ[gc->IRQ]++;
867 }
868
869
870 dma_channel = 0xff;
871 if (gc->DMA_valid) {
872 if (request_dma(dma_channel = (8 - gc->DMA_channel) & 7, "eata_dma")) {
873 printk("Unable to allocate DMA channel %d for ISA HBA at %#.4x.\n",
874 dma_channel, base);
875 reg_IRQ[gc->IRQ]--;
876 if (reg_IRQ[gc->IRQ] == 0)
877 free_irq(gc->IRQ);
878 if (gc->IRQ_TR == FALSE)
879 reg_IRQL[gc->IRQ] = FALSE;
880 return (FALSE);
881 }
882 }
883
884 if (bustype != IS_EISA)
885 buff = get_board_data(base, gc->IRQ, gc->scsi_id[3]);
886
887 if (buff == NULL) {
888 if (bustype == IS_EISA) {
889 bugs = bugs || BROKEN_INQUIRY;
890 } else {
891 if (gc->DMA_support == FALSE)
892 printk("HBA at %#.4x doesn't support DMA. Sorry\n", base);
893 else
894 printk("HBA at %#.4x does not react on INQUIRY. Sorry.\n",
895 base);
896 if (gc->DMA_valid)
897 free_dma(dma_channel);
898 reg_IRQ[gc->IRQ]--;
899 if (reg_IRQ[gc->IRQ] == 0)
900 free_irq(gc->IRQ);
901 if (gc->IRQ_TR == FALSE)
902 reg_IRQL[gc->IRQ] = FALSE;
903 return (FALSE);
904 }
905 }
906
907 if (gc->DMA_support == FALSE && buff != NULL)
908 printk("HBA %.12sat %#.4x doesn't set the DMA_support flag correctly.\n",
909 &buff[16], base);
910
911 request_region(base, 9, "eata_dma");
912
913
914
915
916 if(ntohs(gc->queuesiz) == 0) {
917 gc->queuesiz = ntohs(64);
918 printk("Warning: Queue size has to be corrected. Assuming 64 queueslots\n"
919 " This might be a PM2012B with a defective Firmware\n");
920 }
921
922 size = sizeof(hostdata) + ((sizeof(struct eata_ccb) + sizeof(long))
923 * ntohs(gc->queuesiz));
924
925 DBG(DBG_REGISTER, printk("scsi_register size: %ld\n", size));
926
927 sh = scsi_register(tpnt, size);
928
929 if(sh == NULL) {
930 if (gc->DMA_valid)
931 free_dma(dma_channel);
932
933 reg_IRQ[gc->IRQ]--;
934 if (reg_IRQ[gc->IRQ] == 0)
935 free_irq(gc->IRQ);
936 if (gc->IRQ_TR == FALSE)
937 reg_IRQL[gc->IRQ] = FALSE;
938 return (FALSE);
939 }
940
941 hd = SD(sh);
942
943 memset(hd->ccb, 0, sizeof(struct eata_ccb) * ntohs(gc->queuesiz));
944 memset(hd->reads, 0, sizeof(u32) * 26);
945
946 hd->broken_INQUIRY = (bugs & BROKEN_INQUIRY);
947
948 if(hd->broken_INQUIRY == TRUE) {
949 strcpy(SD(sh)->vendor, "DPT");
950 strcpy(SD(sh)->name, "??????????");
951 strcpy(SD(sh)->revision, "???.?");
952 } else {
953 strncpy(SD(sh)->vendor, &buff[8], 8);
954 SD(sh)->vendor[8] = 0;
955 strncpy(SD(sh)->name, &buff[16], 17);
956 SD(sh)->name[17] = 0;
957 SD(sh)->revision[0] = buff[32];
958 SD(sh)->revision[1] = buff[33];
959 SD(sh)->revision[2] = buff[34];
960 SD(sh)->revision[3] = '.';
961 SD(sh)->revision[4] = buff[35];
962 SD(sh)->revision[5] = 0;
963 }
964
965 switch (ntohl(gc->len)) {
966 case 0x1c:
967 SD(sh)->EATA_revision = 'a';
968 break;
969 case 0x1e:
970 SD(sh)->EATA_revision = 'b';
971 break;
972 case 0x22:
973 SD(sh)->EATA_revision = 'c';
974 break;
975 case 0x24:
976 SD(sh)->EATA_revision = 'z';
977 default:
978 SD(sh)->EATA_revision = '?';
979 }
980
981 if(ntohl(gc->len) >= 0x22) {
982 if (gc->is_PCI == TRUE)
983 hd->bustype = IS_PCI;
984 else if (gc->is_EISA == TRUE)
985 hd->bustype = IS_EISA;
986 else
987 hd->bustype = IS_ISA;
988 } else if(hd->broken_INQUIRY == FALSE) {
989 if (buff[21] == '4')
990 hd->bustype = IS_PCI;
991 else if (buff[21] == '2')
992 hd->bustype = IS_EISA;
993 else
994 hd->bustype = IS_ISA;
995 } else
996 hd->bustype = bustype;
997
998 if(ntohl(gc->len) >= 0x22) {
999 sh->max_id = gc->MAX_ID;
1000 sh->max_lun = gc->MAX_LUN;
1001 } else {
1002 sh->max_id = 8;
1003 sh->max_lun = 8;
1004 }
1005
1006 hd->channel = gc->MAX_CHAN;
1007 sh->max_channel = gc->MAX_CHAN;
1008 sh->base = (char *) base;
1009 sh->io_port = (u16) base;
1010 sh->n_io_port = 9;
1011 sh->irq = gc->IRQ;
1012 sh->dma_channel = dma_channel;
1013
1014
1015
1016
1017 sh->this_id = gc->scsi_id[3];
1018 sh->can_queue = ntohs(gc->queuesiz) - 1;
1019
1020 if (gc->OCS_enabled == TRUE)
1021 if(hd->bustype != IS_ISA)
1022 sh->cmd_per_lun = sh->can_queue/C_P_L_DIV;
1023 else
1024 sh->cmd_per_lun = 8;
1025 else
1026 sh->cmd_per_lun = 1;
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036 if (gc->SG_64K == TRUE && ntohs(gc->SGsiz) == 64 && hd->bustype != IS_ISA){
1037 sh->sg_tablesize = SG_SIZE_BIG;
1038 sh->use_clustering = FALSE;
1039 } else {
1040 sh->sg_tablesize = ntohs(gc->SGsiz);
1041 sh->use_clustering = TRUE;
1042 if (sh->sg_tablesize > SG_SIZE || sh->sg_tablesize == 0) {
1043 sh->sg_tablesize = SG_SIZE;
1044 if (ntohs(gc->SGsiz) == 0)
1045 printk("Warning: SG size had to be corrected.\n"
1046 "This might be a PM2012 with a defective Firmware\n");
1047 }
1048 }
1049
1050 if (gc->SECOND)
1051 hd->primary = FALSE;
1052 else
1053 hd->primary = TRUE;
1054
1055 sh->wish_block = FALSE;
1056
1057 if (hd->bustype != IS_ISA) {
1058 sh->unchecked_isa_dma = FALSE;
1059 } else {
1060 sh->unchecked_isa_dma = TRUE;
1061 }
1062
1063 for(x = 0; x <= 11; x++){
1064 hd->writes_lat[x][1] = 0xffffffff;
1065 hd->reads_lat[x][1] = 0xffffffff;
1066 }
1067
1068 hd->next = NULL;
1069 hd->prev = last_HBA;
1070 if(hd->prev != NULL)
1071 SD(hd->prev)->next = sh;
1072 last_HBA = sh;
1073 if (first_HBA == NULL)
1074 first_HBA = sh;
1075 registered_HBAs++;
1076
1077 return (TRUE);
1078 }
1079
1080
1081 void find_EISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
1082 {
1083 u32 base;
1084 int i;
1085
1086 #if CHECKPAL
1087 u8 pal1, pal2, pal3;
1088 #endif
1089
1090 for (i = 0; i < MAXEISA; i++) {
1091 if (EISAbases[i] == TRUE) {
1092
1093 base = 0x1c88 + (i * 0x1000);
1094 #if CHECKPAL
1095 pal1 = inb((u16)base - 8);
1096 pal2 = inb((u16)base - 7);
1097 pal3 = inb((u16)base - 6);
1098
1099 if (((pal1 == 0x12) && (pal2 == 0x14)) ||
1100 ((pal1 == 0x38) && (pal2 == 0xa3) && (pal3 == 0x82)) ||
1101 ((pal1 == 0x06) && (pal2 == 0x94) && (pal3 == 0x24))) {
1102 DBG(DBG_PROBE, printk("EISA EATA id tags found: %x %x %x \n",
1103 (int)pal1, (int)pal2, (int)pal3));
1104 #endif
1105 if (get_conf_PIO(base, buf) == TRUE) {
1106 DBG(DBG_PROBE && DBG_EISA, print_config(buf));
1107 if (buf->IRQ) {
1108 register_HBA(base, buf, tpnt, IS_EISA);
1109 } else
1110 printk("eata_dma: No valid IRQ. HBA removed from list\n");
1111 } else {
1112 if (check_blink_state(base))
1113 printk("HBA is in BLINK state. Consult your HBAs "
1114 " Manual to correct this.\n");
1115 }
1116
1117 EISAbases[i] = 0;
1118 #if CHECKPAL
1119 }
1120 #endif
1121 }
1122 }
1123 return;
1124 }
1125
1126 void find_ISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
1127 {
1128 int i;
1129
1130 for (i = 0; i < MAXISA; i++) {
1131 if (ISAbases[i]) {
1132 if (get_conf_PIO(ISAbases[i],buf) == TRUE){
1133 register_HBA(ISAbases[i], buf, tpnt, IS_ISA);
1134 } else {
1135 if (check_blink_state(ISAbases[i]))
1136 printk("HBA is in BLINK state. Consult your HBAs "
1137 "Manual to correct this.\n");
1138 }
1139 ISAbases[i] = 0;
1140 }
1141 }
1142 return;
1143 }
1144
1145 void find_PCI(struct get_conf *buf, Scsi_Host_Template * tpnt)
1146 {
1147
1148 #ifndef CONFIG_PCI
1149 printk("eata_dma: kernel PCI support not enabled. Skipping scan for PCI HBAs.\n");
1150 #else
1151
1152 u8 pci_bus, pci_device_fn;
1153 static s16 pci_index = 0;
1154 u32 base = 0;
1155 u16 com_adr;
1156 u16 rev_device;
1157 u32 error, i, x;
1158
1159 if (pcibios_present()) {
1160 for (i = 0; i <= MAXPCI; ++i, ++pci_index) {
1161 if (pcibios_find_device(PCI_VENDOR_ID_DPT, PCI_DEVICE_ID_DPT,
1162 pci_index, &pci_bus, &pci_device_fn))
1163 break;
1164 DBG(DBG_PROBE && DBG_PCI,
1165 printk("eata_dma: HBA at bus %d, device %d,"
1166 " function %d, index %d\n", (s32)pci_bus,
1167 (s32)((pci_device_fn & 0xf8) >> 3),
1168 (s32)(pci_device_fn & 7), pci_index));
1169
1170 if (!(error = pcibios_read_config_word(pci_bus, pci_device_fn,
1171 PCI_CLASS_DEVICE, &rev_device))) {
1172 if (rev_device == PCI_CLASS_STORAGE_SCSI) {
1173 if (!(error = pcibios_read_config_word(pci_bus,
1174 pci_device_fn, PCI_COMMAND,
1175 (u16 *) & com_adr))) {
1176 if (!((com_adr & PCI_COMMAND_IO) &&
1177 (com_adr & PCI_COMMAND_MASTER))) {
1178 printk("HBA has IO or BUSMASTER mode disabled\n");
1179 continue;
1180 }
1181 } else
1182 printk("eata_dma: error %x while reading "
1183 "PCI_COMMAND\n", error);
1184 } else
1185 printk("DEVICECLASSID %x didn't match\n", rev_device);
1186 } else {
1187 printk("eata_dma: error %x while reading PCI_CLASS_BASE\n",
1188 error);
1189 continue;
1190 }
1191
1192 if (!(error = pcibios_read_config_dword(pci_bus, pci_device_fn,
1193 PCI_BASE_ADDRESS_0, (int *) &base))){
1194
1195
1196 if (base & 0x01) {
1197 base &= 0xfffffffe;
1198
1199 if ((inb(base) == 0x12) && (inb(base + 1) == 0x14))
1200 continue;
1201 base += 0x10;
1202 if (base != 0x1f8) {
1203
1204 if (get_conf_PIO(base, buf) == TRUE) {
1205 if (buf->FORCADR)
1206 continue;
1207
1208
1209
1210
1211
1212
1213 register_HBA(base, buf, tpnt, IS_PCI);
1214
1215 if (base < 0x1000) {
1216 for (x = 0; x < MAXISA; ++x) {
1217 if (ISAbases[x] == base) {
1218 ISAbases[x] = 0;
1219 break;
1220 }
1221 }
1222 } else if ((base & 0x0fff) == 0x0c88) {
1223 x = (base >> 12) & 0x0f;
1224 EISAbases[x] = 0;
1225 }
1226 continue;
1227 } else if (check_blink_state(base) == TRUE) {
1228 printk("eata_dma: HBA is in BLINK state.\n"
1229 "Consult your HBAs Manual to correct this.\n");
1230 }
1231 }
1232 }
1233 } else
1234 printk("eata_dma: error %x while reading "
1235 "PCI_BASE_ADDRESS_0\n", error);
1236 }
1237 } else
1238 printk("eata_dma: No BIOS32 extensions present. This driver release "
1239 "still depends on it.\n"
1240 " Skipping scan for PCI HBAs. \n");
1241 #endif
1242 return;
1243 }
1244
1245 int eata_detect(Scsi_Host_Template * tpnt)
1246 {
1247 struct Scsi_Host *HBA_ptr;
1248 struct get_conf gc;
1249 int i;
1250
1251 DBG((DBG_PROBE && DBG_DELAY) || DPT_DEBUG,
1252 printk("Using lots of delays to let you read the debugging output\n"));
1253
1254 status = scsi_init_malloc(512, GFP_ATOMIC | GFP_DMA);
1255 dma_scratch = scsi_init_malloc(512, GFP_ATOMIC | GFP_DMA);
1256
1257 find_PCI(&gc, tpnt);
1258
1259 find_EISA(&gc, tpnt);
1260
1261 find_ISA(&gc, tpnt);
1262
1263 for (i = 0; i <= MAXIRQ; i++)
1264 if (reg_IRQ[i]){
1265 free_irq(i);
1266 request_irq(i, (void *)(eata_int_handler), SA_INTERRUPT, "eata_dma");
1267 }
1268
1269 HBA_ptr = first_HBA;
1270
1271 if (registered_HBAs != 0) {
1272 printk("EATA (Extended Attachment) driver version: %d.%d%s\n"
1273 "developed in co-operation with DPT\n"
1274 "(c) 1993-95 Michael Neuffer, neuffer@goofy.zdv.uni-mainz.de\n",
1275 VER_MAJOR, VER_MINOR, VER_SUB);
1276 printk("Registered HBAs:");
1277 printk("\nHBA no. Boardtype: Revis: EATA: Bus: BaseIO: IRQ: DMA: Ch: "
1278 "ID: Pr: QS: SG: CPL:\n");
1279 for (i = 1; i <= registered_HBAs; i++) {
1280 printk("scsi%-2d: %.10s v%s 2.0%c %s %#.4x %2d",
1281 HBA_ptr->host_no, SD(HBA_ptr)->name, SD(HBA_ptr)->revision,
1282 SD(HBA_ptr)->EATA_revision, (SD(HBA_ptr)->bustype == 'P')?
1283 "PCI ":(SD(HBA_ptr)->bustype == 'E')?"EISA":"ISA ",
1284 (u32) HBA_ptr->base, HBA_ptr->irq);
1285 if(HBA_ptr->dma_channel != 0xff)
1286 printk(" %2x ", HBA_ptr->dma_channel);
1287 else
1288 printk(" %s", "BMST");
1289 printk(" %d %d %c %2d %2d %2d\n", SD(HBA_ptr)->channel,
1290 HBA_ptr->this_id, (SD(HBA_ptr)->primary == TRUE)?'Y':'N',
1291 HBA_ptr->can_queue, HBA_ptr->sg_tablesize, HBA_ptr->cmd_per_lun);
1292 HBA_ptr = SD(HBA_ptr)->next;
1293 }
1294 } else {
1295 scsi_init_free((void *)status, 512);
1296 }
1297
1298 scsi_init_free((void *)dma_scratch, 512);
1299
1300 DBG(DPT_DEBUG, DELAY(12));
1301
1302 return(registered_HBAs);
1303 }
1304
1305 #ifdef MODULE
1306
1307 Scsi_Host_Template driver_template = EATA_DMA;
1308 #include "scsi_module.c"
1309 #endif
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327